- 05 Feb, 2009 8 commits
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Kevin Hilman authored
Cc: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by:Kevin Hilman <khilman@deeprootsystems.com>
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David Brownell authored
CC drivers/ide/palm_bk3710.o drivers/ide/palm_bk3710.c: In function 'palm_bk3710_probe': drivers/ide/palm_bk3710.c:382: warning: assignment makes integer from pointer without a cast Someone should fix hw_regs_t to neither be a typedef, nor use "unsigned long" where it should use "void __iomem *". Signed-off-by:
David Brownell <dbrownell@users.sourceforge.net> Cc: Kevin Hilman <khilman@deeprootsystems.com> Cc: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by:
Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> (cherry picked from commit ef183f6b)
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Kevin Hilman authored
Remove davinci platform-specific IO accessor macros in favor of standard ioremap + io[read|write]* functions. Signed-off-by: -
Kevin Hilman authored
Add arch-specific ioremap() which uses any existing static mappings in place of doing a new mapping. From now on, drivers should always use ioremap() instead of IO_ADDRESS(). In addition, remove the davinci_[read|write]* macros in favor of using ioremap + io[read|write]*. Signed-off-by: -
David Brownell authored
The A1CR hacks aren't really needed on the DM355 EVM; NAND timings set by UBL (or whatever) are a bit slower than needed, but that's not too bad. Remove, but add a comment in board setup. For the DM6446 EVM, the problem is how to cope with re-jumpering in the default boot-from-NOR case. Boards modified to boot from NAND should already have A1CR timings set up. Comment this; for the moment it's a bit nasty to move this code to board setup. (And remove pointless AWRCC setting. The "Extended Wait" mode doesn't work with NAND chips.) Related -- make board-dm6446-evm.c warn about trying to make NAND and NOR coexist, and only set up one of them. Signed-off-by: -
David Brownell authored
Support various flavors of chipselect: - EMIF chipselects, controlled by platform_device.id; now uses a spinlock for NANDFCR mutual exclusion. - NAND packages with multiple chipselects, with a new platform data field; use that for the dm355 EVM. The EMIF CS support is only sanity tested; needs more, on a board using NAND and HWECC on a nonzero chipselect. Update the "no NAND chip" message so it doesn't presume a hack specific to the dm6446evm: "boot via NOR, then swap CS0 jumper"; and use the errno returned from nand_scan. Plus minor tweaks: rename 1-bit ECC procedures to match current method names, not old 2.6.10 ones; and include marker comments between driver sections. Signed-off-by: -
David Brownell authored
Define and use a DaVinci-specific NAND platform_data structure, instead of reusing generic NOR platform_data. Improvements: - ALE and CLE bits are no longer hard-wired - ECC mode is in board-specific data, not a Kconfig option - Supports board-specific options like BUSWIDTH_16 and FLASH_BBT Plus: - Don't force the use of MTD partitioning - Make that platform data be optional - Now pdev->id specifies chipselect (must be zero for now) - Add missing iounmap calls on probe failure And corresponding updates for NAND support on the two EVM boards that now have it. Note that dm355 evm boards will fail cleanly on boot now, pending 4-bit ECC support. Signed-off-by: -
David Brownell authored
Make the DaVinci NAND driver use standard Linux badblock table support, by removing a mangled clone of that code. NAND_USB_FLASH_BBT is a better (faster, clearer) and more widely used solution for speedier boot than such needless hacks. Signed-off-by:
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- 31 Jan, 2009 3 commits
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David Brownell authored
This is a minor cleanup of dm6446 evm NAND configuration: - Move pinmux from NAND driver to the board setup code where it belongs. - Use of NAND is unrelated to VLYNQ and AEAW; don't enable them. - Move IDE pinmux out of clock configuration to board setup. - The conflict for IDE with *any* other EMIF user, not just NOR; so don't always configure IDE, NAND, and NOR. The IDE config should maybe move to the new dm644x.c file, but the flash configuration is very board-specific. Signed-off-by:
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David Brownell authored
Minor ECC cleanup for the DaVinci NAND driver: - Clarify Kconfig: this HW_ECC is just the 1-bit flavor - Remove needless non-mainline NAND_ECC_HWx_y constants - Use BIT(n) in a few places for clarity And remove pointless DRIVER_NAME define, correcting MODULE_ALIAS so it could really trigger hotplugging. Signed-off-by:
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David Brownell authored
Declare 4-bit ECC registers, as supported by AEMIF on DM355 and various other chips. Such improved reliability will be nice, when the NAND driver eventually supports it. Signed-off-by:
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- 29 Jan, 2009 3 commits
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Kevin Hilman authored
Here's a another pass at better modeling of clocks and PLLs. The longer term goal being the ability model the clock tree well enough to do DVFS on devices that support it. - generalize PLL control and clock distribution - model PLLs, their dividers and the resulting PLL-derived clocks - add clock parent/child relationships - drop 'div_by_*' in favor of using PLL dividers - misc. other minor cleanups - move clock definitions into chip-specific code - start using clk_get_rate() to get rates (UART, timers) - drop DM*_CLOCK_TICK_RATE Updates from last version - multiple updates and fixes from David Brownell (Thanks!) - use of divider registers instead of 'fixed_divisor' field to better model PLL-derived clocks based on divider regs. - drop some hard-coded LPSC init in favor of enabling with relevant clock. TODO: - seek-and-destroy hardcoded clock rates Signed-off-by: -
Kevin Hilman authored
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Kevin Hilman authored
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- 27 Jan, 2009 4 commits
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David Brownell authored
Kick in scatterlist DMA support for the MMC/SD driver, with NR_SG=16 so this will usually do as much I/O per IRQ as it would using the block bounce buffer logic. Each DMA segment is most often a single page; larger segments happen too, over 15% on some loads. It's also common for all the extra reload slots to be used, though again short scatterlists (one or two entries) are most common. Unrelated: add my copyright, and remove the revision history comments (which is the standard policy for mainline code). Signed-off-by:
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David Brownell authored
Minor code shrink, avoiding some needless pointer indirections by passing the mmc_data structure around instead of looking it up. Also some code path cleanup when starting data transfers. Signed-off-by:
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David Brownell authored
Clean up MMC/SD fault handling for transfers with data stages: - After DMA errors, always issue any STOP needed; aborting DMA on the host is not sufficient to reset the card's state. - It does that already after data or command errors; but also: * Always reset the data and command state machines, instead of just the command machine (and just for data "CRC" errors) * Report how many blocks were transferred (resolving FIXMEs) There are probably still a few holes in fault handling, but these updates resolved some problems I was (briefly) able to reproduce by running a DM6446 quite a bit faster than it's supposed to be able to handle. Signed-off-by: -
David Brownell authored
Allocate and free (NR_SG - 1) parameter RAM slots, and make max_hw_segs reflect that. This is a NOP until NR_SG is changed, at which point those slots *need* to be used. Unmapping scatterlists must use the original scatterlist length, not the length after mapping. (But they won't currently differ.) Signed-off-by:
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- 19 Jan, 2009 8 commits
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David Brownell authored
Minor tweaks: - Bugfix handling of EVENTQ_DEFAULT ... recognize it, and implement as EVENTQ_1 instead of reserved/illegal value - Use the defined enum type internally - Have MMC use TC1, as appropriate for "longer, nonreal-time sensitive transfers" (per docs) ... instead of using TC0, as for "urgent, small, real-time sensitive transfers". Arguably, TC0 priority should be increased (to 0) to be higher priority than the ARM ... matching "urgent" etc. The added TCs on DM646x chips are still not recognized. Signed-off-by: -
David Brownell authored
This patch primarily renames functions to use an edma_ prefix and remove a needless infix "_dma_" token. Again, parameters which identify parameter RAM slots were renamed as "slot" from "lch". Also, edma_get_position() was moved to be adjacent to the other operations that rely on just a few fields of a parameter RAM slot. Signed-off-by:
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David Brownell authored
This patch primarily renames functions to use an edma_ prefix and remove a needless infix "_dma_" token ... except that "src_params" became "src", and "dest_params" became "dest". Parameters which identify parameter RAM slots were renamed as "slot" from "lch". Also, the slot numbers become unsigned (supporting a minor code shrink), and a handful of needless temporary variables were removed. Signed-off-by:
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David Brownell authored
These functions now only accept channels, since reload slots can never be independently active. Change parameter to unsinged, to allow a minor code shrink. Remove pointless foof in edma_stop(): the channel's parameter RAM slot must be reinitialized, so there is no reason to modify it unless chaining is being misused; and just updating the link register can't protect aginst chain bugs. Signed-off-by:
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David Brownell authored
EDMA interface update for channel and parameter RAM slot alloc/free. This is the biggest of these changes, since it's non-cosmetic. - Stop talking about "master" and "slave"! Instead, use the notions exposed by the hardware: a DMA "channel", and a PaRAM slot. This is a general doc/comment update, and affects calling conventions. - Split davinci_request_dma() into two simpler routines: * edma_alloc_channel() with three fewer parameters * edma_alloc_slot() with just one parameter (may be a wildcard) The test for successful returns is "value < 0", not "value != 0"; non-negative values are the returned channel or slot number. - Split davinci_free_dma() into two routines, both of which update the now-free parameter RAM slot to hold a dummy transfer. * void edma_free_channel(unsigned channel) * void edma_free_slot(unsigned slot); - Fill all PaRAM slots with dummy transfers when they're not in use. - Change the channel and slot numbers to "unsigned" in some cases so we can avoid some tests for invalid parameters. A key notion here is to *stop* fuzzing distinctions between DMA channels and parameter RAM slots. This makes it easier to match these calls to hardware docs, and harder to get confused by differences; channels are (potentially) active, while slots are always passive. Transfer Completion Code (TCC) values are no longer supported except through the calls which manipulate entire parameter RAM sets. This means that completion IRQ setup (for audio) is a bit different. Signed-off-by: -
David Brownell authored
Another EDMA interface update. Fixes documentation for the linking calls to be kerneldoc style. Rename parameters so they're meaningful (from/to vs lch/lch_que) and unsigned (eliminates some error checks). Remove unused edma_unlink() parameter. Move this code so it's grouped with the other calls which only modify parameter RAM. Signed-off-by:
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David Brownell authored
This renames two parameter RAM calls that read and write entire param sets, and re-focusses their descriptions on the fact that they update parameter RAM. That has nothing *directly* to do with any hardware DMA channel. Switch to unsigned params, letting some error checks be removed. It also starts updating the dma.c comments to reflect the different structural blocks of the programming interface, calling out the two groups of parameter RAM operations and channel control operations. Signed-off-by:
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Chaithrika U S authored
This patch defines debug macros for low-level debugging for Davinci based platforms Tested on : - DM644x DaVinci EVM - DM646X DaVinciHD EVM - DM355 EVM This patch attempts to solve the low-level debug issue in DM646x. The UART on DM646x SoC allows only 32-bit access. The existing debug-macro.S uses the macros from debug-8250.S file. This led to garbage serial out in the case of DM646x. The inclusion of debug-8250.S does not allow for run time fix for this issue. There are compile time errors due to multiple definitions of the macros. Also when building a single image for multiple DaVinci Platforms, the ifdefs cannot be relied upon. The solution below does not include the debug-8250.S file and defines the necessary macros. This solution was arrived at after observing that word access does not affect the low-level debug messages on DM644x/DM355. The other approach to this issue is to use the UART module information available in the peripheral registers to decide the access mechanism. But this will have to be done for every access of UART specifically for DM646x. Also this calls for a modification of the debug-8250.S file. Signed-off-by:Chaithrika U S <chaithrika@ti.com> Signed-off-by:
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- 16 Jan, 2009 5 commits
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Hugo Villeneuve authored
Signed-off-by:
Hugo Villeneuve <hugo@hugovil.com> Signed-off-by:
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Hugo Villeneuve authored
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Hugo Villeneuve authored
In <asm/mach-types.h>, the SFFSDR board is defined as MACH_SFFSDR. Signed-off-by:
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David Brownell authored
Whoops -- dm6446 can't clock MMC as fast as dm355 can. Don't tempt it. Signed-off-by:
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David Brownell authored
Address feedback from Dmitry: - input_sync() per event - maintain dev->keybit when remapping keys - since we handle remapping, keycodemax and keycodesize aren't used - on probe error, don't input_free_device() unless it registered Also: - avoid reporting excess events - more bad-parameter paranoia in the remapping code The excess event issue is basically that we don't have a way to distinguish "button press" events from "button release" ones or autorepeat events, so we should try being a bit smarter about synthesizing them. Signed-off-by:
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- 12 Jan, 2009 2 commits
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David Brownell authored
Finish removing the typedef from the EDMA programming interface. Signed-off-by:
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David Brownell authored
Split DMA transfer setup in two parts: template setup, where all of the stable transfer parameters get arranged; and transfer setup, where the template is populated with the right buffer. Later, the template is used with each scatterlist segment. (Minor runtime code shrink.) Disable transfer completion IRQs; we don't use them, there's no point in wasting time in the IRQ handling stack. We only care about DMA callbacks for error detection. (Minor runtime speedup.) Stop using the typedef for "struct edmacc_param". Signed-off-by:
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- 09 Jan, 2009 1 commit
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Kevin Hilman authored
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- 08 Jan, 2009 6 commits
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Kevin Hilman authored
Conflicts: drivers/usb/musb/davinci.c
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Hugo Villeneuve authored
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Hugo Villeneuve authored
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David Brownell authored
Use memcpy_{from,to}io() to read and write entire parameter RAM slots, saving a surprising 268 bytes over the existing code. Renames those parameters to be more sensible than "temp". Fix a minor glitch and ensure all DMA channels are initialized with a dummy transfer with all options zeroed, so it's not possible to accidentally start getting intermediate completion callbacks or event chaining by accident. Save eight bytes while doing that. Shrink davinci_stop_dma() by not testing if the bits are already cleared; if they were, clearing again is harmless. And shrink map_dmach_queue() by avoiding a superfluous test. EDMA runtime code footprint is now under 2700 bytes, and there are still further cleanups that could be done... Signed-off-by: -
David Brownell authored
Mr. Grep reports that the EDMA chain/unchain calls are unused. Same in the old 2.6.10 code; there seems to be no value in those routines. Delete! Saves a few bytes. Signed-off-by:
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David Brownell authored
Lots of simple code cleanup for EDMA: - KernelDoc updates (biggest part by volume): fixes; keep only one copy of the function description, next to its definition; convert most function descriptions to kerneldoc. - Message fixup in EDMA support: use just newline, not CRNL; use %08x for 32 bit values. - Comment a couple fault handling glitches, and fix one. - Change parameters of the davinci_set_dma_{src,dest}_index() and davinci_set_dma_transfer_params() functions to use explicit widths (s16, u16) not implicit (short, unsigned short). - Switch davinci_set_dma_{src,dest}_params() to use dma_addr_t for DMA addresses. No functional changes here, except insisting that davinci_stop_dma() do nothing unless it's given a valid DMA channel. Signed-off-by:
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