nand: dm6446 mux cleanup

This is a minor cleanup of dm6446 evm NAND configuration:

 - Move pinmux from NAND driver to the board setup code where it belongs.
 - Use of NAND is unrelated to VLYNQ and AEAW; don't enable them.
 - Move IDE pinmux out of clock configuration to board setup.
 - The conflict for IDE with *any* other EMIF user, not just NOR;
   so don't always configure IDE, NAND, and NOR.

The IDE config should maybe move to the new dm644x.c file, but the
flash configuration is very board-specific.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>

arch/arm/mach-davinci/board-dm644x-evm.c

@@ -39,6 +39,7 @@
 #include <mach/emac.h>
 #include <mach/i2c.h>
 #include <mach/serial.h>
+#include <mach/mux.h>
 #include <mach/psc.h>
 #include <mach/mmc.h>
 
@@ -575,11 +576,8 @@ static void __init evm_init_i2c(void)
 }
 
 static struct platform_device *davinci_evm_devices[] __initdata = {
-	&davinci_evm_norflash_device,
-	&davinci_evm_nandflash_device,
 	&davinci_fb_device,
 	&rtc_dev,
-	&ide_dev,
 };
 
 static struct davinci_uart_config uart_config __initdata = {
@@ -606,17 +604,51 @@ static int davinci_phy_fixup(struct phy_device *phydev)
 	return 0;
 }
 
-static __init void davinci_evm_init(void)
-{
 #if defined(CONFIG_BLK_DEV_PALMCHIP_BK3710) || \
     defined(CONFIG_BLK_DEV_PALMCHIP_BK3710_MODULE)
+#define HAS_ATA 1
+#else
+#define HAS_ATA 0
+#endif
+
 #if defined(CONFIG_MTD_PHYSMAP) || \
     defined(CONFIG_MTD_PHYSMAP_MODULE)
-	printk(KERN_WARNING "WARNING: both IDE and NOR flash are enabled, "
-	       "but share pins.\n\t Disable IDE for NOR support.\n");
+#define HAS_NOR 1
+#else
+#define HAS_NOR 0
 #endif
+
+#if defined(CONFIG_MTD_NAND_DAVINCI) || \
+    defined(CONFIG_MTD_NAND_DAVINCI_MODULE)
+#define HAS_NAND 1
+#else
+#define HAS_NAND 0
 #endif
 
+static __init void davinci_evm_init(void)
+{
+	if (HAS_ATA) {
+		if (HAS_NAND || HAS_NOR)
+			pr_warning("WARNING: both IDE and Flash are "
+				"enabled, but they share AEMIF pins.\n"
+				"\tDisable IDE for NAND/NOR support.\n");
+		davinci_cfg_reg(DM644X_HPIEN_DISABLE);
+		davinci_cfg_reg(DM644X_ATAEN);
+		davinci_cfg_reg(DM644X_HDIREN);
+		platform_device_register(&ide_dev);
+	} else if (HAS_NAND || HAS_NOR) {
+		davinci_cfg_reg(DM644X_HPIEN_DISABLE);
+		davinci_cfg_reg(DM644X_ATAEN_DISABLE);
+
+		/* only one device will be jumpered and detected */
+		if (HAS_NAND) {
+			platform_device_register(&davinci_evm_nandflash_device);
+			evm_leds[7].default_trigger = "nand-disk";
+		}
+		if (HAS_NOR)
+			platform_device_register(&davinci_evm_norflash_device);
+	}
+
 	platform_add_devices(davinci_evm_devices,
 			     ARRAY_SIZE(davinci_evm_devices));
 	evm_init_i2c();

arch/arm/mach-davinci/psc.c

@@ -47,10 +47,6 @@ static void (*davinci_psc_mux)(unsigned int id);
 static void dm6446_psc_mux(unsigned int id)
 {
 	switch (id) {
-	case DAVINCI_LPSC_ATA:
-		davinci_cfg_reg(DM644X_HDIREN);
-		davinci_cfg_reg(DM644X_ATAEN);
-		break;
 	case DAVINCI_LPSC_MMC_SD:
 		/* VDD power manupulations are done in U-Boot for CPMAC
 		 * so applies to MMC as well

drivers/mtd/nand/davinci_nand.c

@@ -469,35 +469,6 @@ static void __init nand_dm6446evm_flash_init(struct davinci_nand_info *info)
 {
 	u32 regval, tmp;
 
-	/* The following mux setting are for dm6446 only,
-	 * that's why we keep them inside the above conditional
-	 * so we don't mess up other arch's mux settings.
-	 *
-	 * FIXME ideally, this should be done by board support,
-	 * move it there at some point.
-	 */
-	if (machine_is_davinci_evm()) {
-		/* Check for correct pin mux, reconfigure if necessary */
-		tmp = davinci_readl(PINMUX0);
-
-		if ((tmp & 0x20020C1F) != 0x00000C1F) {
-			/* Disable HPI and ATA mux */
-			davinci_cfg_reg(DM644X_HPIEN_DISABLE);
-			davinci_cfg_reg(DM644X_ATAEN_DISABLE);
-
-			/* Enable VLYNQ and AEAW */
-			davinci_cfg_reg(DM644X_AEAW);
-			davinci_cfg_reg(DM644X_VLSCREN);
-			davinci_cfg_reg(DM644X_VLYNQEN);
-
-			regval = davinci_readl(PINMUX0);
-
-			dev_warn(info->dev, "Warning: MUX config for NAND: Set " \
-					"PINMUX0 reg to 0x%08x, was 0x%08x, should be done " \
-					"by bootloader.\n", regval, tmp);
-		}
-	}
-
 	regval = davinci_nand_readl(info, AWCCR_OFFSET);
 	regval |= 0x10000000;
 	davinci_nand_writel(info, AWCCR_OFFSET, regval);