Commit 11518406 authored by Xiang, Haihao's avatar Xiang, Haihao

i965_drv_video: VC1 decoding on Ivybridge

Signed-off-by: default avatarXiang, Haihao <haihao.xiang@intel.com>
parent 73470ce5
This diff is collapsed.
...@@ -183,6 +183,9 @@ ...@@ -183,6 +183,9 @@
#define MFX_VC1_PRED_PIPE_STATE MFX(2, 2, 0, 1) #define MFX_VC1_PRED_PIPE_STATE MFX(2, 2, 0, 1)
#define MFX_VC1_DIRECTMODE_STATE MFX(2, 2, 0, 2) #define MFX_VC1_DIRECTMODE_STATE MFX(2, 2, 0, 2)
#define MFD_VC1_SHORT_PIC_STATE MFX(2, 2, 1, 0)
#define MFD_VC1_LONG_PIC_STATE MFX(2, 2, 1, 1)
#define MFD_VC1_BSD_OBJECT MFX(2, 2, 1, 8) #define MFD_VC1_BSD_OBJECT MFX(2, 2, 1, 8)
#define I965_DEPTHFORMAT_D32_FLOAT 1 #define I965_DEPTHFORMAT_D32_FLOAT 1
......
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