i965_drv_video: VC1 decoding on Ivybridge

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

i965_drv_video: VC1 decoding on Ivybridge
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
11518406 · Xiang, Haihao · 73470ce5 · 11518406 · 11518406
Commit 11518406 authored May 25, 2011 by Xiang, Haihao
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Showing with 72 additions and 70 deletions

i965_drv_video/gen7_mfd.c i965_drv_video/gen7_mfd.c +69 -70

i965_drv_video/i965_defines.h i965_drv_video/i965_defines.h +3 -0

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--- a/i965_drv_video/gen7_mfd.c
+++ b/i965_drv_video/gen7_mfd.c
--- a/i965_drv_video/i965_defines.h
+++ b/i965_drv_video/i965_defines.h
@@ -183,6 +183,9 @@
 #define MFX_VC1_PRED_PIPE_STATE                 MFX(2, 2, 0, 1)
 #define MFX_VC1_DIRECTMODE_STATE                MFX(2, 2, 0, 2)

+#define MFD_VC1_SHORT_PIC_STATE                 MFX(2, 2, 1, 0)
+#define MFD_VC1_LONG_PIC_STATE                  MFX(2, 2, 1, 1)
+
 #define MFD_VC1_BSD_OBJECT                      MFX(2, 2, 1, 8)

 #define I965_DEPTHFORMAT_D32_FLOAT              1