- 30 Aug, 2006 11 commits
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Paul Mackerras authored
This code got moved from head.S but the copyright notice on head.S didn't get transferred with it. Noticed by Cort Dougan <cort@fsmlabs.com>. Signed-off-by:Paul Mackerras <paulus@samba.org>
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Will Schmidt authored
This problem was noticed by one of the Phyp firmware folks. Our ibm,client-architecture-support call was failing. This corrects the vector length parameters being passed in. Signed-off-by:
Will Schmidt <will_schmidt@vnet.ibm.com> Signed-off-by:
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Benjamin Herrenschmidt authored
Device-tree bugs on js20 with some versions of SLOF were causing the interrupt for IDE to not be parsed correctly and fail to boot. This patch adds a bit more sanity checking to the parser to detect some of those errors and fail instead of returning bogus information. The powerpc PCI code can then trigger a fallback that works on those machines. Signed-off-by:
Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by:
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Zang Roy-r61911 authored
This adds a new hardware information table for mpic. This enables the mpic code to deal with mpic controllers with different register layouts and hardware behaviours. This introduces CONFIG_MPIC_WEIRD. For boards with non standard mpic controllers, select CONFIG_MPIC_WEIRD and add its hardware information in the mpic_infos[] array. TSI108/109 PIC takes the first index of weird hardware information table. :) The table can be extended. The Tsi108/109 PIC looks like standard OpenPIC but, in fact, is different in register mapping and behavior. The patch does not affect the behavior of standard mpic. If CONFIG_MPIC_WEIRD is not defined, the code is essentially identical to the current code. [benh@kernel.crashing.org: This patch is a slightly cleaned up version of Zang Roy's support for the TSI108 MPIC variant. It also fixes up MPC7448_hpc2 to use the new version of the type macros and changes the way MPIC is selected in Kconfig to better match what is done for other system devices. ] Signed-off-by:
Roy Zang <tie-fei.zang@freescale.com> Signed-off-by:
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Benjamin Herrenschmidt authored
The booting-without-of.txt had incorrect definition for the sense codes for an OpenPIC controller Signed-off-by:
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Benjamin Herrenschmidt authored
When reworking the powerpc irq code, I figured out that we were using the radix tree in a racy way. As a temporary fix, I put a spinlock in there. However, this can have a significant impact on performances. This patch reworks that to use a smarter technique based on the fact that what we need is in fact a rwlock with extremely rare writers (thus optimized for the read path). Signed-off-by:
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Zang Roy-r61911 authored
This patch adds the mpc7448hpc2 device tree source file. Signed-off-by:
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Kim Phillips authored
Add MPC8349E MDS device tree source file to arch/powerpc/boot/dts Signed-off-by:
Kim Phillips <kim.phillips@freescale.com> Signed-off-by:
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Kim Phillips authored
This fixes MPC834x MDS (formerly SYS) and ITX platform code to get IRQ data (including PCI) from the device tree, and to use the new IPIC code. renamed defconfig (sys -> mds), left one redundant NULL assignment in mpc83xx_pcibios_fixup to keep the compiler happy. Signed-off-by:
Li Yang <leoli@freescale.com> Signed-off-by:
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Kim Phillips authored
This converts ipic code to Benh's IRQ mods. For the IPIC, IRQ sense values in the device tree equal those in include/linux/irq.h; that's 8 for low assertion (most internal IRQs on mpc83xx), and 2 for high-to-low change. spinlocks added to [un]mask, ack operations; default handler and type now set in host_map; and redundant condition check eliminated. Signed-off-by:
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Kim Phillips authored
Keep from breaking 83xx arch/ppc build. Back up old school arch/powerpc/sysdev/ipic.[hc] to arch/ppc/syslib. Signed-off-by:
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- 25 Aug, 2006 4 commits
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Jon Loeliger authored
After going through the trouble of setting up the PIC base address in the pic@40000 device tree node, use it instead of the obsolete hard-coded value. Signed-off-by:
Jon Loeliger <jdl@freescale.com> Signed-off-by:
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Jon Loeliger authored
Signed-off-by:
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Matt Porter authored
The PIN_SIZE definition name changed, update 44x_mmu.c accordingly. Signed-off-by:
Matt Porter <mporter@embeddedalley.com> Signed-off-by:
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Matt Porter authored
Removes the flush_dcache_all export for non coherent platforms. We removed the last in-kernel user of this years ago in arch/ppc so it no longer serves a purpose. Plus, it breaks the build at the moment. Signed-off-by:
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- 24 Aug, 2006 1 commit
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Adam Litke authored
On Tue, 2006-08-15 at 08:22 -0700, Dave Hansen wrote: > kernel BUG in cache_free_debugcheck at mm/slab.c:2748! Alright, this one is only triggered when slab debugging is enabled. The slabs are assumed to be aligned on a HUGEPTE_TABLE_SIZE boundary. The free path makes use of this assumption and uses the lowest nibble to pass around an index into an array of kmem_cache pointers. With slab debugging turned on, the slab is still aligned, but the "working" object pointer is not. This would break the assumption above that a full nibble is available for the PGF_CACHENUM_MASK. The following patch reduces PGF_CACHENUM_MASK to cover only the two least significant bits, which is enough to cover the current number of 4 pgtable cache types. Then use this constant to mask out the appropriate part of the huge pte pointer. Signed-off-by:
Adam Litke <agl@us.ibm.com> Signed-off-by:
Andrew Morton <akpm@osdl.org> Signed-off-by:
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- 23 Aug, 2006 11 commits
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Li Yang authored
Compile fails without defining CONFIG_PCI. The patch fix this. [paulus@samba.org: Moved of_irq_pci_swizzle so we only need one #ifdef] Signed-off-by:
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Paul Mackerras authored
When we get an illegal instruction exception, we check to see whether the instruction is one that we emulate for the user program. Some of the masks we use in checking whether the offending instruction is one we care about didn't have the top bit set, which is the MSB of the major opcode. Thus some undefined opcodes could get emulated as other (defined but unimplemented) instructions. This corrects the masks. Signed-off-by: -
Zang Roy-r61911 authored
The patch passes the UPIO_TSI flag to general 8259 serial driver Signed-off-by:
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Zang Roy-r61911 authored
The patch rewrites mpc7448hpc2 board irq support according to the new mpic device tree interface. Signed-off-by:
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Benjamin Herrenschmidt authored
The bootx_init.c trampoline didn't properly add the ramdisk to the "reserve map" (list of reserved areas of memory), thus causing all sorts of failures when using BootX with an initrd. Also fixes a possible problem if the ramdisk is located before the device-tree passed by BootX. Signed-off-by:
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Nathan Lynch authored
There are two problems in the powerpc gettimeofday code which can cause incorrect results to be returned. The first is that there is a race between do_gettimeofday and the timer interrupt: 1. do_gettimeofday does get_tb() 2. decrementer exception on boot cpu which runs timer_recalc_offset, which also samples the timebase and updates the do_gtod structure with a greater timebase value. 3. do_gettimeofday calls __do_gettimeofday, which leads to the negative result from tb_val - temp_varp->tb_orig_stamp. The second is caused by taking the boot cpu offline, which can cause the value of tb_last_jiffy to be increased past the currently available timebase, causing the same underflow as above. [paulus@samba.org - define and use data_barrier() instead of mb().] Signed-off-by:
Nathan Lynch <ntl@pobox.com> Signed-off-by:
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Andy Fleming authored
* Fixed the FEC node, and its accompanying PHY * Fixed a spacing issue in the PIC node Signed-off-by: -
Jon Loeliger authored
IRQ setup now comes from the Flat Device Tree and use the new generic IRQ code. Fixed the fsl_soc.c IRQ OF interrupt node parsing. Removed some unused MPC86xx macro definition. Signed-off-by:
Zhang Wei <wei.zhang@freescale.com> Signed-off-by:
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Andy Fleming authored
Added the mpc85xx family of dts files to the powerpc tree Signed-off-by: -
Andy Fleming authored
* Fix IRQ support in the 85xx CDS boards so it uses the new generic stuff * Fix PCI IRQ mapping to use the device tree * Disabled i8259 support to allow the CDS to boot. This will be fixed soon, but the current code doesn't even compile, so this is a vast improvement Signed-off-by:
Andy Fleming <afleming@freescale.com> Signed-off-by:
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Andy Fleming authored
* Fixed 8540 ADS support for the new irq layer * Fixed 8540 ADS support for mapping PCI interrupts * Updated 8540 ADS to use device tree for interrupt assignment and sense values Signed-off-by:
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- 18 Aug, 2006 3 commits
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Jon Loeliger authored
Add 'linux,phandle' entry to i8259@4d0 node. Signed-off-by:
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Jon Loeliger authored
Also fix 80-column run-over. Signed-off-by:
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Jon Loeliger authored
As per list discussion, let's add device tree source files under powerpc/boot/dts. If nothing else, it is a starting point. Signed-off-by:
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- 17 Aug, 2006 8 commits
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Jon Loeliger authored
Also accept "local-mac-address". However the old "address" is now obsolete, but accepted for backwards compatibility. It should be removed after all device trees have been converted to use "mac-address". Signed-off-by:
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Olof Johansson authored
Clear HID0[en_attn] at CPU init time on PPC970. Closes CVE-2006-4093. Signed-off-by:
Olof Johansson <olof@lixom.net> Signed-off-by:
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Benjamin Herrenschmidt authored
The code for using the radix tree for reverse mapping of interrupts has a typo that causes it to create incorrect mappings if the software and hardware numbers happen to be different. This would, among others, cause the IDE interrupt to fail on js20's. This fixes it. Signed-off-by:
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Ananth N Mavinakayanahalli authored
- On archs that have no-exec support, we vmalloc() a executable scratch area of PAGE_SIZE and divide it up into an array of slots of maximum instruction size for that arch - On a kprobe registration, the original instruction is copied to the first available free slot, so if multiple kprobes are registered, chances are, they get contiguous slots - On POWER4, due to not having coherent icaches, we could hit a situation where a probe that is registered on one processor, is hit immediately on another. This second processor could have fetched the stream of text from the out-of-line single-stepping area *before* the probe registration completed, possibly due to an earlier (and a different) kprobe hit and hence would see stale data at the slot. Executing such an arbitrary instruction lead to a problem as reported in LTC bugzilla 23555. The correct solution is to call flush_icache_range() as soon as the instruction is copied for out-of-line single-stepping, so the correct instruction is seen on all processors. Thanks to Will Schmidt who tracked this down. Signed-off-by:
Ananth N Mavinakayanahalli <ananth@in.ibm.com> Acked-by:
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Michael Ellerman authored
To compile kexec on 32-bit we need a few more bits and pieces. Rather than add empty definitions, we can make crash.c work on 32-bit, with only a couple of kludges. Signed-off-by:
Michael Ellerman <michael@ellerman.id.au> Signed-off-by:
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Michael Ellerman authored
We're missing a few functions for kexec to compile on 32-bit. There's nothing really 64-bit specific about the 64-bit versions, so make them generic rather than adding empty definitions for 32-bit. Signed-off-by:
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Will Schmidt authored
Updating the defconfigs for iseries, pseries, and G5. Sticking with the defaults, with the following exceptions: I've turned off HW_RANDOM for all three configs. For G5, I've enabled SND_AOA and friends as modules; this includes the FABRIC_LAYOUT, ONYX, TAS, TOONIE and SOUNDBUS* config options. Signed-off-by:
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David Wilder authored
In the case of a system hang, the user will invoke soft-reset to initiate the kdump boot. If xmon is enabled, the CPU(s) enter into the xmon debugger. Unfortunately, the secondary CPU(s) will return to the hung state when they exit from the debugger (returned from die() -> system_reset_exception()). This causes a problem in kdump since the hung CPU(s) will not respond to the IPI sent from kdump. This patch fixes the issue by calling crash_kexec_secondary() directly from system_reset_exception() without returning to the previous state. These secondary CPUs wait 5ms until the kdump boot is started by the primary CPU. In the case we exited from the debugger to "recover" (command 'x' in xmon) the primary and the secondary CPUs will all return from die() -> system_reset_exception() ->crash_kexec_secondary() wait 5ms, then return to the previous state. A kdump boot is not started in this case. Signed-off-by:
Haren Myneni <haren@us.ibm.com> Signed-off-by:
David Wilder <dwilder@us.ibm.com> Signed-off-by:
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- 08 Aug, 2006 2 commits
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Haren Myneni authored
Noticing the following might_sleep warning (dump_stack()) during kdump testing when CONFIG_DEBUG_SPINLOCK_SLEEP is enabled. All secondary CPUs will be calling rtas_set_indicator with interrupts disabled to remove them from global interrupt queue. BUG: sleeping function called from invalid context at arch/powerpc/kernel/rtas.c:463 in_atomic():1, irqs_disabled():1 Call Trace: [C00000000FFFB970] [C000000000010234] .show_stack+0x68/0x1b0 (unreliable) [C00000000FFFBA10] [C000000000059354] .__might_sleep+0xd8/0xf4 [C00000000FFFBA90] [C00000000001D1BC] .rtas_busy_delay+0x20/0x5c [C00000000FFFBB20] [C00000000001D8A8] .rtas_set_indicator+0x6c/0xcc [C00000000FFFBBC0] [C000000000048BF4] .xics_teardown_cpu+0x118/0x134 [C00000000FFFBC40] [C00000000004539C] .pseries_kexec_cpu_down_xics+0x74/0x8c [C00000000FFFBCC0] [C00000000002DF08] .crash_ipi_callback+0x15c/0x188 [C00000000FFFBD50] [C0000000000296EC] .smp_message_recv+0x84/0xdc [C00000000FFFBDC0] [C000000000048E08] .xics_ipi_dispatch+0xf0/0x130 [C00000000FFFBE50] [C00000000009EF10] .handle_IRQ_event+0x7c/0xf8 [C00000000FFFBF00] [C0000000000A0A14] .handle_percpu_irq+0x90/0x10c [C00000000FFFBF90] [C00000000002659C] .call_handle_irq+0x1c/0x2c [C00000000058B9C0] [C00000000000CA10] .do_IRQ+0xf4/0x1a4 [C00000000058BA50] [C0000000000044EC] hardware_interrupt_entry+0xc/0x10 --- Exception: 501 at .plpar_hcall_norets+0x14/0x1c LR = .pseries_dedicated_idle_sleep+0x190/0x1d4 [C00000000058BD40] [C00000000058BDE0] 0xc00000000058bde0 (unreliable) [C00000000058BDF0] [C00000000001270C] .cpu_idle+0x10c/0x1e0 [C00000000058BE70] [C000000000009274] .rest_init+0x44/0x5c To fix this issue, rtas_set_indicator_fast() is added so that will not wait for RTAS 'busy' delay and this new function is used for kdump (in xics_teardown_cpu()) and for CPU hotplug ( xics_migrate_irqs_away() and xics_setup_cpu()). Note that the platform architecture spec says that set-indicator on the indicator we're using here is not permitted to return the busy or extended busy status codes. Signed-off-by:
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Sonny Rao authored
We should not be calling power4_enable_pmcs() in pseries_lpar_enable_pmcs(); just doing the hypercall is sufficient. Prior to 2.6.15 we did not call power4_enable_pmcs() for an lpar. power4_enable_pmcs() tries to read the hid0 register which is no longer legal for an lpar in newer Power processors. Signed-off-by:
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