Signed-off-by: Bahadir Balban <bahadir.balban@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>

Signed-off-by: Bahadir Balban <bahadir.balban@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>

The patch updates the SMSC911x device driver to support the latest
NAPI changes.
Signed-off-by: Bahadir Balban <bahadir.balban@arm.com>

Device driver for the SMSC LAN911x/LAN921x families embedded Ethernet
chips.
Signed-off-by: Steve Glendinning <steve.glendinning@smsc.com>

RealView/EB revD platform comes with the SMSC LAN9118 Ethernet
chip. This patch allows either the smc91x or the smc911x drivers to be
used with the RealView/EB platform.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>

MMU option is now selectable.
Signed-off-by: Hyok S. Choi <hyok.choi@samsung.com>

The patch removes the "mrc" instruction in head-nommu.S overriding the
r0 register containing the value to be written in the CP15 system
control register.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>

These definitions are now required by head-common.S in arch/arm/kernel.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>

The patch below adds ARM ptrace functions to get the process load address.
This is required for useful userspace debugging on mmuless systems.  These
values are obtained by reading magic offsets with PTRACE_PEEKUSR, as on other
nommu targets. I picked arbitrary large values for the offsets.
Signed-off-by: Paul Brook <paul@codesourcery.com>

This patch redefines the IO_ADDRESS macro.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>

This patch redefines the IO_ADDRESS macro in
include/asm-arm/hardware.h.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>

The patch adds the empty arch_{enter,leave,flush}_lazy_{mmu,cpu}_mode
macros to pgtable-nommu.h
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>

There is no MMU context switching on MMU-less systems.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>

The patch adds the necessary ifdefs around functions that only make
sense when the MMU is enabled.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>

This patch implements Thumb-2 application support in Linux. Original
implementation by Paul Brook with fixes for VFP and Neon by Catalin
Marinas.
Signed-off-by: Paul Brook <paul@codesourcery.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>

This patch adds a prefetch abort handler similar to the data abort one
and renames the latter for consistency. Initial implementation by Paul
Brook with some renaming by Catalin Marinas.
Signed-off-by: Paul Brook <paul@codesourcery.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>

This patch moves the SCU initialisation and SMP/nAMP mode setting from
__v6_setup the the smp_prepare_cpus() and platform_secondary_init()
files as they rely on platform-specific settings.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>

This patch changes the REALVIEW_MPCORE configuration option to
REALVIEW_EB_ARM11MP since this is only specific to RealView/EB.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>

This patch removes the TWD_BASE macro used to set up and configure the
local timers on ARM11MPCore. The twd_base_addr and twd_size variables
are defined in localtimer.c and set from the realview_eb_init function.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>

This patch sets the timer IRQ at run-time by moving the sys_timer
structure and the timer_init function to the realview_eb.c file. This
allows multiple RealView platforms to be compiled in the same kernel
image.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>

This patch modifies the get_irqnr_preamble macro to work with multiple
platforms at run-time by reading the address of the GIC controller from
the gic_cpu_base_addr variable. This variable is defined in core.c and
intialised in realview_eb.c (gic_init_irq).
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>

This patch adds the core-tile detection and only enables devices if the
corresponding tile is present. It currently detects the ARM11MPCore via
the core_tile_eb11mp() macro.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>

This patch moves the IRQ and DMA definitions from core.h into
realview_eb.c since they are platform-specific. It adds a
realview_eb11mp_fixup function to adjust the IRQ numbers if the
ARM11MPCore tile is fitted. The realview_smc91x_device is also moved
from core.c into realview_eb.c.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>

This patch moves the platform specific definitions from platform.h into
the board-eb.h file. It drops the INT_* definitions as they are no
longer used in irqs.h (moved to board-eb.h). It renames REALVIEW_*
macros to REALVIEW_EB_* or REALVIEW_EB11MP_* to distinguish between
standard EB and EB + the ARM11MPCore tile. The platform.h file contains
common definitions to the RealView platforms and it is only directly
included in board-*.h files.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>

This patch registers the local timers on ARM11MPCore as clock event
devices. The clock device can be set up as periodic or oneshot.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>

This patch adds dummy local timers for each CPU so that the board clock
device is used to broadcast events to the other CPUs. The patch also
adds the declaration for the dummy_timer_setup function (the equivalent
of local_timer_setup when CONFIG_LOCAL_TIMERS is not set).

Due to the way clockevents work, the dummy timer on the first CPU has to
be registered before the board timer.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>

This patch adds the smp_call_function_single and smp_timer_broadcast
functions and modifies ipi_timer to call the platform-specific function
local_timer_interrupt.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>

The patch updates the RealView code to the clockevents infrastructure.
The SMP support is implemented in subsequent patches. Based on the
Versatile implementation by Kevin Hilman.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>

The patch updates the RealView platform code to use the generic
clocksource infrastructure for basic time keeping. Based on the
Versatile implementation by Kevin Hilman.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>

This patch enables the use of the Advanced SIMD (NEON) extension on
ARMv7. The NEON technology is a 64/128-bit hybrid SIMD architecture
for accelerating the performance of multimedia and signal processing
applications. The extension shares the registers with the VFP unit and
enabling/disabling and saving/restoring follow the same rules. In
addition, there are instructions that do not have the appropriate CP
number encoded, the checks being made in the call_fpe function.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>

This patch adds the support for VFPv3 (the kernel currently supports
VFPv2). The main difference is 32 double registers (compared to 16).
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>

This patch allows the VFP support code to run correctly on CPUs
compatible with the common VFP subarchitecture specification (Appendix
B in the ARM ARM v7-A and v7-R edition). It implements support for VFP
subarchitecture 2 while being backwards compatible with
subarchitecture 1.

On VFP subarchitecture 1, the arithmetic exceptions are asynchronous
(or imprecise as described in the old ARM ARM) unless the FPSCR.IXE
bit is 1. The exceptional instructions can be read from FPINST and
FPINST2 registers. With VFP subarchitecture 2, the arithmetic
exceptions can also be synchronous and marked by the FPEXC.DEX bit
(the FPEXC.EX bit is cleared). CPUs implementing the synchronous
arithmetic exceptions don't have the FPINST and FPINST2 registers and
accessing them would trigger and undefined exception.

Note that FPEXC.EX bit has an additional meaning on subarchitecture 1
- if it isn't set, there is no additional information in FPINST and
FPINST2 that needs to be saved at context switch or when lazy-loading
the VFP state of a different thread.

The patch also removes the clearing of the cumulative exception flags in
FPSCR when additional exceptions were raised. It is up to the user
application to clear these bits.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>

This is useful for initial debugging and when CONFIG_DEBUG_LL is set.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>

This function prints the error code returned by execve.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>

Sets ARCH to arm and CROSS_COMPILE to arm-none-linux-gnueabi-.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>

Before transmission of the last word in PIO RX_ONLY mode rx+tx mode
is enabled:

	/* prevent last RX_ONLY read from triggering
	 * more word i/o: switch to rx+tx
	 */
	if (c == 0 && tx == NULL)
		mcspi_write_cs_reg(spi,
				OMAP2_MCSPI_CHCONF0, l);

But because c is decremented after the test, c will never be zero and
rx+tx will not be enabled. This breaks RX_ONLY mode PIO transfers.

Fix it by decrementing c in the beginning of the various I/O loops.
Signed-off-by: Kalle Valo <kalle.valo@nokia.com>
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>