1. 09 Jan, 2009 2 commits
    • 김규원's avatar
      ARM: OMAP3: Mask interrupts when disabling interrupts · 023ae898
      김규원 authored
      By Ingo Molnar, interrupts are not masked by default.
      (refer to 76d21601)
      
      But if interrupts are not masked, the processor can wake up while in
      Suspend-to-RAM state by an external interrupt. For example, if an
      OMAP3 board is connected to Host PC by USB and entered to Suspend-to-RAM
      state, it wake up automatically by M_IRQ_92. The disable_irq() function
      can't disable the interrupt in H/W level, So I modified
      arch/arm/mach-omap2/irq.c
      Signed-off-by: default avatarKim Kyuwon <chammoru@gmail.com>
      Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
      023ae898
    • Aaro Koskinen's avatar
      OMAP2: gptimer min_delta_ns corrected · f2afacf5
      Aaro Koskinen authored
      When 32 kHz timer is used the min_delta_ns should be initialized so
      that it reflects the timer programming cost. A write to the timer
      device will be usually posted, but it takes roughly 3 cycles before
      it is effective. If the timer is reprogrammed before that, the CPU
      will stall until the previous write completes. This was pointed out by
      Richard Woodruff.
      
      Since the lower bound for min_delta_ns is 1000, the change is visible
      only with tick rates less than 3 MHz.
      
      Also note that the old value is incorrect for 32 kHz also due to
      a rounding error, and it can cause the timer queue to hang (due to
      clockevent code trying to program the timer with zero ticks).
      Signed-off-by: default avatarAaro Koskinen <Aaro.Koskinen@nokia.com>
      Reviewed-by: default avatarRichard Woodruff <r-woodruff2@ti.com>
      Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
      f2afacf5
  2. 08 Jan, 2009 9 commits
  3. 07 Jan, 2009 29 commits