Commit 023ae898 authored by 김규원's avatar 김규원 Committed by Tony Lindgren

ARM: OMAP3: Mask interrupts when disabling interrupts

By Ingo Molnar, interrupts are not masked by default.
(refer to 76d21601)

But if interrupts are not masked, the processor can wake up while in
Suspend-to-RAM state by an external interrupt. For example, if an
OMAP3 board is connected to Host PC by USB and entered to Suspend-to-RAM
state, it wake up automatically by M_IRQ_92. The disable_irq() function
can't disable the interrupt in H/W level, So I modified
arch/arm/mach-omap2/irq.c
Signed-off-by: default avatarKim Kyuwon <chammoru@gmail.com>
Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
parent f2afacf5
......@@ -123,6 +123,11 @@ static void omap_unmask_irq(unsigned int irq)
intc_bank_write_reg(1 << irq, &irq_banks[0], INTC_MIR_CLEAR0 + offset);
}
static void omap_disable_irq(unsigned int irq)
{
omap_mask_irq(irq);
}
static void omap_mask_ack_irq(unsigned int irq)
{
omap_mask_irq(irq);
......@@ -134,6 +139,7 @@ static struct irq_chip omap_irq_chip = {
.ack = omap_mask_ack_irq,
.mask = omap_mask_irq,
.unmask = omap_unmask_irq,
.disable = omap_disable_irq,
};
static void __init omap_irq_bank_init_one(struct omap_irq_bank *bank)
......
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