ARMv7: Remove the BTAC/BTB flushing when invalidating the I-cache

I-cache invalidation in __new_context (the ASID-tagged VIVT I-cache
case) also flushes the branch target cache and therefore the explicit
BTAC/BTB flushing is not required.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>

arch/arm/mm/context.c

@@ -51,7 +51,6 @@ void __new_context(struct mm_struct *mm)
 		flush_tlb_all();
 		if (icache_is_vivt_asid_tagged()) {
 			asm("mcr	p15, 0, %0, c7, c5, 0	@ invalidate I-cache\n"
-			    "mcr	p15, 0, %0, c7, c5, 6	@ flush BTAC/BTB\n"
 			    :
 			    : "r" (0));
 			dsb();