Commit ad1e597d authored by Anton Vorontsov's avatar Anton Vorontsov Committed by Linus Torvalds

sdhci-of: cleanup eSDHC's set_clock() a little bit

- Get rid of incomprehensible "if { for { if } }" construction for the
  exponential divisor calculation. The first if statement isn't correct
  at all, since it should check for "host->max_clk / pre_div / 16 >
  clock". The error doesn't cause any bugs because the check in the for
  loop does the right thing, and so the outer check becomes useless;

- For the linear divisor do the same: a single while statement is more
  readable than for + if construction;

- Add dev_dbg() that prints desired and actual clock frequency.
Signed-off-by: default avatarAnton Vorontsov <avorontsov@ru.mvista.com>
Cc: Pierre Ossman <pierre@ossman.eu>
Cc: Kumar Gala <galak@kernel.crashing.org>
Cc: David Vrabel <david.vrabel@csr.com>
Cc: Ben Dooks <ben@fluff.org>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: <linux-mmc@vger.kernel.org>
Signed-off-by: default avatarAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: default avatarLinus Torvalds <torvalds@linux-foundation.org>
parent 8226a219
...@@ -121,8 +121,8 @@ static void esdhc_writeb(struct sdhci_host *host, u8 val, int reg) ...@@ -121,8 +121,8 @@ static void esdhc_writeb(struct sdhci_host *host, u8 val, int reg)
static void esdhc_set_clock(struct sdhci_host *host, unsigned int clock) static void esdhc_set_clock(struct sdhci_host *host, unsigned int clock)
{ {
int div;
int pre_div = 2; int pre_div = 2;
int div = 1;
clrbits32(host->ioaddr + ESDHC_SYSTEM_CONTROL, ESDHC_CLOCK_IPGEN | clrbits32(host->ioaddr + ESDHC_SYSTEM_CONTROL, ESDHC_CLOCK_IPGEN |
ESDHC_CLOCK_HCKEN | ESDHC_CLOCK_PEREN | ESDHC_CLOCK_MASK); ESDHC_CLOCK_HCKEN | ESDHC_CLOCK_PEREN | ESDHC_CLOCK_MASK);
...@@ -130,17 +130,14 @@ static void esdhc_set_clock(struct sdhci_host *host, unsigned int clock) ...@@ -130,17 +130,14 @@ static void esdhc_set_clock(struct sdhci_host *host, unsigned int clock)
if (clock == 0) if (clock == 0)
goto out; goto out;
if (host->max_clk / 16 > clock) { while (host->max_clk / pre_div / 16 > clock && pre_div < 256)
for (; pre_div < 256; pre_div *= 2) { pre_div *= 2;
if (host->max_clk / pre_div < clock * 16)
break;
}
}
for (div = 1; div <= 16; div++) { while (host->max_clk / pre_div / div > clock && div < 16)
if (host->max_clk / (div * pre_div) <= clock) div++;
break;
} dev_dbg(mmc_dev(host->mmc), "desired SD clock: %d, actual: %d\n",
clock, host->max_clk / pre_div / div);
pre_div >>= 1; pre_div >>= 1;
div--; div--;
......
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