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linux
linux-davinci
Commits
5cfb6956
Commit
5cfb6956
authored
Jun 19, 2008
by
Alex Deucher
Committed by
Dave Airlie
Jun 19, 2008
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Plain Diff
drm/radeon: switch IGP gart to use radeon_write_agp_base()
Signed-off-by:
Dave Airlie
<
airlied@redhat.com
>
parent
7ecabc53
Changes
1
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1 changed file
with
4 additions
and
8 deletions
+4
-8
drivers/char/drm/radeon_cp.c
drivers/char/drm/radeon_cp.c
+4
-8
No files found.
drivers/char/drm/radeon_cp.c
View file @
5cfb6956
...
@@ -127,6 +127,9 @@ static void radeon_write_agp_base(drm_radeon_private_t *dev_priv, u64 agp_base)
...
@@ -127,6 +127,9 @@ static void radeon_write_agp_base(drm_radeon_private_t *dev_priv, u64 agp_base)
}
else
if
((
dev_priv
->
flags
&
RADEON_FAMILY_MASK
)
>
CHIP_RV515
)
{
}
else
if
((
dev_priv
->
flags
&
RADEON_FAMILY_MASK
)
>
CHIP_RV515
)
{
R500_WRITE_MCIND
(
R520_MC_AGP_BASE
,
agp_base_lo
);
R500_WRITE_MCIND
(
R520_MC_AGP_BASE
,
agp_base_lo
);
R500_WRITE_MCIND
(
R520_MC_AGP_BASE_2
,
agp_base_hi
);
R500_WRITE_MCIND
(
R520_MC_AGP_BASE_2
,
agp_base_hi
);
}
else
if
((
dev_priv
->
flags
&
RADEON_FAMILY_MASK
)
==
CHIP_RS480
)
{
RADEON_WRITE
(
RADEON_AGP_BASE
,
agp_base_lo
);
RADEON_WRITE
(
RS480_AGP_BASE_2
,
0
);
}
else
{
}
else
{
RADEON_WRITE
(
RADEON_AGP_BASE
,
agp_base_lo
);
RADEON_WRITE
(
RADEON_AGP_BASE
,
agp_base_lo
);
if
((
dev_priv
->
flags
&
RADEON_FAMILY_MASK
)
>=
CHIP_R200
)
if
((
dev_priv
->
flags
&
RADEON_FAMILY_MASK
)
>=
CHIP_R200
)
...
@@ -741,14 +744,7 @@ static void radeon_set_igpgart(drm_radeon_private_t * dev_priv, int on)
...
@@ -741,14 +744,7 @@ static void radeon_set_igpgart(drm_radeon_private_t * dev_priv, int on)
IGP_WRITE_MCIND
(
RS480_AGP_MODE_CNTL
,
((
1
<<
RS480_REQ_TYPE_SNOOP_SHIFT
)
|
IGP_WRITE_MCIND
(
RS480_AGP_MODE_CNTL
,
((
1
<<
RS480_REQ_TYPE_SNOOP_SHIFT
)
|
RS480_REQ_TYPE_SNOOP_DIS
));
RS480_REQ_TYPE_SNOOP_DIS
));
if
((
dev_priv
->
flags
&
RADEON_FAMILY_MASK
)
==
CHIP_RS690
)
{
radeon_write_agp_base
(
dev_priv
,
dev_priv
->
gart_vm_start
);
IGP_WRITE_MCIND
(
RS690_MC_AGP_BASE
,
(
unsigned
int
)
dev_priv
->
gart_vm_start
);
IGP_WRITE_MCIND
(
RS690_MC_AGP_BASE_2
,
0
);
}
else
{
RADEON_WRITE
(
RADEON_AGP_BASE
,
(
unsigned
int
)
dev_priv
->
gart_vm_start
);
RADEON_WRITE
(
RS480_AGP_BASE_2
,
0
);
}
dev_priv
->
gart_size
=
32
*
1024
*
1024
;
dev_priv
->
gart_size
=
32
*
1024
*
1024
;
temp
=
(((
dev_priv
->
gart_vm_start
-
1
+
dev_priv
->
gart_size
)
&
temp
=
(((
dev_priv
->
gart_vm_start
-
1
+
dev_priv
->
gart_size
)
&
...
...
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