Sync latest fd.o libva:master

Signed-off-by: Austin Yuan <shengquan.yuan@intel.com>

Makefile.am

@@ -21,9 +21,21 @@
 # SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 AUTOMAKE_OPTIONS = foreign
-SUBDIRS = src dummy_drv_video test
+
+SUBDIRS = src test
+if BUILD_DUMMY_DRIVER
+SUBDIRS += dummy_drv_video
+endif
+if BUILD_I965_DRIVER
+SUBDIRS += i965_drv_video
+endif
+
+pcfiles = \
+	libva.pc
 
 pkgconfigdir = @pkgconfigdir@
-pkgconfig_DATA = libva.pc
+pkgconfig_DATA = $(pcfiles)
 
 EXTRA_DIST = libva.pc.in
+
+CLEANFILES = $(pcfiles)

configure.ac

@@ -20,12 +20,69 @@
 # TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
 # SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 
+# libva package version number, (as distinct from shared library version)
+m4_define([libva_major_version], [0])
+m4_define([libva_minor_version], [30])
+m4_define([libva_micro_version], [4])
+
+m4_define([libva_version],
+          [libva_major_version.libva_minor_version.libva_micro_version])
+
+# increase this number for each API change
+m4_define([libva_sds_version], [2])
+
+# if the library source code has changed, increment revision
+m4_define([libva_lt_revision], [1])
+# if any interface was added/removed/changed, then inc current, reset revision
+m4_define([libva_lt_current], [0])
+# if any interface was added since last public release, then increment age
+# if any interface was removed since last public release, then set age to 0
+m4_define([libva_lt_age], [0])
+
 AC_PREREQ(2.57)
-AC_INIT([libva], 0.30.4, [waldo.bastian@intel.com], libva)
+AC_INIT([libva], [libva_version], [waldo.bastian@intel.com], libva)
 AC_CONFIG_SRCDIR([Makefile.am])
 AM_INIT_AUTOMAKE([dist-bzip2])
 
-AM_CONFIG_HEADER([src/config.h])
+AM_CONFIG_HEADER([config.h])
+
+LIBVA_MAJOR_VERSION=libva_major_version
+LIBVA_MINOR_VERSION=libva_minor_version
+LIBVA_MICRO_VERSION=libva_micro_version
+LIBVA_VERSION=libva_version
+AC_SUBST(LIBVA_MAJOR_VERSION)
+AC_SUBST(LIBVA_MINOR_VERSION)
+AC_SUBST(LIBVA_MICRO_VERSION)
+AC_SUBST(LIBVA_VERSION)
+
+LIBVA_SDS_VERSION=libva_sds_version
+AC_SUBST(LIBVA_SDS_VERSION)
+
+LIBVA_LT_CURRENT=libva_lt_current
+LIBVA_LT_REV=libva_lt_revision
+LIBVA_LT_AGE=libva_lt_age
+LIBVA_LT_VERSION="$LIBVA_LT_CURRENT:$LIBVA_LT_REV:$LIBVA_LT_AGE"
+LIBVA_LT_LDFLAGS="-version-info $LIBVA_LT_VERSION"
+AC_SUBST(LIBVA_LT_VERSION)
+AC_SUBST(LIBVA_LT_LDFLAGS)
+
+AC_ARG_ENABLE(dummy-driver,
+              [AC_HELP_STRING([--enable-dummy-driver],
+                              [build dummy video driver])],
+              [], [enable_dummy_driver=yes])
+AM_CONDITIONAL(BUILD_DUMMY_DRIVER, test x$enable_dummy_driver = xyes)
+
+AC_ARG_ENABLE(i965-driver,
+              [AC_HELP_STRING([--enable-i965-driver],
+                              [build i965 video driver])],
+              [], [enable_i965_driver=no])
+
+AC_ARG_WITH(drivers-path,
+	    [AC_HELP_STRING([--with-drivers-path=[[path]]], [drivers path])],,
+	    [with_drivers_path="$libdir/dri"])
+
+LIBVA_DRIVERS_PATH="$with_drivers_path"
+AC_SUBST(LIBVA_DRIVERS_PATH)
 
 AC_DISABLE_STATIC
 AC_PROG_LIBTOOL
@@ -36,22 +93,42 @@ AC_SYS_LARGEFILE
 
 PKG_CHECK_MODULES([X11], [x11])
 PKG_CHECK_MODULES([XEXT],[xext])
+PKG_CHECK_MODULES([XFIXES], [xfixes])
 PKG_CHECK_MODULES([DRM], [libdrm])
-PKG_CHECK_MODULES(LIBDRM_DEPS, [libdrm])
+
+PKG_CHECK_MODULES(GEN4ASM, [intel-gen4asm >= 1.0], [gen4asm=yes], [gen4asm=no])
+AM_CONDITIONAL(HAVE_GEN4ASM, test x$gen4asm = xyes)
+
+# Check for libdrm >= 2.4 (needed for i965_drv_video.so)
+if test x$enable_i965_driver = xyes && ! $PKG_CONFIG --atleast-version=2.4 libdrm; then
+    AC_MSG_WARN([libdrm < 2.4 found, disabling build of i965 video driver])
+    enable_i965_driver=no
+fi
+AM_CONDITIONAL(BUILD_I965_DRIVER, test x$enable_i965_driver = xyes)
 
 # We only need the headers, we don't link against the DRM libraries
-LIBVA_CFLAGS="$LIBDRM_DEPS_CFLAGS"
+LIBVA_CFLAGS="$DRM_CFLAGS"
 AC_SUBST(LIBVA_CFLAGS)
 AC_SUBST(LIBVA_LIBS)
 
 pkgconfigdir=${libdir}/pkgconfig
 AC_SUBST(pkgconfigdir)
 
+libvabackendlib=libva.la
+AC_SUBST([libvabackendlib])
+
 AC_OUTPUT([
 	Makefile
 	src/Makefile
-	src/X11/Makefile
+	src/va_version.h
+	src/x11/Makefile
 	dummy_drv_video/Makefile
+	i965_drv_video/Makefile
+	i965_drv_video/shaders/Makefile
+	i965_drv_video/shaders/mpeg2/Makefile
+	i965_drv_video/shaders/mpeg2/vld/Makefile
+	i965_drv_video/shaders/render/Makefile
 	test/Makefile
 	libva.pc
 ])
+

dummy_drv_video/Makefile.am

@@ -21,9 +21,10 @@
 # SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 dummy_drv_video_la_LTLIBRARIES = dummy_drv_video.la
-dummy_drv_video_ladir = /usr/lib/dri
+dummy_drv_video_ladir = @LIBVA_DRIVERS_PATH@
 dummy_drv_video_la_LDFLAGS = -module -avoid-version -no-undefined -Wl,--no-undefined
-dummy_drv_video_la_LIBADD = ../src/libva.la
+dummy_drv_video_la_LIBADD = $(top_srcdir)/src/$(libvabackendlib)
+dummy_drv_video_la_DEPENDENCIES = $(top_srcdir)/src/$(libvabackendlib)
 
 AM_CFLAGS = -I$(top_srcdir)/src -I$(top_srcdir)/../../include/external/ -I$(top_srcdir)/../../include/kmd -DIN_LIBVA
 dummy_drv_video_la_SOURCES = dummy_drv_video.c object_heap.c

dummy_drv_video/dummy_drv_video.c

@@ -1211,15 +1211,15 @@ VAStatus dummy_Terminate( VADriverContextP ctx )
     return VA_STATUS_SUCCESS;
 }
 
-VAStatus __vaDriverInit_0_29(  VADriverContextP ctx )
+VAStatus __vaDriverInit_0_30(  VADriverContextP ctx )
 {
     object_base_p obj;
     int result;
     struct dummy_driver_data *driver_data;
     int i;
 
-    ctx->version_major = 0;
-    ctx->version_minor = 29;
+    ctx->version_major = VA_MAJOR_VERSION;
+    ctx->version_minor = VA_MINOR_VERSION;
     ctx->max_profiles = DUMMY_MAX_PROFILES;
     ctx->max_entrypoints = DUMMY_MAX_ENTRYPOINTS;
     ctx->max_attributes = DUMMY_MAX_CONFIG_ATTRIBUTES;

i965_drv_video/Makefile.am

+# Copyright (c) 2007 Intel Corporation. All Rights Reserved.
+#
+# Permission is hereby granted, free of charge, to any person obtaining a
+# copy of this software and associated documentation files (the
+# "Software"), to deal in the Software without restriction, including
+# without limitation the rights to use, copy, modify, merge, publish,
+# distribute, sub license, and/or sell copies of the Software, and to
+# permit persons to whom the Software is furnished to do so, subject to
+# the following conditions:
+# 
+# The above copyright notice and this permission notice (including the
+# next paragraph) shall be included in all copies or substantial portions
+# of the Software.
+# 
+# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+# OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+# MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
+# IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR
+# ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+# TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+# SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+
+SUBDIRS = shaders
+
+AM_CFLAGS = -Wall -I$(top_srcdir)/src -I$(top_srcdir)/src/x11 @DRM_CFLAGS@ -DIN_LIBVA
+
+i965_drv_video_la_LTLIBRARIES = i965_drv_video.la
+i965_drv_video_ladir = @LIBVA_DRIVERS_PATH@
+i965_drv_video_la_LDFLAGS = -module -avoid-version -no-undefined -Wl,--no-undefined @DRM_LIBS@ -ldrm_intel
+i965_drv_video_la_LIBADD = ../src/libva.la -lpthread
+
+i965_drv_video_la_SOURCES =	\
+	object_heap.c		\
+	intel_batchbuffer.c	\
+	intel_memman.c		\
+	intel_driver.c		\
+	i965_media.c		\
+	i965_media_mpeg2.c	\
+	i965_render.c		\
+	i965_drv_video.c
+
+noinst_HEADERS =                \
+	object_heap.h           \
+	intel_batchbuffer.h     \
+	intel_memman.h          \
+	intel_driver.h          \
+	i965_media.h            \
+	i965_media_mpeg2.h      \
+	i965_render.h           \
+	i965_drv_video.h        \
+	i965_defines.h          \
+	i965_structs.h

i965_drv_video/i965_drv_video.h

+/*
+ * Copyright  2009 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
+ * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR
+ * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors:
+ *    Xiang Haihao <haihao.xiang@intel.com>
+ *    Zou Nan hai <nanhai.zou@intel.com>
+ *
+ */
+
+#ifndef _I965_DRV_VIDEO_H_
+#define _I965_DRV_VIDEO_H_
+
+#include "va.h"
+#include "object_heap.h"
+
+#include "intel_driver.h"
+
+#include "i965_media.h"
+#include "i965_render.h"
+
+#define I965_MAX_PROFILES                       11
+#define I965_MAX_ENTRYPOINTS                    5
+#define I965_MAX_CONFIG_ATTRIBUTES              10
+#define I965_MAX_IMAGE_FORMATS                  10
+#define I965_MAX_SUBPIC_FORMATS                 4
+#define I965_MAX_DISPLAY_ATTRIBUTES             4
+#define I965_STR_VENDOR                         "i965 Driver 0.1"
+
+struct buffer_store
+{
+    unsigned char *buffer;
+    dri_bo *bo;
+    int ref_count;
+};
+    
+struct object_config 
+{
+    struct object_base base;
+    VAProfile profile;
+    VAEntrypoint entrypoint;
+    VAConfigAttrib attrib_list[I965_MAX_CONFIG_ATTRIBUTES];
+    int num_attribs;
+};
+
+struct decode_state
+{
+    struct buffer_store *pic_param;
+    struct buffer_store *slice_param;
+    struct buffer_store *iq_matrix;
+    struct buffer_store *bit_plane;
+    struct buffer_store *slice_data;
+    VASurfaceID current_render_target;
+    int num_slices;
+};
+
+struct object_context 
+{
+    struct object_base base;
+    VAContextID context_id;
+    VAConfigID config_id;
+    VASurfaceID *render_targets;
+    int num_render_targets;
+    int picture_width;
+    int picture_height;
+    int flags;
+    struct decode_state decode_state;
+};
+
+struct object_surface 
+{
+    struct object_base base;
+    VASurfaceStatus status;
+    VASubpictureID subpic;
+	int width;
+    int height;
+    int size;
+    dri_bo *bo;
+};
+
+struct object_buffer 
+{
+    struct object_base base;
+    struct buffer_store *buffer_store;
+    int max_num_elements;
+    int num_elements;
+    int size_element;
+    VABufferType type;
+};
+struct object_image 
+{
+    struct object_base base;
+    int width;
+    int height;
+    int size;
+    dri_bo *bo;
+};
+struct object_subpic 
+{
+    struct object_base base;
+    VAImageID image;
+	int dstx;
+	int dsty;
+	int width;
+	int height;
+	unsigned char palette[3][16];
+	dri_bo *bo;
+};
+
+
+
+struct i965_driver_data 
+{
+    struct intel_driver_data intel;
+    struct object_heap config_heap;
+    struct object_heap context_heap;
+    struct object_heap surface_heap;
+    struct object_heap buffer_heap;
+    struct object_heap image_heap;
+    struct object_heap subpic_heap;
+    struct i965_media_state media_state;
+    struct i965_render_state render_state;
+};
+
+#define NEW_CONFIG_ID() object_heap_allocate(&i965->config_heap);
+#define NEW_CONTEXT_ID() object_heap_allocate(&i965->context_heap);
+#define NEW_SURFACE_ID() object_heap_allocate(&i965->surface_heap);
+#define NEW_BUFFER_ID() object_heap_allocate(&i965->buffer_heap);
+#define NEW_IMAGE_ID() object_heap_allocate(&i965->image_heap);
+#define NEW_SUBPIC_ID() object_heap_allocate(&i965->subpic_heap);
+
+#define CONFIG(id) ((struct object_config *)object_heap_lookup(&i965->config_heap, id))
+#define CONTEXT(id) ((struct object_context *)object_heap_lookup(&i965->context_heap, id))
+#define SURFACE(id) ((struct object_surface *)object_heap_lookup(&i965->surface_heap, id))
+#define BUFFER(id) ((struct object_buffer *)object_heap_lookup(&i965->buffer_heap, id))
+#define IMAGE(id) ((struct object_image *)object_heap_lookup(&i965->image_heap, id))
+#define SUBPIC(id) ((struct object_subpic *)object_heap_lookup(&i965->subpic_heap, id))
+
+#define FOURCC_IA44 0x34344149
+#define FOURCC_AI44 0x34344941
+
+#define STRIDE(w)               (((w) + 0xf) & ~0xf)
+#define SIZE_YUV420(w, h)       (h * (STRIDE(w) + STRIDE(w >> 1)))
+
+static INLINE struct i965_driver_data *
+i965_driver_data(VADriverContextP ctx)
+{
+    return (struct i965_driver_data *)(ctx->pDriverData);
+}
+
+#endif /* _I965_DRV_VIDEO_H_ */

i965_drv_video/i965_media.c

+/*
+ * Copyright  2009 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
+ * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR
+ * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors:
+ *    Xiang Haihao <haihao.xiang@intel.com>
+ *    Zou Nan hai <nanhai.zou@intel.com>
+ *
+ */
+
+#include <stdio.h>
+#include <string.h>
+#include <assert.h>
+
+#include "va_backend.h"
+
+#include "intel_batchbuffer.h"
+#include "intel_driver.h"
+
+#include "i965_defines.h"
+#include "i965_media_mpeg2.h"
+#include "i965_media.h"
+#include "i965_drv_video.h"
+
+static void
+i965_media_pipeline_select(VADriverContextP ctx)
+{
+    BEGIN_BATCH(ctx, 1);
+    OUT_BATCH(ctx, CMD_PIPELINE_SELECT | PIPELINE_SELECT_MEDIA);
+    ADVANCE_BATCH(ctx);
+}
+
+static void
+i965_media_urb_layout(VADriverContextP ctx)
+{
+    struct i965_driver_data *i965 = i965_driver_data(ctx);
+    struct i965_media_state *media_state = &i965->media_state;
+    unsigned int vfe_fence, cs_fence;
+
+    vfe_fence = media_state->urb.cs_start;
+    cs_fence = URB_SIZE((&i965->intel));
+
+    BEGIN_BATCH(ctx, 3);
+    OUT_BATCH(ctx, CMD_URB_FENCE | UF0_VFE_REALLOC | UF0_CS_REALLOC | 1);
+    OUT_BATCH(ctx, 0);
+    OUT_BATCH(ctx, 
+              (vfe_fence << UF2_VFE_FENCE_SHIFT) |      /* VFE_SIZE */
+              (cs_fence << UF2_CS_FENCE_SHIFT));        /* CS_SIZE */
+    ADVANCE_BATCH(ctx);
+}
+
+static void
+i965_media_state_base_address(VADriverContextP ctx)
+{
+    struct i965_driver_data *i965 = i965_driver_data(ctx); 
+
+    if (IS_IGDNG(i965->intel.device_id)) {
+        BEGIN_BATCH(ctx, 8);
+        OUT_BATCH(ctx, CMD_STATE_BASE_ADDRESS | 6);
+        OUT_BATCH(ctx, 0 | BASE_ADDRESS_MODIFY);
+        OUT_BATCH(ctx, 0 | BASE_ADDRESS_MODIFY);
+        OUT_BATCH(ctx, 0 | BASE_ADDRESS_MODIFY);
+        OUT_BATCH(ctx, 0 | BASE_ADDRESS_MODIFY);
+        OUT_BATCH(ctx, 0 | BASE_ADDRESS_MODIFY);
+        OUT_BATCH(ctx, 0 | BASE_ADDRESS_MODIFY);
+        OUT_BATCH(ctx, 0 | BASE_ADDRESS_MODIFY);
+        ADVANCE_BATCH(ctx);
+    } else {
+        BEGIN_BATCH(ctx, 6);
+        OUT_BATCH(ctx, CMD_STATE_BASE_ADDRESS | 4);
+        OUT_BATCH(ctx, 0 | BASE_ADDRESS_MODIFY);
+        OUT_BATCH(ctx, 0 | BASE_ADDRESS_MODIFY);
+        OUT_BATCH(ctx, 0 | BASE_ADDRESS_MODIFY);
+        OUT_BATCH(ctx, 0 | BASE_ADDRESS_MODIFY);
+        OUT_BATCH(ctx, 0 | BASE_ADDRESS_MODIFY);
+        ADVANCE_BATCH(ctx);
+    }
+}
+
+static void
+i965_media_state_pointers(VADriverContextP ctx)
+{
+    struct i965_driver_data *i965 = i965_driver_data(ctx);
+    struct i965_media_state *media_state = &i965->media_state;
+
+    BEGIN_BATCH(ctx, 3);
+    OUT_BATCH(ctx, CMD_MEDIA_STATE_POINTERS | 1);
+
+    if (media_state->extended_state.enabled)
+        OUT_RELOC(ctx, media_state->extended_state.bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 1);
+    else
+        OUT_BATCH(ctx, 0);
+
+    OUT_RELOC(ctx, media_state->vfe_state.bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 0);
+    ADVANCE_BATCH(ctx);
+}
+
+static void 
+i965_media_cs_urb_layout(VADriverContextP ctx)
+{
+    struct i965_driver_data *i965 = i965_driver_data(ctx);
+    struct i965_media_state *media_state = &i965->media_state;
+
+    BEGIN_BATCH(ctx, 2);
+    OUT_BATCH(ctx, CMD_CS_URB_STATE | 0);
+    OUT_BATCH(ctx,
+              ((media_state->urb.size_cs_entry - 1) << 4) |     /* URB Entry Allocation Size */
+              (media_state->urb.num_cs_entries << 0));          /* Number of URB Entries */
+    ADVANCE_BATCH(ctx);
+}
+
+static void 
+i965_media_pipeline_state(VADriverContextP ctx)
+{
+    i965_media_state_base_address(ctx);
+    i965_media_state_pointers(ctx);
+    i965_media_cs_urb_layout(ctx);
+}
+
+static void
+i965_media_constant_buffer(VADriverContextP ctx, struct decode_state *decode_state)
+{
+    struct i965_driver_data *i965 = i965_driver_data(ctx);
+    struct i965_media_state *media_state = &i965->media_state;
+
+    BEGIN_BATCH(ctx, 2);
+    OUT_BATCH(ctx, CMD_CONSTANT_BUFFER | (1 << 8) | (2 - 2));
+    OUT_RELOC(ctx, media_state->curbe.bo,
+              I915_GEM_DOMAIN_INSTRUCTION, 0,
+              media_state->urb.size_cs_entry - 1);
+    ADVANCE_BATCH(ctx);    
+}
+
+static void
+i965_media_pipeline_setup(VADriverContextP ctx, struct decode_state *decode_state)
+{
+    struct i965_driver_data *i965 = i965_driver_data(ctx);
+    struct i965_media_state *media_state = &i965->media_state;
+
+    intel_batchbuffer_start_atomic(ctx, 0x1000);
+    intel_batchbuffer_emit_mi_flush(ctx);                       /* step 1 */
+    i965_media_pipeline_select(ctx);                            /* step 2 */
+    i965_media_urb_layout(ctx);                                 /* step 3 */
+    i965_media_pipeline_state(ctx);                             /* step 4 */
+    i965_media_constant_buffer(ctx, decode_state);              /* step 5 */
+    assert(media_state->media_objects);
+    media_state->media_objects(ctx, decode_state);              /* step 6 */
+    intel_batchbuffer_end_atomic(ctx);
+}
+
+static void 
+i965_media_decode_init(VADriverContextP ctx, VAProfile profile)
+{
+    int i;
+    struct i965_driver_data *i965 = i965_driver_data(ctx);
+    struct i965_media_state *media_state = &i965->media_state;
+    dri_bo *bo;
+
+    /* constant buffer */
+    dri_bo_unreference(media_state->curbe.bo);
+    bo = dri_bo_alloc(i965->intel.bufmgr,
+                      "constant buffer",
+                      4096, 64);
+    assert(bo);
+    media_state->curbe.bo = bo;
+
+    /* surface state */
+    for (i = 0; i < MAX_MEDIA_SURFACES; i++) {
+        dri_bo_unreference(media_state->surface_state[i].bo);
+        media_state->surface_state[i].bo = NULL;
+    }
+
+    /* binding table */
+    dri_bo_unreference(media_state->binding_table.bo);
+    bo = dri_bo_alloc(i965->intel.bufmgr, 
+                      "binding table",
+                      MAX_MEDIA_SURFACES * sizeof(unsigned int), 32);
+    assert(bo);
+    media_state->binding_table.bo = bo;
+
+    /* interface descriptor remapping table */
+    dri_bo_unreference(media_state->idrt.bo);
+    bo = dri_bo_alloc(i965->intel.bufmgr, 
+                      "interface discriptor", 
+                      MAX_INTERFACE_DESC * sizeof(struct i965_interface_descriptor), 16);
+    assert(bo);
+    media_state->idrt.bo = bo;
+
+    /* vfe state */
+    dri_bo_unreference(media_state->vfe_state.bo);
+    bo = dri_bo_alloc(i965->intel.bufmgr, 
+                      "vfe state", 
+                      sizeof(struct i965_vfe_state), 32);
+    assert(bo);
+    media_state->vfe_state.bo = bo;
+
+    /* extended state */
+    media_state->extended_state.enabled = 0;
+
+    switch (profile) {
+    case VAProfileMPEG2Simple:
+    case VAProfileMPEG2Main:
+        i965_media_mpeg2_decode_init(ctx);
+        break;
+
+    default:
+        assert(0);
+        break;
+    }
+}
+
+void 
+i965_media_decode_picture(VADriverContextP ctx, 
+                          VAProfile profile, 
+                          struct decode_state *decode_state)
+{
+    struct i965_driver_data *i965 = i965_driver_data(ctx);
+    struct i965_media_state *media_state = &i965->media_state;
+
+    i965_media_decode_init(ctx, profile);
+    assert(media_state->states_setup);
+    media_state->states_setup(ctx, decode_state);
+    i965_media_pipeline_setup(ctx, decode_state);
+    intel_batchbuffer_flush(ctx);
+}
+
+Bool 
+i965_media_init(VADriverContextP ctx)
+{
+    i965_media_mpeg2_init(ctx);
+    return True;
+}
+
+Bool 
+i965_media_terminate(VADriverContextP ctx)
+{
+    struct i965_driver_data *i965 = i965_driver_data(ctx);
+    struct i965_media_state *media_state = &i965->media_state;
+    int i;
+
+    for (i = 0; i < MAX_MEDIA_SURFACES; i++) {
+        dri_bo_unreference(media_state->surface_state[i].bo);
+        media_state->surface_state[i].bo = NULL;
+    }
+    
+    dri_bo_unreference(media_state->extended_state.bo);
+    media_state->extended_state.bo = NULL;
+
+    dri_bo_unreference(media_state->vfe_state.bo);
+    media_state->vfe_state.bo = NULL;
+
+    dri_bo_unreference(media_state->idrt.bo);
+    media_state->idrt.bo = NULL;
+
+    dri_bo_unreference(media_state->binding_table.bo);
+    media_state->binding_table.bo = NULL;
+
+    dri_bo_unreference(media_state->curbe.bo);
+    media_state->curbe.bo = NULL;
+
+    i965_media_mpeg2_ternimate(ctx);
+    return True;
+}
+

i965_drv_video/i965_media.h

+/*
+ * Copyright © 2009 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
+ * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR
+ * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors:
+ *    Xiang Haihao <haihao.xiang@intel.com>
+ *    Zou Nan hai <nanhai.zou@intel.com>
+ *
+ */
+
+#ifndef _I965_MEDIA_H_
+#define _I965_MEDIA_H_
+
+#include <xf86drm.h>
+#include <drm.h>
+#include <i915_drm.h>
+#include <intel_bufmgr.h>
+
+#include "i965_structs.h"
+
+#define MAX_INTERFACE_DESC      16
+#define MAX_MEDIA_SURFACES      32
+
+#define MPEG_TOP_FIELD		1
+#define MPEG_BOTTOM_FIELD	2
+#define MPEG_FRAME		3
+
+struct decode_state;
+
+struct media_kernel 
+{
+    char *name;
+    int interface;
+    unsigned int (*bin)[4];
+    int size;
+    dri_bo *bo;
+};
+
+struct i965_media_state 
+{
+    struct {
+        dri_bo *bo;
+    } surface_state[MAX_MEDIA_SURFACES];
+
+    struct {
+        dri_bo *bo;
+    } binding_table;
+
+    struct {
+        dri_bo *bo;
+    } idrt;  /* interface descriptor remap table */
+
+    struct {
+        dri_bo *bo;
+        int enabled;
+    } extended_state;
+
+    struct {
+        dri_bo *bo;
+    } vfe_state;
+
+    struct {
+        dri_bo *bo;
+    } curbe;
+
+    struct {
+        unsigned int vfe_start;
+        unsigned int cs_start;
+
+        unsigned int num_vfe_entries;
+        unsigned int num_cs_entries;
+
+        unsigned int size_vfe_entry;
+        unsigned int size_cs_entry;
+    } urb;
+
+    void (*states_setup)(VADriverContextP ctx, struct decode_state *decode_state);
+    void (*media_objects)(VADriverContextP ctx, struct decode_state *decode_state);
+};
+
+Bool i965_media_init(VADriverContextP ctx);
+Bool i965_media_terminate(VADriverContextP ctx);
+void i965_media_decode_picture(VADriverContextP ctx, 
+                               VAProfile profile, 
+                               struct decode_state *decode_state);
+#endif /* _I965_MEDIA_H_ */

i965_drv_video/i965_media_mpeg2.h

+/*
+ * Copyright © 2009 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
+ * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR
+ * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors:
+ *    Xiang Haihao <haihao.xiang@intel.com>
+ *    Zou Nan hai <nanhai.zou@intel.com>
+ *
+ */
+
+#ifndef _I965_MEDIA_MPEG2_H_
+#define _I965_MEDIA_MPEG2_H_
+
+#include <xf86drm.h>
+#include <drm.h>
+#include <i915_drm.h>
+#include <intel_bufmgr.h>
+
+#include "i965_structs.h"
+
+struct decode_state;
+
+Bool i965_media_mpeg2_init(VADriverContextP ctx);
+Bool i965_media_mpeg2_ternimate(VADriverContextP ctx);
+void i965_media_mpeg2_decode_init(VADriverContextP ctx);
+
+#endif /* _I965_MEDIA_MPEG2_H_ */

i965_drv_video/i965_render.h

+/*
+ * Copyright © 2006 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ *
+ * Authors:
+ *    Xiang Haihao <haihao.xiang@intel.com>
+ *
+ */
+
+#ifndef _I965_RENDER_H_
+#define _I965_RENDER_H_
+
+#define MAX_RENDER_SURFACES     16
+#define MAX_SAMPLERS            16
+
+struct i965_render_state
+{
+    struct {
+        dri_bo *vertex_buffer;
+    } vb;
+
+    struct {
+        dri_bo *state;
+    } vs;
+    
+    struct {
+        dri_bo *state;
+        dri_bo *prog;
+    } sf;
+
+    struct {
+        int sampler_count;
+        dri_bo *sampler;
+        dri_bo *surface[MAX_RENDER_SURFACES];
+        dri_bo *binding_table;
+        dri_bo *state;
+        dri_bo *prog;
+    } wm;
+
+    struct {
+        dri_bo *state;
+        dri_bo *viewport;
+    } cc;
+
+    struct intel_region *draw_region;
+};
+
+Bool i965_render_init(VADriverContextP ctx);
+Bool i965_render_terminate(VADriverContextP ctx);
+void i965_render_put_surface(VADriverContextP ctx,
+                             VASurfaceID surface,
+                             short srcx,
+                             short srcy,
+                             unsigned short srcw,
+                             unsigned short srch,
+                             short destx,
+                             short desty,
+                             unsigned short destw,
+                             unsigned short desth);
+
+
+void
+i965_render_put_subpic(VADriverContextP ctx,
+                        VASurfaceID surface,
+                        short srcx,
+                        short srcy,
+                        unsigned short srcw,
+                        unsigned short srch,
+                        short destx,
+                        short desty,
+                        unsigned short destw,
+                        unsigned short desth);
+#endif /* _I965_RENDER_H_ */

i965_drv_video/intel_batchbuffer.c

+/**************************************************************************                                                                                  
+ *                                                                                                                                                           
+ * Copyright 2006 Tungsten Graphics, Inc., Cedar Park, Texas.                                                                                                
+ * All Rights Reserved.                                                                                                                                      
+ *                                                                                                                                                           
+ * Permission is hereby granted, free of charge, to any person obtaining a                                                                                   
+ * copy of this software and associated documentation files (the                                                                                             
+ * "Software"), to deal in the Software without restriction, including                                                                                       
+ * without limitation the rights to use, copy, modify, merge, publish,                                                                                       
+ * distribute, sub license, and/or sell copies of the Software, and to                                                                                       
+ * permit persons to whom the Software is furnished to do so, subject to                                                                                     
+ * the following conditions:                                                                                                                                 
+ *                                                                                                                                                           
+ * The above copyright notice and this permission notice (including the                                                                                      
+ * next paragraph) shall be included in all copies or substantial portions                                                                                   
+ * of the Software.                                                                                                                                          
+ *                                                                                                                                                           
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS                                                                                   
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF                                                                                                
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.                                                                                   
+ * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR                                                                                    
+ * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,                                                                                  
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE                                                                                         
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.                                                                                                    
+ *                                                                                                                                                           
+ **************************************************************************/      
+
+#include <string.h>
+#include <assert.h>
+
+#include "va_backend.h"
+
+#include "intel_batchbuffer.h"
+
+static void 
+intel_batchbuffer_reset(struct intel_batchbuffer *batch)
+{
+    struct intel_driver_data *intel = batch->intel; 
+
+    if (batch->buffer != NULL) {
+        dri_bo_unreference(batch->buffer);
+        batch->buffer = NULL;
+    }
+
+    batch->buffer = dri_bo_alloc(intel->bufmgr, "batch buffer", 
+                                 BATCH_SIZE, 0x1000);
+
+    assert(batch->buffer);
+    dri_bo_map(batch->buffer, 1);
+    batch->map = batch->buffer->virtual;
+    batch->size = BATCH_SIZE;
+    batch->ptr = batch->map;
+    batch->atomic = 0;
+}
+
+Bool 
+intel_batchbuffer_init(struct intel_driver_data *intel)
+{
+    intel->batch = calloc(1, sizeof(*(intel->batch)));
+
+    assert(intel->batch);
+    intel->batch->intel = intel;
+    intel_batchbuffer_reset(intel->batch);
+
+    return True;
+}
+
+Bool
+intel_batchbuffer_terminate(struct intel_driver_data *intel)
+{
+    if (intel->batch) {
+        if (intel->batch->map) {
+            dri_bo_unmap(intel->batch->buffer);
+            intel->batch->map = NULL;
+        }
+
+        dri_bo_unreference(intel->batch->buffer);
+        free(intel->batch);
+        intel->batch = NULL;
+    }
+
+    return True;
+}
+
+Bool 
+intel_batchbuffer_flush(VADriverContextP ctx)
+{
+    struct intel_driver_data *intel = intel_driver_data(ctx);
+    struct intel_batchbuffer *batch = intel->batch;
+    unsigned int used = batch->ptr - batch->map;
+    int is_locked = intel->locked;
+
+    if (used == 0) {
+        return True;
+    }
+
+    if ((used & 4) == 0) {
+        *(unsigned int*)batch->ptr = 0;
+        batch->ptr += 4;
+    }
+
+    *(unsigned int*)batch->ptr = MI_BATCH_BUFFER_END;
+    batch->ptr += 4;
+    dri_bo_unmap(batch->buffer);
+    used = batch->ptr - batch->map;
+
+    if (!is_locked)
+        intel_lock_hardware(ctx);
+
+    dri_bo_exec(batch->buffer, used, 0, 0, 0);
+
+    if (!is_locked)
+        intel_unlock_hardware(ctx);
+
+    intel_batchbuffer_reset(intel->batch);
+
+    return True;
+}
+
+static unsigned int
+intel_batchbuffer_space(struct intel_batchbuffer *batch)
+{
+    return (batch->size - BATCH_RESERVED) - (batch->ptr - batch->map);
+}
+
+void 
+intel_batchbuffer_emit_dword(VADriverContextP ctx, unsigned int x)
+{
+    struct intel_driver_data *intel = intel_driver_data(ctx);
+    struct intel_batchbuffer *batch = intel->batch;
+
+    assert(intel_batchbuffer_space(batch) >= 4);
+    *(unsigned int*)batch->ptr = x;
+    batch->ptr += 4;
+}
+
+void 
+intel_batchbuffer_emit_reloc(VADriverContextP ctx, dri_bo *bo, 
+                             uint32_t read_domains, uint32_t write_domains, 
+                             uint32_t delta)
+{
+    struct intel_driver_data *intel = intel_driver_data(ctx);
+    struct intel_batchbuffer *batch = intel->batch;
+
+    assert(batch->ptr - batch->map < batch->size);
+    dri_bo_emit_reloc(batch->buffer, read_domains, write_domains,
+                      delta, batch->ptr - batch->map, bo);
+    intel_batchbuffer_emit_dword(ctx, bo->offset + delta);
+}
+
+void 
+intel_batchbuffer_require_space(VADriverContextP ctx, unsigned int size)
+{
+    struct intel_driver_data *intel = intel_driver_data(ctx);
+    struct intel_batchbuffer *batch = intel->batch;
+
+    assert(size < batch->size - 8);
+
+    if (intel_batchbuffer_space(batch) < size) {
+        intel_batchbuffer_flush(ctx);
+    }
+}
+
+void 
+intel_batchbuffer_data(VADriverContextP ctx, void *data, unsigned int size)
+{
+    struct intel_driver_data *intel = intel_driver_data(ctx);
+    struct intel_batchbuffer *batch = intel->batch;
+
+    assert((size & 3) == 0);
+    intel_batchbuffer_require_space(ctx, size);
+
+    assert(batch->ptr);
+    memcpy(batch->ptr, data, size);
+    batch->ptr += size;
+}
+
+void
+intel_batchbuffer_emit_mi_flush(VADriverContextP ctx)
+{
+    intel_batchbuffer_require_space(ctx, 4);
+    intel_batchbuffer_emit_dword(ctx, MI_FLUSH | STATE_INSTRUCTION_CACHE_INVALIDATE);
+}
+
+void
+intel_batchbuffer_start_atomic(VADriverContextP ctx, unsigned int size)
+{
+    struct intel_driver_data *intel = intel_driver_data(ctx);
+    struct intel_batchbuffer *batch = intel->batch;
+
+    assert(!batch->atomic);
+    intel_batchbuffer_require_space(ctx, size);
+    batch->atomic = 1;
+}
+
+void
+intel_batchbuffer_end_atomic(VADriverContextP ctx)
+{
+    struct intel_driver_data *intel = intel_driver_data(ctx);
+    struct intel_batchbuffer *batch = intel->batch;
+
+    assert(batch->atomic);
+    batch->atomic = 0;
+}

i965_drv_video/intel_batchbuffer.h

+#ifndef _INTEL_BATCHBUFFER_H_
+#define _INTEL_BATCHBUFFER_H_
+
+#include <xf86drm.h>
+#include <drm.h>
+#include <i915_drm.h>
+#include <intel_bufmgr.h>
+
+#include "intel_driver.h"
+
+struct intel_batchbuffer 
+{
+    struct intel_driver_data *intel;
+    dri_bo *buffer;
+    unsigned int size;
+    unsigned char *map;
+    unsigned char *ptr;
+    int atomic;
+};
+
+Bool intel_batchbuffer_init(struct intel_driver_data *intel);
+Bool intel_batchbuffer_terminate(struct intel_driver_data *intel);
+void intel_batchbuffer_emit_dword(VADriverContextP ctx, unsigned int x);
+void intel_batchbuffer_emit_reloc(VADriverContextP ctx, dri_bo *bo, 
+                                  uint32_t read_domains, uint32_t write_domains, 
+                                  uint32_t delta);
+void intel_batchbuffer_require_space(VADriverContextP ctx, unsigned int size);
+void intel_batchbuffer_data(VADriverContextP ctx, void *data, unsigned int size);
+void intel_batchbuffer_emit_mi_flush(VADriverContextP ctx);
+void intel_batchbuffer_start_atomic(VADriverContextP ctx, unsigned int size);
+void intel_batchbuffer_end_atomic(VADriverContextP ctx);
+Bool intel_batchbuffer_flush(VADriverContextP ctx);
+
+#define BEGIN_BATCH(ctx, n) do {                                \
+   intel_batchbuffer_require_space(ctx, (n) * 4);               \
+} while (0)
+
+#define OUT_BATCH(ctx, d) do {                                  \
+   intel_batchbuffer_emit_dword(ctx, d);                        \
+} while (0)
+
+#define OUT_RELOC(ctx, bo, read_domains, write_domain, delta) do {      \
+   assert((delta) >= 0);                                                \
+   intel_batchbuffer_emit_reloc(ctx, bo,                                \
+                                read_domains, write_domain, delta);     \
+} while (0)
+
+#define ADVANCE_BATCH(ctx) do {                                         \
+} while (0)
+
+#endif /* _INTEL_BATCHBUFFER_H_ */

i965_drv_video/intel_driver.c

+/*
+ * Copyright  2009 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
+ * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR
+ * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors:
+ *    Xiang Haihao <haihao.xiang@intel.com>
+ *    Zou Nan hai <nanhai.zou@intel.com>
+ *
+ */
+
+#include <assert.h>
+
+#include "va_dricommon.h"
+
+#include "intel_batchbuffer.h"
+#include "intel_memman.h"
+#include "intel_driver.h"
+
+static Bool
+intel_driver_get_param(struct intel_driver_data *intel, int param, int *value)
+{
+   int ret;
+   struct drm_i915_getparam gp;
+
+   gp.param = param;
+   gp.value = value;
+
+   ret = drmCommandWriteRead(intel->fd, DRM_I915_GETPARAM, &gp, sizeof(gp));
+   assert(ret == 0);
+
+   return True;
+}
+
+Bool 
+intel_driver_init(VADriverContextP ctx)
+{
+    struct intel_driver_data *intel = intel_driver_data(ctx);
+    struct dri_state *dri_state = (struct dri_state *)ctx->dri_state;
+
+    assert(dri_state);
+    assert(dri_state->driConnectedFlag == VA_DRI2 || 
+           dri_state->driConnectedFlag == VA_DRI1);
+
+    intel->fd = dri_state->fd;
+    intel->dri2Enabled = (dri_state->driConnectedFlag == VA_DRI2);
+
+    if (!intel->dri2Enabled) {
+        drm_sarea_t *pSAREA;
+
+        pSAREA = (drm_sarea_t *)dri_state->pSAREA;
+        intel->hHWContext = dri_state->hwContext;
+        intel->driHwLock = (drmLock *)(&pSAREA->lock);
+        intel->pPrivSarea = (void *)pSAREA + sizeof(drm_sarea_t);
+    }
+
+    intel->locked = 0;
+    pthread_mutex_init(&intel->ctxmutex, NULL);
+
+    intel_driver_get_param(intel, I915_PARAM_CHIPSET_ID, &intel->device_id);
+    intel_memman_init(intel);
+    intel_batchbuffer_init(intel);
+
+    return True;
+}
+
+Bool 
+intel_driver_terminate(VADriverContextP ctx)
+{
+    struct intel_driver_data *intel = intel_driver_data(ctx);
+
+    intel_memman_terminate(intel);
+    intel_batchbuffer_terminate(intel);
+
+    pthread_mutex_destroy(&intel->ctxmutex);
+
+    return True;
+}
+
+void 
+intel_lock_hardware(VADriverContextP ctx)
+{
+    struct intel_driver_data *intel = intel_driver_data(ctx);
+    char __ret = 0;
+
+    PPTHREAD_MUTEX_LOCK();
+
+    assert(!intel->locked);
+
+    if (!intel->dri2Enabled) {
+        DRM_CAS(intel->driHwLock, 
+                intel->hHWContext,
+                (DRM_LOCK_HELD|intel->hHWContext),
+                __ret);
+
+        if (__ret) {
+            drmGetLock(intel->fd, intel->hHWContext, 0);
+        }	
+    }
+
+    intel->locked = 1;
+}
+
+void 
+intel_unlock_hardware(VADriverContextP ctx)
+{
+    struct intel_driver_data *intel = intel_driver_data(ctx);
+
+    if (!intel->dri2Enabled) {
+        DRM_UNLOCK(intel->fd, 
+                   intel->driHwLock,
+                   intel->hHWContext);
+    }
+
+    intel->locked = 0;
+    PPTHREAD_MUTEX_UNLOCK();
+}

i965_drv_video/intel_driver.h

+#ifndef _INTEL_DRIVER_H_
+#define _INTEL_DRIVER_H_
+
+#include <pthread.h>
+#include <signal.h>
+
+#include <xf86drm.h>
+#include <drm.h>
+#include <i915_drm.h>
+#include <intel_bufmgr.h>
+
+#include "va_backend.h"
+
+#if defined(__GNUC__)
+#define INLINE __inline__
+#else
+#define INLINE
+#endif
+
+#define BATCH_SIZE      0x10000
+#define BATCH_RESERVED  0x10
+
+#define CMD_MI                                  (0x0 << 29)
+#define CMD_2D                                  (0x2 << 29)
+
+#define MI_NOOP                                 (CMD_MI | 0)
+
+#define MI_BATCH_BUFFER_END                     (CMD_MI | (0xA << 23))
+
+#define MI_FLUSH                                (CMD_MI | (0x4 << 23))
+#define STATE_INSTRUCTION_CACHE_INVALIDATE      (0x1 << 0)
+
+#define XY_COLOR_BLT_CMD                        (CMD_2D | (0x50 << 22) | 0x04)
+#define XY_COLOR_BLT_WRITE_ALPHA                (1 << 21)
+#define XY_COLOR_BLT_WRITE_RGB                  (1 << 20)
+#define XY_COLOR_BLT_DST_TILED                  (1 << 11)
+
+/* BR13 */
+#define BR13_565                                (0x1 << 24)
+#define BR13_8888                               (0x3 << 24)
+
+struct intel_batchbuffer;
+
+#define ALIGN(i, n)    (((i) + (n) - 1) & ~((n) - 1))
+#define MIN(a, b) ((a) < (b) ? (a) : (b))
+
+#define SET_BLOCKED_SIGSET()   do {     \
+        sigset_t bl_mask;               \
+        sigfillset(&bl_mask);           \
+        sigdelset(&bl_mask, SIGFPE);    \
+        sigdelset(&bl_mask, SIGILL);    \
+        sigdelset(&bl_mask, SIGSEGV);   \
+        sigdelset(&bl_mask, SIGBUS);    \
+        sigdelset(&bl_mask, SIGKILL);   \
+        pthread_sigmask(SIG_SETMASK, &bl_mask, &intel->sa_mask); \
+    } while (0)
+
+#define RESTORE_BLOCKED_SIGSET() do {    \
+        pthread_sigmask(SIG_SETMASK, &intel->sa_mask, NULL); \
+    } while (0)
+
+#define PPTHREAD_MUTEX_LOCK() do {             \
+        SET_BLOCKED_SIGSET();                  \
+        pthread_mutex_lock(&intel->ctxmutex);       \
+    } while (0)
+
+#define PPTHREAD_MUTEX_UNLOCK() do {           \
+        pthread_mutex_unlock(&intel->ctxmutex);     \
+        RESTORE_BLOCKED_SIGSET();              \
+    } while (0)
+
+struct intel_driver_data 
+{
+    int fd;
+    int device_id;
+
+    int dri2Enabled;
+    drm_context_t hHWContext;
+    drm_i915_sarea_t *pPrivSarea;
+    drmLock *driHwLock;
+
+    sigset_t sa_mask;
+    pthread_mutex_t ctxmutex;
+    int locked;
+
+    struct intel_batchbuffer *batch;
+    dri_bufmgr *bufmgr;
+};
+
+Bool intel_driver_init(VADriverContextP ctx);
+Bool intel_driver_terminate(VADriverContextP ctx);
+void intel_lock_hardware(VADriverContextP ctx);
+void intel_unlock_hardware(VADriverContextP ctx);
+
+static INLINE struct intel_driver_data *
+intel_driver_data(VADriverContextP ctx)
+{
+    return (struct intel_driver_data *)ctx->pDriverData;
+}
+
+struct intel_region
+{
+    int x;
+    int y;
+    unsigned int width;
+    unsigned int height;
+    unsigned int cpp;
+    unsigned int pitch;
+    unsigned int tiling;
+    unsigned int swizzle;
+    dri_bo *bo;
+};
+
+#define PCI_CHIP_GM45_GM                0x2A42
+#define PCI_CHIP_IGD_E_G                0x2E02
+#define PCI_CHIP_Q45_G                  0x2E12
+#define PCI_CHIP_G45_G                  0x2E22
+#define PCI_CHIP_G41_G                  0x2E32
+
+#define PCI_CHIP_IGDNG_D_G              0x0042
+#define PCI_CHIP_IGDNG_M_G              0x0046
+
+#define IS_G45(devid)           (devid == PCI_CHIP_IGD_E_G || \
+                                 devid == PCI_CHIP_Q45_G || \
+                                 devid == PCI_CHIP_G45_G || \
+                                 devid == PCI_CHIP_G41_G)
+#define IS_GM45(devid)          (devid == PCI_CHIP_GM45_GM)
+#define IS_G4X(devid)		(IS_G45(devid) || IS_GM45(devid))
+
+#define IS_IGDNG_D(devid)       (devid == PCI_CHIP_IGDNG_D_G)
+#define IS_IGDNG_M(devid)       (devid == PCI_CHIP_IGDNG_M_G)
+#define IS_IGDNG(devid)         (IS_IGDNG_D(devid) || IS_IGDNG_M(devid))
+
+#endif /* _INTEL_DRIVER_H_ */

i965_drv_video/intel_memman.c

+/*
+ * Copyright © 2009 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
+ * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR
+ * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors:
+ *    Xiang Haihao <haihao.xiang@intel.com>
+ *    Zou Nan hai <nanhai.zou@intel.com>
+ *
+ */
+
+#include <assert.h>
+
+#include "intel_driver.h"
+
+Bool 
+intel_memman_init(struct intel_driver_data *intel)
+{
+    intel->bufmgr = intel_bufmgr_gem_init(intel->fd, BATCH_SIZE);
+    assert(intel->bufmgr);
+    intel_bufmgr_gem_enable_reuse(intel->bufmgr);
+
+    return True;
+}
+
+Bool 
+intel_memman_terminate(struct intel_driver_data *intel)
+{
+    return True;
+}

i965_drv_video/intel_memman.h

+#ifndef _INTEL_MEMMAN_H_
+#define _INTEL_MEMMAN_H_
+
+Bool intel_memman_init(struct intel_driver_data *intel);
+Bool intel_memman_terminate(struct intel_driver_data *intel);
+
+#endif /* _INTEL_MEMMAN_H_ */

i965_drv_video/object_heap.h

+/*
+ * Copyright (c) 2007 Intel Corporation. All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ * 
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ * 
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
+ * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR
+ * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#ifndef _OBJECT_HEAP_H_
+#define _OBJECT_HEAP_H_
+
+#define OBJECT_HEAP_OFFSET_MASK		0x7F000000
+#define OBJECT_HEAP_ID_MASK			0x00FFFFFF
+
+typedef struct object_base *object_base_p;
+typedef struct object_heap *object_heap_p;
+
+struct object_base {
+    int id;
+    int next_free;
+};
+
+struct object_heap {
+    int	object_size;
+    int id_offset;
+    void *heap_index;
+    int next_free;
+    int heap_size;
+    int heap_increment;
+};
+
+typedef int object_heap_iterator;
+
+/*
+ * Return 0 on success, -1 on error
+ */
+int object_heap_init( object_heap_p heap, int object_size, int id_offset);
+
+/*
+ * Allocates an object
+ * Returns the object ID on success, returns -1 on error
+ */
+int object_heap_allocate( object_heap_p heap );
+
+/*
+ * Lookup an allocated object by object ID
+ * Returns a pointer to the object on success, returns NULL on error
+ */
+object_base_p object_heap_lookup( object_heap_p heap, int id );
+
+/*
+ * Iterate over all objects in the heap.
+ * Returns a pointer to the first object on the heap, returns NULL if heap is empty.
+ */
+object_base_p object_heap_first( object_heap_p heap, object_heap_iterator *iter );
+
+/*
+ * Iterate over all objects in the heap.
+ * Returns a pointer to the next object on the heap, returns NULL if heap is empty.
+ */
+object_base_p object_heap_next( object_heap_p heap, object_heap_iterator *iter );
+
+/*
+ * Frees an object
+ */
+void object_heap_free( object_heap_p heap, object_base_p obj );
+
+/*
+ * Destroys a heap, the heap must be empty.
+ */
+void object_heap_destroy( object_heap_p heap );
+
+#endif /* _OBJECT_HEAP_H_ */

i965_drv_video/shaders/Makefile.am

+SUBDIRS = mpeg2 render

i965_drv_video/shaders/mpeg2/Makefile.am

+SUBDIRS = vld

i965_drv_video/shaders/mpeg2/vld/do_iq_non_intra.g4i

+/*
+ * Copyright © 2009 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ * Author:
+ *    Zou Nan hai <nanhai.zou@intel.com>
+ *    Yan Li <li.l.yan@intel.com>
+ *    Liu Xi bin<xibin.liu@intel.com>
+ */
+/* GRF allocation:
+   g1~g30: constant buffer
+           g1~g2:intra IQ matrix
+           g3~g4:non intra IQ matrix
+           g5~g20:IDCT table 
+   g112~g115: intra IQ matrix in UW format (in order to use instruction compress), copys from g1~g2
+   g[a0.0]:DCT data of a block
+   g125:   ip before jump
+   F''[v][u]=(((QF[v][u]*2)+Sign(QF[v][u])) * W[w][v][u] * quantiser_scale)/32;  
+*/
+DO_IQ_NON_INTRA:
+add (1)  a0.0<1>UD a0.0<1,1,1>UD 0x00200020UD {align1};
+mul (16) g116.0<1>D g[a0.0]<8,8,1>W g112.0<8,8,1>UW {align1 compr};
+mul (16) g116.0<1>D g116.0<8,8,1>D  g109.0<8,8,0>UW {align1 compr};
+asr (16) g116.0<1>D g116.0<8,8,1>D  4UW {align1 compr};
+
+add (1)  a0.0<1>UD a0.0<1,1,1>UD 0x00200020UD {align1};
+mul (16) g118.0<1>D g[a0.0]<8,8,1>W g113.0<8,8,1>UW {align1 compr};
+mul (16) g118.0<1>D g118.0<8,8,1>D  g109.0<8,8,0>UW {align1 compr};
+asr (16) g118.0<1>D g118.0<8,8,1>D  4UW {align1 compr};
+
+add (1)  a0.0<1>UD a0.0<1,1,1>UD 0x00200020UD {align1};
+mul (16) g120.0<1>D g[a0.0]<8,8,1>W g114.0<8,8,1>UW {align1 compr};
+mul (16) g120.0<1>D g120.0<8,8,1>D  g109.0<8,8,0>UW {align1 compr};
+asr (16) g120.0<1>D g120.0<8,8,1>D  4UW {align1 compr};
+
+add (1)  a0.0<1>UD a0.0<1,1,1>UD 0x00200020UD {align1};
+mul (16) g122.0<1>D g[a0.0]<8,8,1>W g115.0<8,8,1>UW {align1 compr};
+mul (16) g122.0<1>D g122.0<8,8,1>D  g109.0<8,8,0>UW {align1 compr};
+asr (16) g122.0<1>D g122.0<8,8,1>D  4UW {align1 compr};
+
+add (1) ip g125.0<1,1,1>UD 0x20UD {align1};            //jump back