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Commit e0e4c6b8 authored by Xiang, Haihao's avatar Xiang, Haihao
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i965_drv_video: clean up codes 

Check and allocate surface BO in a same function
Signed-off-by: default avatarXiang, Haihao <haihao.xiang@intel.com>
parent 1854f7cb
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Showing with 55 additions and 200 deletions
i965_drv_video/gen6_mfc.c
View file @ e0e4c6b8
......@@ -615,23 +615,7 @@ static VAStatus gen6_mfc_avc_prepare(VADriverContextP ctx,
/*Setup all the input&output object*/
obj_surface = SURFACE(pPicParameter->reconstructed_picture);
assert(obj_surface);
if (!obj_surface->bo) {
uint32_t tiling_mode = I915_TILING_Y;
unsigned long pitch;
obj_surface->bo = drm_intel_bo_alloc_tiled(i965->intel.bufmgr,
"vaapi surface",
obj_surface->width,
obj_surface->height + obj_surface->height / 2,
1,
&tiling_mode,
&pitch,
0);
assert(obj_surface->bo);
assert(tiling_mode == I915_TILING_Y);
assert(pitch == obj_surface->width);
}
i965_check_alloc_surface_bo(ctx, obj_surface, 1);
mfc_context->post_deblocking_output.bo = obj_surface->bo;
dri_bo_reference(mfc_context->post_deblocking_output.bo);
......
i965_drv_video/gen6_mfd.c
View file @ e0e4c6b8
......@@ -120,22 +120,8 @@ gen6_mfd_avc_frame_store_index(VADriverContextP ctx,
int frame_idx;
struct object_surface *obj_surface = SURFACE(ref_pic->picture_id);
if (obj_surface->bo == NULL) {
uint32_t tiling_mode = I915_TILING_Y;
unsigned long pitch;
obj_surface->bo = drm_intel_bo_alloc_tiled(i965->intel.bufmgr,
"vaapi surface",
obj_surface->width,
obj_surface->height + obj_surface->height / 2,
1,
&tiling_mode,
&pitch,
0);
assert(obj_surface->bo);
assert(tiling_mode == I915_TILING_Y);
assert(pitch == obj_surface->width);
}
assert(obj_surface);
i965_check_alloc_surface_bo(ctx, obj_surface, 1);
for (frame_idx = 0; frame_idx < ARRAY_ELEMS(gen6_mfd_context->reference_surface); frame_idx++) {
for (j = 0; j < ARRAY_ELEMS(gen6_mfd_context->reference_surface); j++) {
......@@ -1056,24 +1042,8 @@ gen6_mfd_avc_decode_init(VADriverContextP ctx,
obj_surface->flags &= ~SURFACE_REF_DIS_MASK;
obj_surface->flags |= (pic_param->pic_fields.bits.reference_pic_flag ? SURFACE_REFERENCED : 0);
gen6_mfd_init_avc_surface(ctx, pic_param, obj_surface);
i965_check_alloc_surface_bo(ctx, obj_surface, 1);
if (obj_surface->bo == NULL) {
uint32_t tiling_mode = I915_TILING_Y;
unsigned long pitch;
obj_surface->bo = drm_intel_bo_alloc_tiled(i965->intel.bufmgr,
"vaapi surface",
obj_surface->width,
obj_surface->height + obj_surface->height / 2,
1,
&tiling_mode,
&pitch,
0);
assert(obj_surface->bo);
assert(tiling_mode == I915_TILING_Y);
assert(pitch == obj_surface->width);
}
dri_bo_unreference(gen6_mfd_context->post_deblocking_output.bo);
gen6_mfd_context->post_deblocking_output.bo = obj_surface->bo;
dri_bo_reference(gen6_mfd_context->post_deblocking_output.bo);
......@@ -1221,22 +1191,7 @@ gen6_mfd_mpeg2_decode_init(VADriverContextP ctx,
/* Current decoded picture */
obj_surface = SURFACE(decode_state->current_render_target);
assert(obj_surface);
if (obj_surface->bo == NULL) {
uint32_t tiling_mode = I915_TILING_Y;
unsigned long pitch;
obj_surface->bo = drm_intel_bo_alloc_tiled(i965->intel.bufmgr,
"vaapi surface",
obj_surface->width,
obj_surface->height + obj_surface->height / 2,
1,
&tiling_mode,
&pitch,
0);
assert(obj_surface->bo);
assert(tiling_mode == I915_TILING_Y);
assert(pitch == obj_surface->width);
}
i965_check_alloc_surface_bo(ctx, obj_surface, 1);
dri_bo_unreference(gen6_mfd_context->pre_deblocking_output.bo);
gen6_mfd_context->pre_deblocking_output.bo = obj_surface->bo;
......@@ -1547,23 +1502,7 @@ gen6_mfd_vc1_decode_init(VADriverContextP ctx,
obj_surface = SURFACE(decode_state->current_render_target);
assert(obj_surface);
gen6_mfd_init_vc1_surface(ctx, pic_param, obj_surface);
if (obj_surface->bo == NULL) {
uint32_t tiling_mode = I915_TILING_Y;
unsigned long pitch;
obj_surface->bo = drm_intel_bo_alloc_tiled(i965->intel.bufmgr,
"vaapi surface",
obj_surface->width,
obj_surface->height + obj_surface->height / 2,
1,
&tiling_mode,
&pitch,
0);
assert(obj_surface->bo);
assert(tiling_mode == I915_TILING_Y);
assert(pitch == obj_surface->width);
}
i965_check_alloc_surface_bo(ctx, obj_surface, 1);
dri_bo_unreference(gen6_mfd_context->post_deblocking_output.bo);
gen6_mfd_context->post_deblocking_output.bo = obj_surface->bo;
......
i965_drv_video/gen7_mfd.c
View file @ e0e4c6b8
......@@ -120,22 +120,8 @@ gen7_mfd_avc_frame_store_index(VADriverContextP ctx,
int frame_idx;
struct object_surface *obj_surface = SURFACE(ref_pic->picture_id);
if (obj_surface->bo == NULL) {
uint32_t tiling_mode = I915_TILING_Y;
unsigned long pitch;
obj_surface->bo = drm_intel_bo_alloc_tiled(i965->intel.bufmgr,
"vaapi surface",
obj_surface->width,
obj_surface->height + obj_surface->height / 2,
1,
&tiling_mode,
&pitch,
0);
assert(obj_surface->bo);
assert(tiling_mode == I915_TILING_Y);
assert(pitch == obj_surface->width);
}
assert(obj_surface);
i965_check_alloc_surface_bo(ctx, obj_surface, 1);
for (frame_idx = 0; frame_idx < ARRAY_ELEMS(gen7_mfd_context->reference_surface); frame_idx++) {
for (j = 0; j < ARRAY_ELEMS(gen7_mfd_context->reference_surface); j++) {
......@@ -1003,24 +989,8 @@ gen7_mfd_avc_decode_init(VADriverContextP ctx,
obj_surface->flags &= ~SURFACE_REF_DIS_MASK;
obj_surface->flags |= (pic_param->pic_fields.bits.reference_pic_flag ? SURFACE_REFERENCED : 0);
gen7_mfd_init_avc_surface(ctx, pic_param, obj_surface);
i965_check_alloc_surface_bo(ctx, obj_surface, 1);
if (obj_surface->bo == NULL) {
uint32_t tiling_mode = I915_TILING_Y;
unsigned long pitch;
obj_surface->bo = drm_intel_bo_alloc_tiled(i965->intel.bufmgr,
"vaapi surface",
obj_surface->width,
obj_surface->height + obj_surface->height / 2,
1,
&tiling_mode,
&pitch,
0);
assert(obj_surface->bo);
assert(tiling_mode == I915_TILING_Y);
assert(pitch == obj_surface->width);
}
dri_bo_unreference(gen7_mfd_context->post_deblocking_output.bo);
gen7_mfd_context->post_deblocking_output.bo = obj_surface->bo;
dri_bo_reference(gen7_mfd_context->post_deblocking_output.bo);
......@@ -1167,22 +1137,7 @@ gen7_mfd_mpeg2_decode_init(VADriverContextP ctx,
/* Current decoded picture */
obj_surface = SURFACE(decode_state->current_render_target);
assert(obj_surface);
if (obj_surface->bo == NULL) {
uint32_t tiling_mode = I915_TILING_Y;
unsigned long pitch;
obj_surface->bo = drm_intel_bo_alloc_tiled(i965->intel.bufmgr,
"vaapi surface",
obj_surface->width,
obj_surface->height + obj_surface->height / 2,
1,
&tiling_mode,
&pitch,
0);
assert(obj_surface->bo);
assert(tiling_mode == I915_TILING_Y);
assert(pitch == obj_surface->width);
}
i965_check_alloc_surface_bo(ctx, obj_surface, 1);
dri_bo_unreference(gen7_mfd_context->pre_deblocking_output.bo);
gen7_mfd_context->pre_deblocking_output.bo = obj_surface->bo;
......@@ -1502,23 +1457,7 @@ gen7_mfd_vc1_decode_init(VADriverContextP ctx,
obj_surface = SURFACE(decode_state->current_render_target);
assert(obj_surface);
gen7_mfd_init_vc1_surface(ctx, pic_param, obj_surface);
if (obj_surface->bo == NULL) {
uint32_t tiling_mode = I915_TILING_Y;
unsigned long pitch;
obj_surface->bo = drm_intel_bo_alloc_tiled(i965->intel.bufmgr,
"vaapi surface",
obj_surface->width,
obj_surface->height + obj_surface->height / 2,
1,
&tiling_mode,
&pitch,
0);
assert(obj_surface->bo);
assert(tiling_mode == I915_TILING_Y);
assert(pitch == obj_surface->width);
}
i965_check_alloc_surface_bo(ctx, obj_surface, 1);
dri_bo_unreference(gen7_mfd_context->post_deblocking_output.bo);
gen7_mfd_context->post_deblocking_output.bo = obj_surface->bo;
......
i965_drv_video/i965_avc_bsd.c
View file @ e0e4c6b8
......@@ -516,13 +516,7 @@ i965_avc_bsd_buf_base_state(VADriverContextP ctx,
obj_surface->flags |= (pic_param->pic_fields.bits.reference_pic_flag ? SURFACE_REFERENCED : 0);
i965_avc_bsd_init_avc_bsd_surface(ctx, obj_surface, pic_param, i965_h264_context);
avc_bsd_surface = obj_surface->private_data;
if (obj_surface->bo == NULL) {
obj_surface->bo = dri_bo_alloc(i965->intel.bufmgr,
"vaapi surface",
obj_surface->size,
0x1000);
}
i965_check_alloc_surface_bo(ctx, obj_surface, 0);
OUT_BCS_RELOC(batch, avc_bsd_surface->dmv_top,
I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION,
......@@ -964,17 +958,9 @@ i965_avc_bsd_frame_store_index(VADriverContextP ctx,
if (!found) {
int frame_idx;
struct object_surface *obj_surface = SURFACE(ref_pic->picture_id);
assert(obj_surface);
i965_check_alloc_surface_bo(ctx, obj_surface, 0);
if (obj_surface->bo == NULL) {
/* Some broken sources such as conformance case FM2_SVA_C
* will get here !!!. Allocating a BO for it to avoid SEGMENT FAULT
*/
obj_surface->bo = dri_bo_alloc(i965->intel.bufmgr,
"vaapi surface",
obj_surface->size,
0x1000);
}
for (frame_idx = 0; frame_idx < ARRAY_ELEMS(i965_h264_context->fsid_list); frame_idx++) {
for (j = 0; j < ARRAY_ELEMS(i965_h264_context->fsid_list); j++) {
if (i965_h264_context->fsid_list[j].surface_id == VA_INVALID_ID)
......
i965_drv_video/i965_drv_video.c
View file @ e0e4c6b8
......@@ -1815,6 +1815,40 @@ i965_CreateImage(VADriverContextP ctx,
return va_status;
}
void
i965_check_alloc_surface_bo(VADriverContextP ctx,
struct object_surface *obj_surface,
int tiled)
{
struct i965_driver_data *i965 = i965_driver_data(ctx);
if (obj_surface->bo)
return;
if (tiled) {
uint32_t tiling_mode = I915_TILING_Y; /* always uses Y-tiled format */
unsigned long pitch;
obj_surface->bo = drm_intel_bo_alloc_tiled(i965->intel.bufmgr,
"vaapi surface",
obj_surface->width,
obj_surface->height + obj_surface->height / 2,
1,
&tiling_mode,
&pitch,
0);
assert(tiling_mode == I915_TILING_Y);
assert(pitch == obj_surface->width);
} else {
obj_surface->bo = dri_bo_alloc(i965->intel.bufmgr,
"vaapi surface",
obj_surface->size,
0x1000);
}
assert(obj_surface->bo);
}
VAStatus i965_DeriveImage(VADriverContextP ctx,
VASurfaceID surface,
VAImage *out_image) /* out */
......@@ -1899,32 +1933,7 @@ VAStatus i965_DeriveImage(VADriverContextP ctx,
}
}
if (obj_surface->bo == NULL) {
if (HAS_TILED_SURFACE(i965)) {
uint32_t tiling_mode = I915_TILING_Y;
unsigned long pitch;
obj_surface->bo = drm_intel_bo_alloc_tiled(i965->intel.bufmgr,
"vaapi surface",
obj_surface->width,
obj_surface->height + obj_surface->height / 2,
1,
&tiling_mode,
&pitch,
0);
assert(obj_surface->bo);
assert(tiling_mode == I915_TILING_Y);
assert(pitch == obj_surface->width);
} else {
obj_surface->bo = dri_bo_alloc(i965->intel.bufmgr,
"vaapi surface",
obj_surface->size,
0x1000);
}
}
assert(obj_surface->bo);
i965_check_alloc_surface_bo(ctx, obj_surface, HAS_TILED_SURFACE(i965));
va_status = i965_create_buffer_internal(ctx, 0, VAImageBufferType,
obj_surface->size, 1, NULL, obj_surface->bo, &image->buf);
if (va_status != VA_STATUS_SUCCESS)
......
i965_drv_video/i965_drv_video.h
View file @ e0e4c6b8
......@@ -249,4 +249,9 @@ i965_driver_data(VADriverContextP ctx)
return (struct i965_driver_data *)(ctx->pDriverData);
}
void
i965_check_alloc_surface_bo(VADriverContextP ctx,
struct object_surface *obj_surface,
int tiled);
#endif /* _I965_DRV_VIDEO_H_ */
i965_drv_video/i965_media_mpeg2.c
View file @ e0e4c6b8
......@@ -516,14 +516,7 @@ i965_media_mpeg2_surface_setup(VADriverContextP ctx,
int w = obj_surface->width;
int h = obj_surface->height;
if (obj_surface->bo == NULL) {
struct i965_driver_data *i965 = i965_driver_data(ctx);
obj_surface->bo = dri_bo_alloc(i965->intel.bufmgr,
"vaapi surface",
obj_surface->size,
0x1000);
}
i965_check_alloc_surface_bo(ctx, obj_surface, 0);
if (picture_structure == MPEG_FRAME) {
i965_media_mpeg2_surface_state(ctx, base_index + 0, obj_surface,
......
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