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Commit ca5f60f0 authored by Xiang, Haihao's avatar Xiang, Haihao
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i965_drv_video: use the same structure for all kernels

parent 87a90c60
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Showing with 181 additions and 155 deletions
i965_drv_video/gen6_vme.c
View file @ ca5f60f0
......@@ -47,17 +47,17 @@
#define CURBE_TOTAL_DATA_LENGTH (4 * 32) /* in byte, it should be less than or equal to CURBE_ALLOCATION_SIZE * 32 */
#define CURBE_URB_ENTRY_LENGTH 4 /* in 256-bit, it should be less than or equal to CURBE_TOTAL_DATA_LENGTH / 32 */
static uint32_t gen6_vme_intra_frame[][4] = {
static const uint32_t gen6_vme_intra_frame[][4] = {
#include "shaders/vme/intra_frame.g6b"
{0,0,0,0}
};
static uint32_t gen6_vme_inter_frame[][4] = {
static const uint32_t gen6_vme_inter_frame[][4] = {
#include "shaders/vme/inter_frame.g6b"
{0,0,0,0}
};
static struct media_kernel gen6_vme_kernels[] = {
static struct i965_kernel gen6_vme_kernels[] = {
{
"VME Intra Frame",
VME_INTRA_SHADER, /*index*/
......@@ -357,7 +357,7 @@ static VAStatus gen6_vme_interface_setup(VADriverContextP ctx,
desc = bo->virtual;
for (i = 0; i < GEN6_VME_KERNEL_NUMBER; i++) {
struct media_kernel *kernel;
struct i965_kernel *kernel;
kernel = &gen6_vme_kernels[i];
assert(sizeof(*desc) == 32);
/*Setup the descritor table*/
......@@ -710,7 +710,7 @@ Bool gen6_vme_context_init(VADriverContextP ctx, struct gen6_vme_context *vme_co
for (i = 0; i < GEN6_VME_KERNEL_NUMBER; i++) {
/*Load kernel into GPU memory*/
struct media_kernel *kernel = &gen6_vme_kernels[i];
struct i965_kernel *kernel = &gen6_vme_kernels[i];
kernel->bo = dri_bo_alloc(i965->intel.bufmgr,
kernel->name,
......@@ -749,7 +749,7 @@ Bool gen6_vme_context_destroy(struct gen6_vme_context *vme_context)
for (i = 0; i < GEN6_VME_KERNEL_NUMBER; i++) {
/*Load kernel into GPU memory*/
struct media_kernel *kernel = &gen6_vme_kernels[i];
struct i965_kernel *kernel = &gen6_vme_kernels[i];
dri_bo_unreference(kernel->bo);
kernel->bo = NULL;
......
i965_drv_video/i965_avc_hw_scoreboard.c
View file @ ca5f60f0
......@@ -41,7 +41,7 @@
#include "i965_media_h264.h"
#include "i965_media.h"
extern struct media_kernel *h264_avc_kernels;
extern struct i965_kernel *h264_avc_kernels;
/* On Ironlake */
#include "shaders/h264/mc/export.inc.gen5"
......
i965_drv_video/i965_avc_ildb.c
View file @ ca5f60f0
......@@ -123,7 +123,7 @@ struct avc_ildb_root_input
unsigned int pad3;
};
extern struct media_kernel *h264_avc_kernels;
extern struct i965_kernel *h264_avc_kernels;
#define NUM_AVC_ILDB_INTERFACES ARRAY_ELEMS(avc_ildb_kernel_offset_gen4)
static unsigned long *avc_ildb_kernel_offset = NULL;
......
i965_drv_video/i965_drv_video.h
View file @ ca5f60f0
......@@ -47,11 +47,11 @@
#define I965_MAX_DISPLAY_ATTRIBUTES 4
#define I965_STR_VENDOR "i965 Driver 0.1"
struct media_kernel
struct i965_kernel
{
char *name;
int interface;
unsigned int (*bin)[4];
const uint32_t (*bin)[4];
int size;
dri_bo *bo;
};
......
i965_drv_video/i965_media_h264.c
View file @ ca5f60f0
......@@ -154,15 +154,15 @@ struct intra_kernel_header intra_kernel_header_gen4 = {
(intra_Pred_4x4_Y_IP - ADD_ERROR_SB0_IP)
};
static uint32_t h264_avc_combined_gen4[][4] = {
static const uint32_t h264_avc_combined_gen4[][4] = {
#include "shaders/h264/mc/avc_mc.g4b"
};
static uint32_t h264_avc_null_gen4[][4] = {
static const uint32_t h264_avc_null_gen4[][4] = {
#include "shaders/h264/mc/null.g4b"
};
static struct media_kernel h264_avc_kernels_gen4[] = {
static struct i965_kernel h264_avc_kernels_gen4[] = {
{
"AVC combined kernel",
H264_AVC_COMBINED,
......@@ -249,15 +249,15 @@ struct intra_kernel_header intra_kernel_header_gen5 = {
(intra_Pred_4x4_Y_IP_GEN5 - ADD_ERROR_SB0_IP_GEN5)
};
static uint32_t h264_avc_combined_gen5[][4] = {
static const uint32_t h264_avc_combined_gen5[][4] = {
#include "shaders/h264/mc/avc_mc.g4b.gen5"
};
static uint32_t h264_avc_null_gen5[][4] = {
static const uint32_t h264_avc_null_gen5[][4] = {
#include "shaders/h264/mc/null.g4b.gen5"
};
static struct media_kernel h264_avc_kernels_gen5[] = {
static struct i965_kernel h264_avc_kernels_gen5[] = {
{
"AVC combined kernel",
H264_AVC_COMBINED,
......@@ -276,7 +276,7 @@ static struct media_kernel h264_avc_kernels_gen5[] = {
};
#define NUM_H264_AVC_KERNELS (sizeof(h264_avc_kernels_gen4) / sizeof(h264_avc_kernels_gen4[0]))
struct media_kernel *h264_avc_kernels = NULL;
struct i965_kernel *h264_avc_kernels = NULL;
#define NUM_AVC_MC_INTERFACES (sizeof(avc_mc_kernel_offset_gen4) / sizeof(avc_mc_kernel_offset_gen4[0]))
static unsigned long *avc_mc_kernel_offset = NULL;
......@@ -762,7 +762,7 @@ i965_media_h264_free_private_context(void **data)
*data = NULL;
for (i = 0; i < NUM_H264_AVC_KERNELS; i++) {
struct media_kernel *kernel = &h264_avc_kernels[i];
struct i965_kernel *kernel = &h264_avc_kernels[i];
dri_bo_unreference(kernel->bo);
kernel->bo = NULL;
......@@ -871,7 +871,7 @@ i965_media_h264_dec_context_init(VADriverContextP ctx, struct i965_media_context
}
for (i = 0; i < NUM_H264_AVC_KERNELS; i++) {
struct media_kernel *kernel = &h264_avc_kernels[i];
struct i965_kernel *kernel = &h264_avc_kernels[i];
kernel->bo = dri_bo_alloc(i965->intel.bufmgr,
kernel->name,
kernel->size, 0x1000);
......
i965_drv_video/i965_media_mpeg2.c
View file @ ca5f60f0
......@@ -111,54 +111,54 @@ const uint32_t zigzag_direct[64] = {
53, 60, 61, 54, 47, 55, 62, 63
};
static uint32_t frame_intra_kernel[][4] = {
static const uint32_t frame_intra_kernel[][4] = {
#include "shaders/mpeg2/vld/frame_intra.g4b"
};
static uint32_t frame_frame_pred_forward_kernel[][4] = {
static const uint32_t frame_frame_pred_forward_kernel[][4] = {
#include "shaders/mpeg2/vld/frame_frame_pred_forward.g4b"
};
static uint32_t frame_frame_pred_backward_kernel[][4] = {
static const uint32_t frame_frame_pred_backward_kernel[][4] = {
#include "shaders/mpeg2/vld/frame_frame_pred_backward.g4b"
};
static uint32_t frame_frame_pred_bidirect_kernel[][4] = {
static const uint32_t frame_frame_pred_bidirect_kernel[][4] = {
#include "shaders/mpeg2/vld/frame_frame_pred_bidirect.g4b"
};
static uint32_t frame_field_pred_forward_kernel[][4] = {
static const uint32_t frame_field_pred_forward_kernel[][4] = {
#include "shaders/mpeg2/vld/frame_field_pred_forward.g4b"
};
static uint32_t frame_field_pred_backward_kernel[][4] = {
static const uint32_t frame_field_pred_backward_kernel[][4] = {
#include "shaders/mpeg2/vld/frame_field_pred_backward.g4b"
};
static uint32_t frame_field_pred_bidirect_kernel[][4] = {
static const uint32_t frame_field_pred_bidirect_kernel[][4] = {
#include "shaders/mpeg2/vld/frame_field_pred_bidirect.g4b"
};
static uint32_t lib_kernel[][4] = {
static const uint32_t lib_kernel[][4] = {
#include "shaders/mpeg2/vld/lib.g4b"
};
/*field picture*/
static uint32_t field_intra_kernel[][4] = {
static const uint32_t field_intra_kernel[][4] = {
#include "shaders/mpeg2/vld/field_intra.g4b"
};
static uint32_t field_forward_kernel[][4] = {
static const uint32_t field_forward_kernel[][4] = {
#include "shaders/mpeg2/vld/field_forward.g4b"
};
static uint32_t field_forward_16x8_kernel[][4] = {
static const uint32_t field_forward_16x8_kernel[][4] = {
#include "shaders/mpeg2/vld/field_forward_16x8.g4b"
};
static uint32_t field_backward_kernel[][4] = {
static const uint32_t field_backward_kernel[][4] = {
#include "shaders/mpeg2/vld/field_backward.g4b"
};
static uint32_t field_backward_16x8_kernel[][4] = {
static const uint32_t field_backward_16x8_kernel[][4] = {
#include "shaders/mpeg2/vld/field_backward_16x8.g4b"
};
static uint32_t field_bidirect_kernel[][4] = {
static const uint32_t field_bidirect_kernel[][4] = {
#include "shaders/mpeg2/vld/field_bidirect.g4b"
};
static uint32_t field_bidirect_16x8_kernel[][4] = {
static const uint32_t field_bidirect_16x8_kernel[][4] = {
#include "shaders/mpeg2/vld/field_bidirect_16x8.g4b"
};
static struct media_kernel mpeg2_vld_kernels_gen4[] = {
static struct i965_kernel mpeg2_vld_kernels_gen4[] = {
{
"FRAME_INTRA",
FRAME_INTRA,
......@@ -281,54 +281,54 @@ static struct media_kernel mpeg2_vld_kernels_gen4[] = {
};
/* On IRONLAKE */
static uint32_t frame_intra_kernel_gen5[][4] = {
static const uint32_t frame_intra_kernel_gen5[][4] = {
#include "shaders/mpeg2/vld/frame_intra.g4b.gen5"
};
static uint32_t frame_frame_pred_forward_kernel_gen5[][4] = {
static const uint32_t frame_frame_pred_forward_kernel_gen5[][4] = {
#include "shaders/mpeg2/vld/frame_frame_pred_forward.g4b.gen5"
};
static uint32_t frame_frame_pred_backward_kernel_gen5[][4] = {
static const uint32_t frame_frame_pred_backward_kernel_gen5[][4] = {
#include "shaders/mpeg2/vld/frame_frame_pred_backward.g4b.gen5"
};
static uint32_t frame_frame_pred_bidirect_kernel_gen5[][4] = {
static const uint32_t frame_frame_pred_bidirect_kernel_gen5[][4] = {
#include "shaders/mpeg2/vld/frame_frame_pred_bidirect.g4b.gen5"
};
static uint32_t frame_field_pred_forward_kernel_gen5[][4] = {
static const uint32_t frame_field_pred_forward_kernel_gen5[][4] = {
#include "shaders/mpeg2/vld/frame_field_pred_forward.g4b.gen5"
};
static uint32_t frame_field_pred_backward_kernel_gen5[][4] = {
static const uint32_t frame_field_pred_backward_kernel_gen5[][4] = {
#include "shaders/mpeg2/vld/frame_field_pred_backward.g4b.gen5"
};
static uint32_t frame_field_pred_bidirect_kernel_gen5[][4] = {
static const uint32_t frame_field_pred_bidirect_kernel_gen5[][4] = {
#include "shaders/mpeg2/vld/frame_field_pred_bidirect.g4b.gen5"
};
static uint32_t lib_kernel_gen5[][4] = {
static const uint32_t lib_kernel_gen5[][4] = {
#include "shaders/mpeg2/vld/lib.g4b.gen5"
};
/*field picture*/
static uint32_t field_intra_kernel_gen5[][4] = {
static const uint32_t field_intra_kernel_gen5[][4] = {
#include "shaders/mpeg2/vld/field_intra.g4b.gen5"
};
static uint32_t field_forward_kernel_gen5[][4] = {
static const uint32_t field_forward_kernel_gen5[][4] = {
#include "shaders/mpeg2/vld/field_forward.g4b.gen5"
};
static uint32_t field_forward_16x8_kernel_gen5[][4] = {
static const uint32_t field_forward_16x8_kernel_gen5[][4] = {
#include "shaders/mpeg2/vld/field_forward_16x8.g4b.gen5"
};
static uint32_t field_backward_kernel_gen5[][4] = {
static const uint32_t field_backward_kernel_gen5[][4] = {
#include "shaders/mpeg2/vld/field_backward.g4b.gen5"
};
static uint32_t field_backward_16x8_kernel_gen5[][4] = {
static const uint32_t field_backward_16x8_kernel_gen5[][4] = {
#include "shaders/mpeg2/vld/field_backward_16x8.g4b.gen5"
};
static uint32_t field_bidirect_kernel_gen5[][4] = {
static const uint32_t field_bidirect_kernel_gen5[][4] = {
#include "shaders/mpeg2/vld/field_bidirect.g4b.gen5"
};
static uint32_t field_bidirect_16x8_kernel_gen5[][4] = {
static const uint32_t field_bidirect_16x8_kernel_gen5[][4] = {
#include "shaders/mpeg2/vld/field_bidirect_16x8.g4b.gen5"
};
static struct media_kernel mpeg2_vld_kernels_gen5[] = {
static struct i965_kernel mpeg2_vld_kernels_gen5[] = {
{
"FRAME_INTRA",
FRAME_INTRA,
......@@ -450,7 +450,7 @@ static struct media_kernel mpeg2_vld_kernels_gen5[] = {
}
};
static struct media_kernel *mpeg2_vld_kernels = NULL;
static struct i965_kernel *mpeg2_vld_kernels = NULL;
#define NUM_MPEG2_VLD_KERNELS (sizeof(mpeg2_vld_kernels_gen4)/sizeof(mpeg2_vld_kernels_gen4[0]))
......@@ -919,7 +919,7 @@ i965_media_mpeg2_free_private_context(void **data)
int i;
for (i = 0; i < NUM_MPEG2_VLD_KERNELS; i++) {
struct media_kernel *kernel = &mpeg2_vld_kernels[i];
struct i965_kernel *kernel = &mpeg2_vld_kernels[i];
dri_bo_unreference(kernel->bo);
kernel->bo = NULL;
......@@ -966,7 +966,7 @@ i965_media_mpeg2_dec_context_init(VADriverContextP ctx, struct i965_media_contex
mpeg2_vld_kernels = mpeg2_vld_kernels_gen4;
for (i = 0; i < NUM_MPEG2_VLD_KERNELS; i++) {
struct media_kernel *kernel = &mpeg2_vld_kernels[i];
struct i965_kernel *kernel = &mpeg2_vld_kernels[i];
kernel->bo = dri_bo_alloc(i965->intel.bufmgr,
kernel->name,
kernel->size, 64);
......
i965_drv_video/i965_post_processing.c
View file @ ca5f60f0
......@@ -47,36 +47,31 @@
struct pp_module
{
/* kernel */
char *name;
int interface;
unsigned int (*bin)[4];
int size;
dri_bo *bo;
struct i965_kernel kernel;
/* others */
void (*initialize)(VADriverContextP ctx, VASurfaceID surface, int input,
unsigned short srcw, unsigned short srch,
unsigned short destw, unsigned short desth);
};
static uint32_t pp_null_gen5[][4] = {
static const uint32_t pp_null_gen5[][4] = {
#include "shaders/post_processing/null.g4b.gen5"
};
static uint32_t pp_nv12_load_save_gen5[][4] = {
static const uint32_t pp_nv12_load_save_gen5[][4] = {
#include "shaders/post_processing/nv12_load_save_nv12.g4b.gen5"
};
static uint32_t pp_nv12_scaling_gen5[][4] = {
static const uint32_t pp_nv12_scaling_gen5[][4] = {
#include "shaders/post_processing/nv12_scaling_nv12.g4b.gen5"
};
static uint32_t pp_nv12_avs_gen5[][4] = {
static const uint32_t pp_nv12_avs_gen5[][4] = {
#include "shaders/post_processing/nv12_avs_nv12.g4b.gen5"
};
static uint32_t pp_nv12_dndi_gen5[][4] = {
static const uint32_t pp_nv12_dndi_gen5[][4] = {
#include "shaders/post_processing/nv12_dndi_nv12.g4b.gen5"
};
......@@ -98,114 +93,144 @@ static void pp_nv12_dndi_initialize(VADriverContextP ctx, VASurfaceID surface, i
static struct pp_module pp_modules_gen5[] = {
{
"NULL module (for testing)",
PP_NULL,
pp_null_gen5,
sizeof(pp_null_gen5),
NULL,
{
"NULL module (for testing)",
PP_NULL,
pp_null_gen5,
sizeof(pp_null_gen5),
NULL,
},
pp_null_initialize,
},
{
"NV12 Load & Save module",
PP_NV12_LOAD_SAVE,
pp_nv12_load_save_gen5,
sizeof(pp_nv12_load_save_gen5),
NULL,
{
"NV12 Load & Save module",
PP_NV12_LOAD_SAVE,
pp_nv12_load_save_gen5,
sizeof(pp_nv12_load_save_gen5),
NULL,
},
pp_nv12_load_save_initialize,
},
{
"NV12 Scaling module",
PP_NV12_SCALING,
pp_nv12_scaling_gen5,
sizeof(pp_nv12_scaling_gen5),
NULL,
{
"NV12 Scaling module",
PP_NV12_SCALING,
pp_nv12_scaling_gen5,
sizeof(pp_nv12_scaling_gen5),
NULL,
},
pp_nv12_scaling_initialize,
},
{
"NV12 AVS module",
PP_NV12_AVS,
pp_nv12_avs_gen5,
sizeof(pp_nv12_avs_gen5),
NULL,
{
"NV12 AVS module",
PP_NV12_AVS,
pp_nv12_avs_gen5,
sizeof(pp_nv12_avs_gen5),
NULL,
},
pp_nv12_avs_initialize,
},
{
"NV12 DNDI module",
PP_NV12_DNDI,
pp_nv12_dndi_gen5,
sizeof(pp_nv12_dndi_gen5),
NULL,
{
"NV12 DNDI module",
PP_NV12_DNDI,
pp_nv12_dndi_gen5,
sizeof(pp_nv12_dndi_gen5),
NULL,
},
pp_nv12_dndi_initialize,
},
};
static uint32_t pp_null_gen6[][4] = {
static const uint32_t pp_null_gen6[][4] = {
#include "shaders/post_processing/null.g6b"
};
static uint32_t pp_nv12_load_save_gen6[][4] = {
static const uint32_t pp_nv12_load_save_gen6[][4] = {
#include "shaders/post_processing/nv12_load_save_nv12.g6b"
};
static uint32_t pp_nv12_scaling_gen6[][4] = {
static const uint32_t pp_nv12_scaling_gen6[][4] = {
#include "shaders/post_processing/nv12_scaling_nv12.g6b"
};
static uint32_t pp_nv12_avs_gen6[][4] = {
static const uint32_t pp_nv12_avs_gen6[][4] = {
#include "shaders/post_processing/nv12_avs_nv12.g6b"
};
static uint32_t pp_nv12_dndi_gen6[][4] = {
static const uint32_t pp_nv12_dndi_gen6[][4] = {
#include "shaders/post_processing/nv12_dndi_nv12.g6b"
};
static struct pp_module pp_modules_gen6[] = {
{
"NULL module (for testing)",
PP_NULL,
pp_null_gen6,
sizeof(pp_null_gen6),
NULL,
{
"NULL module (for testing)",
PP_NULL,
pp_null_gen6,
sizeof(pp_null_gen6),
NULL,
},
pp_null_initialize,
},
{
"NV12 Load & Save module",
PP_NV12_LOAD_SAVE,
pp_nv12_load_save_gen6,
sizeof(pp_nv12_load_save_gen6),
NULL,
{
"NV12 Load & Save module",
PP_NV12_LOAD_SAVE,
pp_nv12_load_save_gen6,
sizeof(pp_nv12_load_save_gen6),
NULL,
},
pp_nv12_load_save_initialize,
},
{
"NV12 Scaling module",
PP_NV12_SCALING,
pp_nv12_scaling_gen6,
sizeof(pp_nv12_scaling_gen6),
NULL,
{
"NV12 Scaling module",
PP_NV12_SCALING,
pp_nv12_scaling_gen6,
sizeof(pp_nv12_scaling_gen6),
NULL,
},
pp_nv12_scaling_initialize,
},
{
"NV12 AVS module",
PP_NV12_AVS,
pp_nv12_avs_gen6,
sizeof(pp_nv12_avs_gen6),
NULL,
{
"NV12 AVS module",
PP_NV12_AVS,
pp_nv12_avs_gen6,
sizeof(pp_nv12_avs_gen6),
NULL,
},
pp_nv12_avs_initialize,
},
{
"NV12 DNDI module",
PP_NV12_DNDI,
pp_nv12_dndi_gen6,
sizeof(pp_nv12_dndi_gen6),
NULL,
{
"NV12 DNDI module",
PP_NV12_DNDI,
pp_nv12_dndi_gen6,
sizeof(pp_nv12_dndi_gen6),
NULL,
},
pp_nv12_dndi_initialize,
},
};
......@@ -478,7 +503,7 @@ ironlake_pp_interface_descriptor_table(struct i965_post_processing_context *pp_c
desc = bo->virtual;
memset(desc, 0, sizeof(*desc));
desc->desc0.grf_reg_blocks = 10;
desc->desc0.kernel_start_pointer = pp_modules[pp_index].bo->offset >> 6; /* reloc */
desc->desc0.kernel_start_pointer = pp_modules[pp_index].kernel.bo->offset >> 6; /* reloc */
desc->desc1.const_urb_entry_read_offset = 0;
desc->desc1.const_urb_entry_read_len = 4; /* grf 1-4 */
desc->desc2.sampler_state_pointer = pp_context->sampler_state_table.bo->offset >> 5;
......@@ -491,7 +516,7 @@ ironlake_pp_interface_descriptor_table(struct i965_post_processing_context *pp_c
I915_GEM_DOMAIN_INSTRUCTION, 0,
desc->desc0.grf_reg_blocks,
offsetof(struct i965_interface_descriptor, desc0),
pp_modules[pp_index].bo);
pp_modules[pp_index].kernel.bo);
dri_bo_emit_reloc(bo,
I915_GEM_DOMAIN_INSTRUCTION, 0,
......@@ -2182,7 +2207,7 @@ gen6_pp_interface_descriptor_table(struct i965_post_processing_context *pp_conte
desc = bo->virtual;
memset(desc, 0, sizeof(*desc));
desc->desc0.kernel_start_pointer =
pp_modules[pp_index].bo->offset >> 6; /* reloc */
pp_modules[pp_index].kernel.bo->offset >> 6; /* reloc */
desc->desc1.single_program_flow = 1;
desc->desc1.floating_point_mode = FLOATING_POINT_IEEE_754;
desc->desc2.sampler_count = 1; /* 1 - 4 samplers used */
......@@ -2198,7 +2223,7 @@ gen6_pp_interface_descriptor_table(struct i965_post_processing_context *pp_conte
I915_GEM_DOMAIN_INSTRUCTION, 0,
0,
offsetof(struct gen6_interface_descriptor_data, desc0),
pp_modules[pp_index].bo);
pp_modules[pp_index].kernel.bo);
dri_bo_emit_reloc(bo,
I915_GEM_DOMAIN_INSTRUCTION, 0,
......@@ -2500,8 +2525,8 @@ i965_post_processing_terminate(VADriverContextP ctx)
for (i = 0; i < NUM_PP_MODULES && pp_modules; i++) {
struct pp_module *pp_module = &pp_modules[i];
dri_bo_unreference(pp_module->bo);
pp_module->bo = NULL;
dri_bo_unreference(pp_module->kernel.bo);
pp_module->kernel.bo = NULL;
}
}
......@@ -2542,13 +2567,13 @@ i965_post_processing_init(VADriverContextP ctx)
for (i = 0; i < NUM_PP_MODULES && pp_modules; i++) {
struct pp_module *pp_module = &pp_modules[i];
dri_bo_unreference(pp_module->bo);
pp_module->bo = dri_bo_alloc(i965->intel.bufmgr,
pp_module->name,
pp_module->size,
4096);
assert(pp_module->bo);
dri_bo_subdata(pp_module->bo, 0, pp_module->size, pp_module->bin);
dri_bo_unreference(pp_module->kernel.bo);
pp_module->kernel.bo = dri_bo_alloc(i965->intel.bufmgr,
pp_module->kernel.name,
pp_module->kernel.size,
4096);
assert(pp_module->kernel.bo);
dri_bo_subdata(pp_module->kernel.bo, 0, pp_module->kernel.size, pp_module->kernel.bin);
}
}
......
i965_drv_video/i965_render.c
View file @ ca5f60f0
......@@ -50,7 +50,7 @@
#define SF_KERNEL_NUM_GRF 16
#define SF_MAX_THREADS 1
static const unsigned int sf_kernel_static[][4] =
static const uint32_t sf_kernel_static[][4] =
{
#include "shaders/render/exa_sf.g4b"
};
......@@ -60,7 +60,7 @@ static const unsigned int sf_kernel_static[][4] =
#define I965_GRF_BLOCKS(nreg) ((nreg + 15) / 16 - 1)
static const unsigned int ps_kernel_static[][4] =
static const uint32_t ps_kernel_static[][4] =
{
#include "shaders/render/exa_wm_xy.g4b"
#include "shaders/render/exa_wm_src_affine.g4b"
......@@ -68,7 +68,7 @@ static const unsigned int ps_kernel_static[][4] =
#include "shaders/render/exa_wm_yuv_rgb.g4b"
#include "shaders/render/exa_wm_write.g4b"
};
static const unsigned int ps_subpic_kernel_static[][4] =
static const uint32_t ps_subpic_kernel_static[][4] =
{
#include "shaders/render/exa_wm_xy.g4b"
#include "shaders/render/exa_wm_src_affine.g4b"
......@@ -77,12 +77,12 @@ static const unsigned int ps_subpic_kernel_static[][4] =
};
/* On IRONLAKE */
static const unsigned int sf_kernel_static_gen5[][4] =
static const uint32_t sf_kernel_static_gen5[][4] =
{
#include "shaders/render/exa_sf.g4b.gen5"
};
static const unsigned int ps_kernel_static_gen5[][4] =
static const uint32_t ps_kernel_static_gen5[][4] =
{
#include "shaders/render/exa_wm_xy.g4b.gen5"
#include "shaders/render/exa_wm_src_affine.g4b.gen5"
......@@ -90,7 +90,7 @@ static const unsigned int ps_kernel_static_gen5[][4] =
#include "shaders/render/exa_wm_yuv_rgb.g4b.gen5"
#include "shaders/render/exa_wm_write.g4b.gen5"
};
static const unsigned int ps_subpic_kernel_static_gen5[][4] =
static const uint32_t ps_subpic_kernel_static_gen5[][4] =
{
#include "shaders/render/exa_wm_xy.g4b.gen5"
#include "shaders/render/exa_wm_src_affine.g4b.gen5"
......@@ -99,7 +99,7 @@ static const unsigned int ps_subpic_kernel_static_gen5[][4] =
};
/* programs for Sandybridge */
static const unsigned int sf_kernel_static_gen6[][4] =
static const uint32_t sf_kernel_static_gen6[][4] =
{
};
......@@ -138,23 +138,17 @@ enum
PS_SUBPIC_KERNEL
};
struct render_kernel
{
char *name;
const unsigned int (*bin)[4];
int size;
dri_bo *bo;
};
static struct render_kernel render_kernels_gen4[] = {
static struct i965_kernel render_kernels_gen4[] = {
{
"SF",
SF_KERNEL,
sf_kernel_static,
sizeof(sf_kernel_static),
NULL
},
{
"PS",
PS_KERNEL,
ps_kernel_static,
sizeof(ps_kernel_static),
NULL
......@@ -162,21 +156,24 @@ static struct render_kernel render_kernels_gen4[] = {
{
"PS_SUBPIC",
PS_SUBPIC_KERNEL,
ps_subpic_kernel_static,
sizeof(ps_subpic_kernel_static),
NULL
}
};
static struct render_kernel render_kernels_gen5[] = {
static struct i965_kernel render_kernels_gen5[] = {
{
"SF",
SF_KERNEL,
sf_kernel_static_gen5,
sizeof(sf_kernel_static_gen5),
NULL
},
{
"PS",
PS_KERNEL,
ps_kernel_static_gen5,
sizeof(ps_kernel_static_gen5),
NULL
......@@ -184,21 +181,24 @@ static struct render_kernel render_kernels_gen5[] = {
{
"PS_SUBPIC",
PS_SUBPIC_KERNEL,
ps_subpic_kernel_static_gen5,
sizeof(ps_subpic_kernel_static_gen5),
NULL
}
};
static struct render_kernel render_kernels_gen6[] = {
static struct i965_kernel render_kernels_gen6[] = {
{
"SF",
SF_KERNEL,
sf_kernel_static_gen6,
sizeof(sf_kernel_static_gen6),
NULL
},
{
"PS",
PS_KERNEL,
ps_kernel_static_gen6,
sizeof(ps_kernel_static_gen6),
NULL
......@@ -206,13 +206,14 @@ static struct render_kernel render_kernels_gen6[] = {
{
"PS_SUBPIC",
PS_SUBPIC_KERNEL,
ps_subpic_kernel_static_gen6,
sizeof(ps_subpic_kernel_static_gen6),
NULL
}
};
static struct render_kernel *render_kernels = NULL;
static struct i965_kernel *render_kernels = NULL;
#define NUM_RENDER_KERNEL (sizeof(render_kernels_gen4)/sizeof(render_kernels_gen4[0]))
......@@ -2094,7 +2095,7 @@ i965_render_init(VADriverContextP ctx)
render_kernels = render_kernels_gen4;
for (i = 0; i < NUM_RENDER_KERNEL; i++) {
struct render_kernel *kernel = &render_kernels[i];
struct i965_kernel *kernel = &render_kernels[i];
if (!kernel->size)
continue;
......@@ -2127,7 +2128,7 @@ i965_render_terminate(VADriverContextP ctx)
render_state->curbe.bo = NULL;
for (i = 0; i < NUM_RENDER_KERNEL; i++) {
struct render_kernel *kernel = &render_kernels[i];
struct i965_kernel *kernel = &render_kernels[i];
dri_bo_unreference(kernel->bo);
kernel->bo = NULL;
......
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