Commit 6f2ee2b9 authored by Xiang, Haihao's avatar Xiang, Haihao

va: remove i965 driver from libva repository

Signed-off-by: default avatarXiang, Haihao <haihao.xiang@intel.com>
parent 06891b17
......@@ -26,9 +26,6 @@ SUBDIRS = va test
if BUILD_DUMMY_DRIVER
SUBDIRS += dummy_drv_video
endif
if BUILD_I965_DRIVER
SUBDIRS += i965_drv_video
endif
pcfiles = libva.pc libva-tpi.pc
pcfiles += libva-x11.pc
......
......@@ -77,11 +77,6 @@ AC_ARG_ENABLE(dummy-backend,
[build dummy libva backend])],
[], [enable_dummy_backend=no])
AC_ARG_ENABLE(i965-driver,
[AC_HELP_STRING([--enable-i965-driver],
[build i965 video driver])],
[], [enable_i965_driver=no])
AC_ARG_WITH(drivers-path,
[AC_HELP_STRING([--with-drivers-path=[[path]]], [drivers path])],,
[with_drivers_path="$libdir/dri"])
......@@ -105,13 +100,6 @@ PKG_CHECK_MODULES([DRM], [libdrm])
PKG_CHECK_MODULES(GEN4ASM, [intel-gen4asm >= 1.2], [gen4asm=yes], [gen4asm=no])
AM_CONDITIONAL(HAVE_GEN4ASM, test x$gen4asm = xyes)
# Check for libdrm >= 2.4.23 (needed for i965_drv_video.so)
if test x$enable_i965_driver = xyes && ! $PKG_CONFIG --atleast-version=2.4.23 libdrm; then
AC_MSG_WARN([libdrm < 2.4.23 found, disabling build of i965 video driver])
enable_i965_driver=no
fi
AM_CONDITIONAL(BUILD_I965_DRIVER, test x$enable_i965_driver = xyes)
if test x$enable_dummy_backend = xyes; then
PKG_CHECK_MODULES([UDEV], [libudev], [libudev=yes], [libudev=no])
fi
......@@ -171,15 +159,6 @@ AC_OUTPUT([
va/egl/Makefile
va/dummy/Makefile
dummy_drv_video/Makefile
i965_drv_video/Makefile
i965_drv_video/shaders/Makefile
i965_drv_video/shaders/h264/Makefile
i965_drv_video/shaders/h264/mc/Makefile
i965_drv_video/shaders/mpeg2/Makefile
i965_drv_video/shaders/mpeg2/vld/Makefile
i965_drv_video/shaders/render/Makefile
i965_drv_video/shaders/post_processing/Makefile
i965_drv_video/shaders/vme/Makefile
test/Makefile
test/basic/Makefile
test/decode/Makefile
......@@ -203,7 +182,6 @@ echo "
echo " Prefix: ${prefix}"
echo ""
AS_IF([test x$enable_i965_driver = xyes], [DRIVERS="i965 $DRIVERS"])
AS_IF([test x$enable_dummy_driver = xyes], [DRIVERS="dummy $DRIVERS"])
echo " Drivers: ${DRIVERS}"
......
# Copyright (c) 2007 Intel Corporation. All Rights Reserved.
#
# Permission is hereby granted, free of charge, to any person obtaining a
# copy of this software and associated documentation files (the
# "Software"), to deal in the Software without restriction, including
# without limitation the rights to use, copy, modify, merge, publish,
# distribute, sub license, and/or sell copies of the Software, and to
# permit persons to whom the Software is furnished to do so, subject to
# the following conditions:
#
# The above copyright notice and this permission notice (including the
# next paragraph) shall be included in all copies or substantial portions
# of the Software.
#
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
# OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
# MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
# IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR
# ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
# TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
# SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
SUBDIRS = shaders
INCLUDES = \
-I$(top_srcdir) \
-I$(top_srcdir)/va \
-I$(top_srcdir)/va/x11 \
-DPTHREADS \
$(DRM_CFLAGS) \
$(NULL)
driver_cflags = \
-Wall \
-fvisibility=hidden \
$(NULL)
driver_ldflags = \
-module -avoid-version \
-no-undefined \
-Wl,--no-undefined \
$(DRM_LIBS) -ldrm_intel \
$(NULL)
source_c = \
gen6_mfc.c \
gen6_mfd.c \
gen6_vme.c \
gen7_mfd.c \
i965_avc_bsd.c \
i965_avc_hw_scoreboard.c\
i965_avc_ildb.c \
i965_drv_video.c \
i965_encoder.c \
i965_media.c \
i965_media_h264.c \
i965_media_mpeg2.c \
i965_post_processing.c \
i965_render.c \
intel_batchbuffer.c \
intel_batchbuffer_dump.c\
intel_driver.c \
intel_memman.c \
object_heap.c \
$(NULL)
source_h = \
gen6_mfc.h \
gen6_mfd.h \
gen6_vme.h \
gen7_mfd.h \
i965_avc_bsd.h \
i965_avc_hw_scoreboard.h\
i965_avc_ildb.h \
i965_defines.h \
i965_drv_video.h \
i965_encoder.h \
i965_media.h \
i965_media_h264.h \
i965_media_mpeg2.h \
i965_mutext.h \
i965_post_processing.h \
i965_render.h \
i965_structs.h \
intel_batchbuffer.h \
intel_batchbuffer_dump.h\
intel_compiler.h \
intel_driver.h \
intel_memman.h \
object_heap.h \
$(NULL)
i965_drv_video_la_LTLIBRARIES = i965_drv_video.la
i965_drv_video_ladir = $(LIBVA_DRIVERS_PATH)
i965_drv_video_la_CFLAGS = $(driver_cflags)
i965_drv_video_la_LDFLAGS = $(driver_ldflags)
i965_drv_video_la_LIBADD = $(top_builddir)/va/libva-x11.la -lpthread
i965_drv_video_la_SOURCES = $(source_c)
noinst_HEADERS = $(source_h)
This diff is collapsed.
/*
* Copyright © 2010 Intel Corporation
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sub license, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
* The above copyright notice and this permission notice (including the
* next paragraph) shall be included in all copies or substantial portions
* of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
* IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR
* ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* Authors:
* Zhou Chang <chang.zhou@intel.com>
*
*/
#ifndef _GEN6_MFC_H_
#define _GEN6_MFC_H_
#include <xf86drm.h>
#include <drm.h>
#include <i915_drm.h>
#include <intel_bufmgr.h>
struct encode_state;
#define MAX_MFC_REFERENCE_SURFACES 16
#define NUM_MFC_DMV_BUFFERS 34
struct gen6_mfc_context
{
struct {
unsigned int width;
unsigned int height;
unsigned int w_pitch;
unsigned int h_pitch;
} surface_state;
//MFX_PIPE_BUF_ADDR_STATE
struct {
dri_bo *bo;
} post_deblocking_output; //OUTPUT: reconstructed picture
struct {
dri_bo *bo;
} pre_deblocking_output; //OUTPUT: reconstructed picture with deblocked
struct {
dri_bo *bo;
} uncompressed_picture_source; //INPUT: original compressed image
struct {
dri_bo *bo;
} intra_row_store_scratch_buffer; //INTERNAL:
struct {
dri_bo *bo;
} deblocking_filter_row_store_scratch_buffer; //INTERNAL:
struct {
dri_bo *bo;
} reference_surfaces[MAX_MFC_REFERENCE_SURFACES]; //INTERNAL: refrence surfaces
//MFX_IND_OBJ_BASE_ADDR_STATE
struct{
dri_bo *bo;
} mfc_indirect_mv_object; //INPUT: the blocks' mv info
struct {
dri_bo *bo;
int offset;
} mfc_indirect_pak_bse_object; //OUTPUT: the compressed bitstream
//MFX_BSP_BUF_BASE_ADDR_STATE
struct {
dri_bo *bo;
}bsd_mpc_row_store_scratch_buffer; //INTERNAL:
//MFX_AVC_DIRECTMODE_STATE
struct {
dri_bo *bo;
}direct_mv_buffers[NUM_MFC_DMV_BUFFERS]; //INTERNAL: 0-31 as input,32 and 33 as output
};
VAStatus
gen6_mfc_pipeline(VADriverContextP ctx,
VAProfile profile,
struct encode_state *encode_state,
struct gen6_encoder_context *gen6_encoder_context);
Bool gen6_mfc_context_init(VADriverContextP ctx, struct gen6_mfc_context *mfc_context);
Bool gen6_mfc_context_destroy(struct gen6_mfc_context *mfc_context);
#endif /* _GEN6_MFC_BCS_H_ */
This diff is collapsed.
/*
* Copyright © 2010 Intel Corporation
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sub license, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
* The above copyright notice and this permission notice (including the
* next paragraph) shall be included in all copies or substantial portions
* of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
* IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR
* ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* Authors:
* Xiang Haihao <haihao.xiang@intel.com>
*
*/
#ifndef _GEN6_MFD_H_
#define _GEN6_MFD_H_
#include <xf86drm.h>
#include <drm.h>
#include <i915_drm.h>
#include <intel_bufmgr.h>
struct gen6_avc_surface
{
dri_bo *dmv_top;
dri_bo *dmv_bottom;
int dmv_bottom_flag;
};
#define GEN6_VC1_I_PICTURE 0
#define GEN6_VC1_P_PICTURE 1
#define GEN6_VC1_B_PICTURE 2
#define GEN6_VC1_BI_PICTURE 3
#define GEN6_VC1_SKIPPED_PICTURE 4
#define GEN6_VC1_SIMPLE_PROFILE 0
#define GEN6_VC1_MAIN_PROFILE 1
#define GEN6_VC1_ADVANCED_PROFILE 2
#define GEN6_VC1_RESERVED_PROFILE 3
struct gen6_vc1_surface
{
dri_bo *dmv;
int picture_type;
};
#define MAX_MFX_REFERENCE_SURFACES 16
struct hw_context;
struct gen6_mfd_context
{
struct hw_context base;
struct {
VASurfaceID surface_id;
int frame_store_id;
} reference_surface[MAX_MFX_REFERENCE_SURFACES];
struct {
dri_bo *bo;
int valid;
} post_deblocking_output;
struct {
dri_bo *bo;
int valid;
} pre_deblocking_output;
struct {
dri_bo *bo;
int valid;
} intra_row_store_scratch_buffer;
struct {
dri_bo *bo;
int valid;
} deblocking_filter_row_store_scratch_buffer;
struct {
dri_bo *bo;
int valid;
} bsd_mpc_row_store_scratch_buffer;
struct {
dri_bo *bo;
int valid;
} mpr_row_store_scratch_buffer;
struct {
dri_bo *bo;
int valid;
} bitplane_read_buffer;
};
#endif /* _GEN6_MFD_H_ */
This diff is collapsed.
/*
* Copyright © 2009 Intel Corporation
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sub license, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
* The above copyright notice and this permission notice (including the
* next paragraph) shall be included in all copies or substantial portions
* of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
* IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR
* ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
* SOFTWAR
*
* Authors:
* Zhou Chang <chang.zhou@intel.com>
*
*/
#ifndef _GEN6_VME_H_
#define _GEN6_VME_H_
#include <xf86drm.h>
#include <drm.h>
#include <i915_drm.h>
#include <intel_bufmgr.h>
#define MAX_INTERFACE_DESC_GEN6 32
#define MAX_MEDIA_SURFACES_GEN6 34
#define GEN6_VME_KERNEL_NUMBER 2
struct encode_state;
struct gen6_encoder_context;
struct gen6_vme_context
{
struct {
dri_bo *bo;
} surface_state_binding_table;
struct {
dri_bo *bo;
} idrt; /* interface descriptor remap table */
struct {
dri_bo *bo;
} curbe;
struct {
unsigned int gpgpu_mode:1;
unsigned int max_num_threads:16;
unsigned int num_urb_entries:8;
unsigned int urb_entry_size:16;
unsigned int curbe_allocation_size:16;
} vfe_state;
struct {
dri_bo *bo;
} vme_state;
struct {
dri_bo *bo;
unsigned int num_blocks;
unsigned int size_block; /* in bytes */
unsigned int pitch;
} vme_output;
struct i965_kernel vme_kernels[GEN6_VME_KERNEL_NUMBER];
};
VAStatus gen6_vme_pipeline(VADriverContextP ctx,
VAProfile profile,
struct encode_state *encode_state,
struct gen6_encoder_context *gen6_encoder_context);
Bool gen6_vme_context_init(VADriverContextP ctx, struct gen6_vme_context *vme_context);
Bool gen6_vme_context_destroy(struct gen6_vme_context *vme_context);
#endif /* _GEN6_VME_H_ */
This diff is collapsed.
/*
* Copyright © 2011 Intel Corporation
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sub license, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
* The above copyright notice and this permission notice (including the
* next paragraph) shall be included in all copies or substantial portions
* of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
* IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR
* ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* Authors:
* Xiang Haihao <haihao.xiang@intel.com>
*
*/
#ifndef _GEN7_MFD_H_
#define _GEN7_MFD_H_
#include <xf86drm.h>
#include <drm.h>
#include <i915_drm.h>
#include <intel_bufmgr.h>
struct gen7_avc_surface
{
dri_bo *dmv_top;
dri_bo *dmv_bottom;
int dmv_bottom_flag;
};
#define GEN7_VC1_I_PICTURE 0
#define GEN7_VC1_P_PICTURE 1
#define GEN7_VC1_B_PICTURE 2
#define GEN7_VC1_BI_PICTURE 3
#define GEN7_VC1_SKIPPED_PICTURE 4
#define GEN7_VC1_SIMPLE_PROFILE 0
#define GEN7_VC1_MAIN_PROFILE 1
#define GEN7_VC1_ADVANCED_PROFILE 2
#define GEN7_VC1_RESERVED_PROFILE 3
struct gen7_vc1_surface
{
dri_bo *dmv;
int picture_type;
};
#define MAX_MFX_REFERENCE_SURFACES 16
struct hw_context;
struct gen7_mfd_context
{
struct hw_context base;
struct {
VASurfaceID surface_id;
int frame_store_id;
} reference_surface[MAX_MFX_REFERENCE_SURFACES];
struct {
dri_bo *bo;
int valid;
} post_deblocking_output;
struct {
dri_bo *bo;
int valid;
} pre_deblocking_output;
struct {
dri_bo *bo;
int valid;
} intra_row_store_scratch_buffer;
struct {
dri_bo *bo;
int valid;
} deblocking_filter_row_store_scratch_buffer;
struct {
dri_bo *bo;
int valid;
} bsd_mpc_row_store_scratch_buffer;
struct {
dri_bo *bo;
int valid;
} mpr_row_store_scratch_buffer;
struct {
dri_bo *bo;
int valid;
} bitplane_read_buffer;
};
#endif /* _GEN7_MFD_H_ */
This diff is collapsed.
/*
* Copyright © 2010 Intel Corporation
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sub license, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
* The above copyright notice and this permission notice (including the
* next paragraph) shall be included in all copies or substantial portions
* of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
* IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR
* ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* Authors:
* Xiang Haihao <haihao.xiang@intel.com>
*
*/
#ifndef __I965_AVC_BSD_H__
#define __I965_AVC_BSD_H__
#define DMV_SIZE 0x88000 /* 557056 bytes for a frame */
struct i965_avc_bsd_context
{
struct {
dri_bo *bo;
} bsd_raw_store;
struct {
dri_bo *bo;
} mpr_row_store;
};
struct i965_avc_bsd_surface
{
struct i965_avc_bsd_context *ctx;
dri_bo *dmv_top;
dri_bo *dmv_bottom;
int dmv_bottom_flag;
};
void i965_avc_bsd_pipeline(VADriverContextP, struct decode_state *, void *h264_context);
void i965_avc_bsd_decode_init(VADriverContextP, void *h264_context);
Bool i965_avc_bsd_ternimate(struct i965_avc_bsd_context *);
#endif /* __I965_AVC_BSD_H__ */
This diff is collapsed.
/*
* Copyright © 2010 Intel Corporation
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sub license, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
* The above copyright notice and this permission notice (including the
* next paragraph) shall be included in all copies or substantial portions
* of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
* IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR
* ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* Authors:
* Xiang Haihao <haihao.xiang@intel.com>
*
*/
#ifndef __I965_AVC_HW_SCOREBOARD_H__
#define __I965_AVC_HW_SCOREBOARD_H__
struct i965_avc_hw_scoreboard_context
{
struct {
unsigned int num_mb_cmds;
unsigned int starting_mb_number;
unsigned int pic_width_in_mbs;
} inline_data;
struct {
dri_bo *ss_bo;
dri_bo *s_bo;
unsigned int total_mbs;
} surface;
struct {
dri_bo *bo;
} binding_table;
struct {
dri_bo *bo;
} idrt;
struct {
dri_bo *bo;
} vfe_state;
struct {
dri_bo *bo;
int upload;
} curbe;
struct {
dri_bo *bo;
unsigned long offset;
} hw_kernel;
struct {
unsigned int vfe_start;
unsigned int cs_start;
unsigned int num_vfe_entries;
unsigned int num_cs_entries;
unsigned int size_vfe_entry;
unsigned int size_cs_entry;
} urb;
};
void i965_avc_hw_scoreboard(VADriverContextP, struct decode_state *, void *h264_context);
void i965_avc_hw_scoreboard_decode_init(VADriverContextP, void *h264_context);
Bool i965_avc_hw_scoreboard_ternimate(struct i965_avc_hw_scoreboard_context *);
#endif /* __I965_AVC_HW_SCOREBOARD_H__ */
This diff is collapsed.
/*
* Copyright © 2010 Intel Corporation
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sub license, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
* The above copyright notice and this permission notice (including the
* next paragraph) shall be included in all copies or substantial portions
* of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
* IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR
* ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* Authors:
* Xiang Haihao <haihao.xiang@intel.com>
*
*/
#ifndef __I965_AVC_ILDB_H__
#define __I965_AVC_ILDB_H__
#define SURFACE_EDGE_CONTROL_DATA 0
#define SURFACE_SRC_Y 1
#define SURFACE_SRC_UV 2
#define SURFACE_DEST_Y 3
#define SURFACE_DEST_UV 4
#define NUM_AVC_ILDB_SURFACES 5
#define EDGE_CONTROL_DATA_IN_DWS 16
#define EDGE_CONTROL_DATA_IN_BTYES 64
struct i965_avc_ildb_context
{
struct {
dri_bo *bo;
} curbe;
struct {
dri_bo *ss_bo;
dri_bo *s_bo;
unsigned long offset;
int surface_type;
int width;
int height;
int depth;
int pitch;
int format;
int vert_line_stride;
int vert_line_stride_ofs;
int is_target;
} surface[NUM_AVC_ILDB_SURFACES];
struct {
dri_bo *bo;
} binding_table;
struct {
dri_bo *bo;
} idrt;
struct {
dri_bo *bo;
} vfe_state;
struct {
unsigned int vfe_start;
unsigned int cs_start;
unsigned int num_vfe_entries;
unsigned int num_cs_entries;
unsigned int size_vfe_entry;
unsigned int size_cs_entry;
} urb;
int picture_type;
int mbs_per_picture;
};
void i965_avc_ildb(VADriverContextP, struct decode_state *, void *h264_context);
void i965_avc_ildb_decode_init(VADriverContextP, void *h264_context);
Bool i965_avc_ildb_ternimate(struct i965_avc_ildb_context *);
#endif /* __I965_AVC_ILDB_H__ */
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
/*
* Copyright © 2010 Intel Corporation
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sub license, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
* The above copyright notice and this permission notice (including the
* next paragraph) shall be included in all copies or substantial portions
* of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
* IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR
* ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* Authors:
* Zhou Chang <chang.zhou@intel.com>
*
*/
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <assert.h>
#include <va/va_backend.h>
#include "intel_batchbuffer.h"
#include "intel_driver.h"
#include "i965_defines.h"
#include "i965_drv_video.h"
#include "i965_encoder.h"
static void
gen6_encoder_end_picture(VADriverContextP ctx,
VAProfile profile,
union codec_state *codec_state,
struct hw_context *hw_context)
{
struct gen6_encoder_context *gen6_encoder_context = (struct gen6_encoder_context *)hw_context;
struct encode_state *encode_state = &codec_state->enc;
VAStatus vaStatus;
vaStatus = gen6_vme_pipeline(ctx, profile, encode_state, gen6_encoder_context);
if (vaStatus == VA_STATUS_SUCCESS)
gen6_mfc_pipeline(ctx, profile, encode_state, gen6_encoder_context);
}
static void
gen6_encoder_context_destroy(void *hw_context)
{
struct gen6_encoder_context *gen6_encoder_context = (struct gen6_encoder_context *)hw_context;
gen6_mfc_context_destroy(&gen6_encoder_context->mfc_context);
gen6_vme_context_destroy(&gen6_encoder_context->vme_context);
intel_batchbuffer_free(gen6_encoder_context->base.batch);
free(gen6_encoder_context);
}
struct hw_context *
gen6_enc_hw_context_init(VADriverContextP ctx, VAProfile profile)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct gen6_encoder_context *gen6_encoder_context = calloc(1, sizeof(struct gen6_encoder_context));
gen6_encoder_context->base.destroy = gen6_encoder_context_destroy;
gen6_encoder_context->base.run = gen6_encoder_end_picture;
gen6_encoder_context->base.batch = intel_batchbuffer_new(intel, I915_EXEC_RENDER);
gen6_vme_context_init(ctx, &gen6_encoder_context->vme_context);
gen6_mfc_context_init(ctx, &gen6_encoder_context->mfc_context);
return (struct hw_context *)gen6_encoder_context;
}
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
SUBDIRS = h264 mpeg2 render post_processing vme
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment