Commit 6310eeee authored by Xiang, Haihao's avatar Xiang, Haihao

i965_drv_video: Eanble VAAPI on IGDNG

parent c5133efd
...@@ -321,5 +321,6 @@ ...@@ -321,5 +321,6 @@
#define I965_TILEWALK_XMAJOR 0 #define I965_TILEWALK_XMAJOR 0
#define I965_TILEWALK_YMAJOR 1 #define I965_TILEWALK_YMAJOR 1
#define URB_SIZE(intel) (IS_G4X(intel->device_id) ? 384 : 256) #define URB_SIZE(intel) (IS_IGDNG(intel->device_id) ? 1024 : \
IS_G4X(intel->device_id) ? 384 : 256)
#endif /* _I965_DEFINES_H_ */ #endif /* _I965_DEFINES_H_ */
...@@ -1105,7 +1105,8 @@ i965_Init(VADriverContextP ctx) ...@@ -1105,7 +1105,8 @@ i965_Init(VADriverContextP ctx)
if (intel_driver_init(ctx) == False) if (intel_driver_init(ctx) == False)
return VA_STATUS_ERROR_UNKNOWN; return VA_STATUS_ERROR_UNKNOWN;
if (!IS_G4X(i965->intel.device_id)) if (!IS_G4X(i965->intel.device_id) &&
!IS_IGDNG(i965->intel.device_id))
return VA_STATUS_ERROR_UNKNOWN; return VA_STATUS_ERROR_UNKNOWN;
if (i965_media_init(ctx) == False) if (i965_media_init(ctx) == False)
......
...@@ -71,14 +71,29 @@ i965_media_urb_layout(VADriverContextP ctx) ...@@ -71,14 +71,29 @@ i965_media_urb_layout(VADriverContextP ctx)
static void static void
i965_media_state_base_address(VADriverContextP ctx) i965_media_state_base_address(VADriverContextP ctx)
{ {
BEGIN_BATCH(ctx, 6); struct i965_driver_data *i965 = i965_driver_data(ctx);
OUT_BATCH(ctx, CMD_STATE_BASE_ADDRESS | 4);
OUT_BATCH(ctx, 0 | BASE_ADDRESS_MODIFY); if (IS_IGDNG(i965->intel.device_id)) {
OUT_BATCH(ctx, 0 | BASE_ADDRESS_MODIFY); BEGIN_BATCH(ctx, 8);
OUT_BATCH(ctx, 0 | BASE_ADDRESS_MODIFY); OUT_BATCH(ctx, CMD_STATE_BASE_ADDRESS | 6);
OUT_BATCH(ctx, 0 | BASE_ADDRESS_MODIFY); OUT_BATCH(ctx, 0 | BASE_ADDRESS_MODIFY);
OUT_BATCH(ctx, 0 | BASE_ADDRESS_MODIFY); OUT_BATCH(ctx, 0 | BASE_ADDRESS_MODIFY);
ADVANCE_BATCH(ctx); OUT_BATCH(ctx, 0 | BASE_ADDRESS_MODIFY);
OUT_BATCH(ctx, 0 | BASE_ADDRESS_MODIFY);
OUT_BATCH(ctx, 0 | BASE_ADDRESS_MODIFY);
OUT_BATCH(ctx, 0 | BASE_ADDRESS_MODIFY);
OUT_BATCH(ctx, 0 | BASE_ADDRESS_MODIFY);
ADVANCE_BATCH(ctx);
} else {
BEGIN_BATCH(ctx, 6);
OUT_BATCH(ctx, CMD_STATE_BASE_ADDRESS | 4);
OUT_BATCH(ctx, 0 | BASE_ADDRESS_MODIFY);
OUT_BATCH(ctx, 0 | BASE_ADDRESS_MODIFY);
OUT_BATCH(ctx, 0 | BASE_ADDRESS_MODIFY);
OUT_BATCH(ctx, 0 | BASE_ADDRESS_MODIFY);
OUT_BATCH(ctx, 0 | BASE_ADDRESS_MODIFY);
ADVANCE_BATCH(ctx);
}
} }
static void static void
......
...@@ -158,7 +158,7 @@ static uint32_t field_bidirect_16x8_kernel[][4] = { ...@@ -158,7 +158,7 @@ static uint32_t field_bidirect_16x8_kernel[][4] = {
#include "shaders/mpeg2/vld/field_bidirect_16x8.g4b" #include "shaders/mpeg2/vld/field_bidirect_16x8.g4b"
}; };
static struct media_kernel mpeg2_vld_kernels[] = { static struct media_kernel mpeg2_vld_kernels_gen4[] = {
{ {
"FRAME_INTRA", "FRAME_INTRA",
FRAME_INTRA, FRAME_INTRA,
...@@ -280,7 +280,179 @@ static struct media_kernel mpeg2_vld_kernels[] = { ...@@ -280,7 +280,179 @@ static struct media_kernel mpeg2_vld_kernels[] = {
} }
}; };
#define NUM_MPEG2_VLD_KERNELS (sizeof(mpeg2_vld_kernels)/sizeof(mpeg2_vld_kernels[0])) /* On IGDNG */
static uint32_t frame_intra_kernel_gen5[][4] = {
#include "shaders/mpeg2/vld/frame_intra.g4b.gen5"
};
static uint32_t frame_frame_pred_forward_kernel_gen5[][4] = {
#include "shaders/mpeg2/vld/frame_frame_pred_forward.g4b.gen5"
};
static uint32_t frame_frame_pred_backward_kernel_gen5[][4] = {
#include "shaders/mpeg2/vld/frame_frame_pred_backward.g4b.gen5"
};
static uint32_t frame_frame_pred_bidirect_kernel_gen5[][4] = {
#include "shaders/mpeg2/vld/frame_frame_pred_bidirect.g4b.gen5"
};
static uint32_t frame_field_pred_forward_kernel_gen5[][4] = {
#include "shaders/mpeg2/vld/frame_field_pred_forward.g4b.gen5"
};
static uint32_t frame_field_pred_backward_kernel_gen5[][4] = {
#include "shaders/mpeg2/vld/frame_field_pred_backward.g4b.gen5"
};
static uint32_t frame_field_pred_bidirect_kernel_gen5[][4] = {
#include "shaders/mpeg2/vld/frame_field_pred_bidirect.g4b.gen5"
};
static uint32_t lib_kernel_gen5[][4] = {
#include "shaders/mpeg2/vld/lib.g4b.gen5"
};
/*field picture*/
static uint32_t field_intra_kernel_gen5[][4] = {
#include "shaders/mpeg2/vld/field_intra.g4b.gen5"
};
static uint32_t field_forward_kernel_gen5[][4] = {
#include "shaders/mpeg2/vld/field_forward.g4b.gen5"
};
static uint32_t field_forward_16x8_kernel_gen5[][4] = {
#include "shaders/mpeg2/vld/field_forward_16x8.g4b.gen5"
};
static uint32_t field_backward_kernel_gen5[][4] = {
#include "shaders/mpeg2/vld/field_backward.g4b.gen5"
};
static uint32_t field_backward_16x8_kernel_gen5[][4] = {
#include "shaders/mpeg2/vld/field_backward_16x8.g4b.gen5"
};
static uint32_t field_bidirect_kernel_gen5[][4] = {
#include "shaders/mpeg2/vld/field_bidirect.g4b.gen5"
};
static uint32_t field_bidirect_16x8_kernel_gen5[][4] = {
#include "shaders/mpeg2/vld/field_bidirect_16x8.g4b.gen5"
};
static struct media_kernel mpeg2_vld_kernels_gen5[] = {
{
"FRAME_INTRA",
FRAME_INTRA,
frame_intra_kernel_gen5,
sizeof(frame_intra_kernel_gen5),
NULL
},
{
"FRAME_FRAME_PRED_FORWARD",
FRAME_FRAME_PRED_FORWARD,
frame_frame_pred_forward_kernel_gen5,
sizeof(frame_frame_pred_forward_kernel_gen5),
NULL
},
{
"FRAME_FRAME_PRED_BACKWARD",
FRAME_FRAME_PRED_BACKWARD,
frame_frame_pred_backward_kernel_gen5,
sizeof(frame_frame_pred_backward_kernel_gen5),
NULL
},
{
"FRAME_FRAME_PRED_BIDIRECT",
FRAME_FRAME_PRED_BIDIRECT,
frame_frame_pred_bidirect_kernel_gen5,
sizeof(frame_frame_pred_bidirect_kernel_gen5),
NULL
},
{
"FRAME_FIELD_PRED_FORWARD",
FRAME_FIELD_PRED_FORWARD,
frame_field_pred_forward_kernel_gen5,
sizeof(frame_field_pred_forward_kernel_gen5),
NULL
},
{
"FRAME_FIELD_PRED_BACKWARD",
FRAME_FIELD_PRED_BACKWARD,
frame_field_pred_backward_kernel_gen5,
sizeof(frame_field_pred_backward_kernel_gen5),
NULL
},
{
"FRAME_FIELD_PRED_BIDIRECT",
FRAME_FIELD_PRED_BIDIRECT,
frame_field_pred_bidirect_kernel_gen5,
sizeof(frame_field_pred_bidirect_kernel_gen5),
NULL
},
{
"LIB",
LIB_INTERFACE,
lib_kernel_gen5,
sizeof(lib_kernel_gen5),
NULL
},
{
"FIELD_INTRA",
FIELD_INTRA,
field_intra_kernel_gen5,
sizeof(field_intra_kernel_gen5),
NULL
},
{
"FIELD_FORWARD",
FIELD_FORWARD,
field_forward_kernel_gen5,
sizeof(field_forward_kernel_gen5),
NULL
},
{
"FIELD_FORWARD_16X8",
FIELD_FORWARD_16X8,
field_forward_16x8_kernel_gen5,
sizeof(field_forward_16x8_kernel_gen5),
NULL
},
{
"FIELD_BACKWARD",
FIELD_BACKWARD,
field_backward_kernel_gen5,
sizeof(field_backward_kernel_gen5),
NULL
},
{
"FIELD_BACKWARD_16X8",
FIELD_BACKWARD_16X8,
field_backward_16x8_kernel_gen5,
sizeof(field_backward_16x8_kernel_gen5),
NULL
},
{
"FIELD_BIDIRECT",
FIELD_BIDIRECT,
field_bidirect_kernel_gen5,
sizeof(field_bidirect_kernel_gen5),
NULL
},
{
"FIELD_BIDIRECT_16X8",
FIELD_BIDIRECT_16X8,
field_bidirect_16x8_kernel_gen5,
sizeof(field_bidirect_16x8_kernel_gen5),
NULL
}
};
static struct media_kernel *mpeg2_vld_kernels = NULL;
#define NUM_MPEG2_VLD_KERNELS (sizeof(mpeg2_vld_kernels_gen4)/sizeof(mpeg2_vld_kernels_gen4[0]))
static void static void
i965_media_mpeg2_surface_state(VADriverContextP ctx, i965_media_mpeg2_surface_state(VADriverContextP ctx,
...@@ -747,8 +919,15 @@ i965_media_mpeg2_init(VADriverContextP ctx) ...@@ -747,8 +919,15 @@ i965_media_mpeg2_init(VADriverContextP ctx)
int i; int i;
/* kernel */ /* kernel */
assert(NUM_MPEG2_VLD_KERNELS == (sizeof(mpeg2_vld_kernels_gen5) /
sizeof(mpeg2_vld_kernels_gen5[0])));
assert(NUM_MPEG2_VLD_KERNELS <= MAX_INTERFACE_DESC); assert(NUM_MPEG2_VLD_KERNELS <= MAX_INTERFACE_DESC);
if (IS_IGDNG(i965->intel.device_id))
mpeg2_vld_kernels = mpeg2_vld_kernels_gen5;
else
mpeg2_vld_kernels = mpeg2_vld_kernels_gen4;
for (i = 0; i < NUM_MPEG2_VLD_KERNELS; i++) { for (i = 0; i < NUM_MPEG2_VLD_KERNELS; i++) {
struct media_kernel *kernel = &mpeg2_vld_kernels[i]; struct media_kernel *kernel = &mpeg2_vld_kernels[i];
kernel->bo = dri_bo_alloc(i965->intel.bufmgr, kernel->bo = dri_bo_alloc(i965->intel.bufmgr,
......
This diff is collapsed.
...@@ -107,6 +107,9 @@ struct intel_region ...@@ -107,6 +107,9 @@ struct intel_region
#define PCI_CHIP_G45_G 0x2E22 #define PCI_CHIP_G45_G 0x2E22
#define PCI_CHIP_G41_G 0x2E32 #define PCI_CHIP_G41_G 0x2E32
#define PCI_CHIP_IGDNG_D_G 0x0042
#define PCI_CHIP_IGDNG_M_G 0x0046
#define IS_G45(devid) (devid == PCI_CHIP_IGD_E_G || \ #define IS_G45(devid) (devid == PCI_CHIP_IGD_E_G || \
devid == PCI_CHIP_Q45_G || \ devid == PCI_CHIP_Q45_G || \
devid == PCI_CHIP_G45_G || \ devid == PCI_CHIP_G45_G || \
...@@ -114,4 +117,8 @@ struct intel_region ...@@ -114,4 +117,8 @@ struct intel_region
#define IS_GM45(devid) (devid == PCI_CHIP_GM45_GM) #define IS_GM45(devid) (devid == PCI_CHIP_GM45_GM)
#define IS_G4X(devid) (IS_G45(devid) || IS_GM45(devid)) #define IS_G4X(devid) (IS_G45(devid) || IS_GM45(devid))
#define IS_IGDNG_D(devid) (devid == PCI_CHIP_IGDNG_D_G)
#define IS_IGDNG_M(devid) (devid == PCI_CHIP_IGDNG_M_G)
#define IS_IGDNG(devid) (IS_IGDNG_D(devid) || IS_IGDNG_M(devid))
#endif /* _INTEL_DRIVER_H_ */ #endif /* _INTEL_DRIVER_H_ */
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