Commit 57c6d5cb authored by Zhou Chang's avatar Zhou Chang Committed by Xiang, Haihao

add inter frame support in vme.

parent 60b39eb7
......@@ -220,11 +220,11 @@ gen6_mfc_avc_img_state(VADriverContextP ctx)
OUT_BCS_BATCH(ctx, 0); /*Mainly about MB rate control and debug, just ignoring*/
OUT_BCS_BATCH(ctx, /*Inter and Intra Conformance Max size limit*/
(0xBB8 << 16) | /*InterMbMaxSz*/
(0xBB8) ); /*IntraMbMaxSz*/
(0xEE8) ); /*IntraMbMaxSz*/
OUT_BCS_BATCH(ctx, 0); /*Reserved*/
OUT_BCS_BATCH(ctx, 0); /*Slice QP Delta for bitrate control*/
OUT_BCS_BATCH(ctx, 0); /*Slice QP Delta for bitrate control*/
OUT_BCS_BATCH(ctx, 0x80200000);
OUT_BCS_BATCH(ctx, 0x8C000000);
OUT_BCS_BATCH(ctx, 0x00010000);
OUT_BCS_BATCH(ctx, 0);
......@@ -412,7 +412,7 @@ gen6_mfc_avc_pak_object_intra(VADriverContextP ctx, int x, int y, int end_mb, in
return len_in_dwords;
}
static int gen6_mfc_avc_pak_object_inter(VADriverContextP ctx, int x, int y, int end_mb, int qp, dri_bo *bo)
static int gen6_mfc_avc_pak_object_inter(VADriverContextP ctx, int x, int y, int end_mb, int qp, dri_bo *bo, unsigned int offset)
{
int len_in_dwords = 11;
......@@ -420,14 +420,14 @@ static int gen6_mfc_avc_pak_object_inter(VADriverContextP ctx, int x, int y, int
OUT_BCS_BATCH(ctx, MFC_AVC_PAK_OBJECT | (len_in_dwords - 2));
OUT_BCS_BATCH(ctx, 32); /* 1 MV : SKIP*/
OUT_BCS_BATCH(ctx, 32); /* 32 MV*/
OUT_BCS_RELOC(ctx, bo,
I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION,
0);
offset);
OUT_BCS_BATCH(ctx,
(1 << 24) | /* PackedMvNum, Debug*/
(4 << 20) | /* 8 MV*/
(4 << 20) | /* 8 MV, SNB don't use it*/
(1 << 19) | /* CbpDcY */
(1 << 18) | /* CbpDcU */
(1 << 17) | /* CbpDcV */
......@@ -525,7 +525,7 @@ void gen6_mfc_avc_pipeline_programing(VADriverContextP ctx, void *obj)
struct gen6_media_state *media_state = &i965->gen6_media_state;
VAEncSequenceParameterBufferH264 *pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param->buffer;
VAEncSliceParameterBuffer *pSliceParameter = (VAEncSliceParameterBuffer *)encode_state->slice_params[0]->buffer;
unsigned int *msg;
unsigned int *msg, offset;
int emit_new_state = 1, object_len_in_bytes;
int is_intra = pSliceParameter->slice_flags.bits.is_intra;
......@@ -535,8 +535,10 @@ void gen6_mfc_avc_pipeline_programing(VADriverContextP ctx, void *obj)
msg = (unsigned int *)media_state->vme_output.bo->virtual;
if ( is_intra == 0) { /*TODO: simulate VME result, [0,0] MVs*/
memset(media_state->vme_output.bo->virtual, 0, 128);
//memset(media_state->vme_output.bo->virtual, 0, 128);
//printf("msgs = %08x, %08x, %08x, %08x \n", msg[0], msg[1], msg[2], msg[3]);
dri_bo_unmap(media_state->vme_output.bo);
offset = 0;
}
for (y = 0; y < height_in_mbs; y++) {
......@@ -564,7 +566,8 @@ void gen6_mfc_avc_pipeline_programing(VADriverContextP ctx, void *obj)
if ( is_intra ) {
object_len_in_bytes = gen6_mfc_avc_pak_object_intra(ctx, x, y, last_mb, qp, msg);
} else {
object_len_in_bytes = gen6_mfc_avc_pak_object_inter(ctx, x, y, last_mb, qp, media_state->vme_output.bo);
object_len_in_bytes = gen6_mfc_avc_pak_object_inter(ctx, x, y, last_mb, qp, media_state->vme_output.bo,offset);
offset += 64;
}
msg += 4;
......
This diff is collapsed.
INTEL_G6B = intra_frame.g6b
INTEL_G6B = intra_frame.g6b inter_frame.g6b
EXTRA_DIST = $(INTEL_G6B)
......
/*
* Copyright © <2010>, Intel Corporation.
*
* This program is licensed under the terms and conditions of the
* Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
* http://www.opensource.org/licenses/eclipse-1.0.php.
*
*/
// Modual name: IntraFrame.asm
//
// Make intra predition estimation for Intra frame
//
//
// Now, begin source code....
//
include(`vme_header.inc')
/*inline input data: r5~r11*/
mov(1) r5.20<1>:UB r0.20<1,1,0>:UB {align1} ;
mov(8) m0.0<1>:UD r5.0<8,8,1>:UD {align1};
mov(8) m1.0<1>:UD r6.0<8,8,1>:UD {align1};
mov(8) m2.0<1>:UD r7.0<8,8,1>:UD {align1};
mov(8) m3.0<1>:UD r8.0<8,8,1>:UD {align1};
send(8) 0 r12 null vme(0,0,0,1) mlen 4 rlen 4 {align1};
mov(1) r9.20<1>:UB r0.20<1,1,0>:UB {align1} ;
mov(8) m0.0<1>:UD r9.0<8,8,1>:UD {align1 mask_disable};
/*
mov(8) m1.0<1>:UD r13.0<8,8,1>:UD {align1 mask_disable};
mov(8) m2.0<1>:UD r14.0<8,8,1>:UD {align1 mask_disable};
*/
mov(2) r9.0<1>:UW r13.0<2,2,1>:UB {align1 mask_disable};
mov(8) m1.0<1>:UD r9.0<8,8,0>:UD {align1 mask_disable};
mov(8) m2.0<1>:UD r9.0<8,8,0>:UD {align1 mask_disable};
/*
mov(16) m1.2<8:8:2>:UW r13.1<0,0,0>:UB {align1};
*/
/* bind index 3, write 2 oword, msg type: 8(OWord Block Write) */
send (16) 0 r13 null write(3, 3, 8, 1) mlen 3 rlen 1 {align1};
mov (8) m0.0<1>:UD r0<8,8,1>:UD {align1};
send (16) 0 acc0<1>UW null thread_spawner(0, 0, 1) mlen 1 rlen 0 {align1 EOT};
{ 0x00000001, 0x20b40231, 0x00200014, 0x00000000 },
{ 0x00600001, 0x20000022, 0x008d00a0, 0x00000000 },
{ 0x00600001, 0x20200022, 0x008d00c0, 0x00000000 },
{ 0x00600001, 0x20400022, 0x008d00e0, 0x00000000 },
{ 0x00600001, 0x20600022, 0x008d0100, 0x00000000 },
{ 0x08600031, 0x21801cdd, 0x00000000, 0x08482000 },
{ 0x00000001, 0x21340231, 0x00200014, 0x00000000 },
{ 0x00600201, 0x20000022, 0x008d0120, 0x00000000 },
{ 0x00200201, 0x21200229, 0x004501a0, 0x00000000 },
{ 0x00600201, 0x20200022, 0x008c0120, 0x00000000 },
{ 0x00600201, 0x20400022, 0x008c0120, 0x00000000 },
{ 0x05800031, 0x21a01cdd, 0x00000000, 0x061b0303 },
{ 0x00600001, 0x20000022, 0x008d0000, 0x00000000 },
{ 0x07800031, 0x24001cc8, 0x00000000, 0x82000010 },
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment