Commit 14e48034 authored by Zhou Chang's avatar Zhou Chang Committed by Xiang, Haihao

i965_drv_vidoe: Encoder on Sandy Bridge

Currently it supports Intra frame
Signed-off-by: default avatarZhou Chang <chang.zhou@intel.com>
Signed-off-by: default avatarXiang, Haihao <haihao.xiang@intel.com>
parent 261597ab
......@@ -178,6 +178,7 @@ AC_OUTPUT([
i965_drv_video/shaders/mpeg2/vld/Makefile
i965_drv_video/shaders/render/Makefile
i965_drv_video/shaders/post_processing/Makefile
i965_drv_video/shaders/vme/Makefile
test/Makefile
test/basic/Makefile
test/decode/Makefile
......
......@@ -44,7 +44,10 @@ i965_drv_video_la_SOURCES = \
i965_avc_hw_scoreboard.c\
i965_avc_ildb.c \
i965_post_processing.c \
gen6_mfd.c
gen6_mfd.c \
i965_encoder.c \
gen6_vme.c \
gen6_mfc.c
noinst_HEADERS = \
object_heap.h \
......@@ -63,4 +66,7 @@ noinst_HEADERS = \
i965_avc_hw_scoreboard.h\
i965_avc_ildb.h \
i965_post_processing.h \
gen6_mfd.h
gen6_mfd.h \
i965_encoder.h \
gen6_vme.h \
gen6_mfc.h
This diff is collapsed.
/*
* Copyright © 2010 Intel Corporation
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sub license, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
* The above copyright notice and this permission notice (including the
* next paragraph) shall be included in all copies or substantial portions
* of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
* IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR
* ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* Authors:
* Zhou Chang <chang.zhou@intel.com>
*
*/
#ifndef _GEN6_MFC_BCS_H_
#define _GEN6_MFC_BCS_H_
#include <xf86drm.h>
#include <drm.h>
#include <i915_drm.h>
#include <intel_bufmgr.h>
struct mfc_encode_state;
#define MAX_MFC_REFERENCE_SURFACES 16
#define NUM_MFC_DMV_BUFFERS 34
struct gen6_mfc_bcs_state
{
struct {
unsigned int width;
unsigned int height;
unsigned int w_pitch;
unsigned int h_pitch;
} surface_state;
//MFX_PIPE_BUF_ADDR_STATE
struct {
dri_bo *bo;
} post_deblocking_output; //OUTPUT: reconstructed picture
struct {
dri_bo *bo;
} pre_deblocking_output; //OUTPUT: reconstructed picture with deblocked
struct {
dri_bo *bo;
} uncompressed_picture_source; //INPUT: original compressed image
struct {
dri_bo *bo;
} intra_row_store_scratch_buffer; //INTERNAL:
struct {
dri_bo *bo;
} deblocking_filter_row_store_scratch_buffer; //INTERNAL:
struct {
VASurfaceID surface_id;
} reference_surfaces[MAX_MFC_REFERENCE_SURFACES]; //INTERNAL: refrence surfaces
//MFX_IND_OBJ_BASE_ADDR_STATE
struct{
dri_bo *bo;
} mfc_indirect_mv_object; //INPUT: the blocks' mv info
struct {
dri_bo *bo;
} mfc_indirect_pak_bse_object; //OUTPUT: the compressed bitstream
//MFX_BSP_BUF_BASE_ADDR_STATE
struct {
dri_bo *bo;
}bsd_mpc_row_store_scratch_buffer; //INTERNAL:
//MFX_AVC_DIRECTMODE_STATE
struct {
dri_bo *bo;
}direct_mv_buffers[NUM_MFC_DMV_BUFFERS]; //INTERNAL: 0-31 as input,32 and 33 as output
};
VAStatus gen6_mfc_pipeline(VADriverContextP ctx,
VAContextID context,
struct mfc_encode_state *encode_state);
#endif /* _GEN6_MFC_BCS_H_ */
This diff is collapsed.
/*
* Copyright © 2009 Intel Corporation
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sub license, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
* The above copyright notice and this permission notice (including the
* next paragraph) shall be included in all copies or substantial portions
* of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
* IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR
* ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
* SOFTWAR
*
* Authors:
* Zhou Chang <chang.zhou@intel.com>
*
*/
#ifndef _GEN6_MEDIA_H_
#define _GEN6_MEDIA_H_
#include <xf86drm.h>
#include <drm.h>
#include <i915_drm.h>
#include <intel_bufmgr.h>
#define MAX_INTERFACE_DESC_GEN6 32
#define MAX_MEDIA_SURFACES_GEN6 34
struct mfc_encode_state;
struct gen6_media_state
{
struct {
dri_bo *bo;
} surface_state[MAX_MEDIA_SURFACES_GEN6];
struct {
dri_bo *bo;
} binding_table;
struct {
dri_bo *bo;
} idrt; /* interface descriptor remap table */
struct {
dri_bo *bo;
} curbe;
struct {
unsigned int gpgpu_mode:1;
unsigned int max_num_threads:16;
unsigned int num_urb_entries:8;
unsigned int urb_entry_size:16;
unsigned int curb_size:16;
} vfe_state;
struct {
dri_bo *bo;
} vme_state;
struct {
dri_bo *bo;
unsigned int num_blocks;
unsigned int size_block; /* in bytes */
unsigned int pitch;
} vme_output;
};
VAStatus gen6_vme_media_pipeline(VADriverContextP ctx,
VAContextID context,
struct mfc_encode_state *encode_state);
Bool gen6_vme_init(VADriverContextP ctx);
Bool gen6_vme_terminate(VADriverContextP ctx);
#endif /* _GEN6_MEDIA_H_ */
......@@ -17,6 +17,9 @@
#define CMD_SAMPLER_PALETTE_LOAD CMD(3, 1, 2)
#define CMD_MEDIA_STATE_POINTERS CMD(2, 0, 0)
#define CMD_MEDIA_VFE_STATE CMD(2, 0, 0)
#define CMD_MEDIA_CURBE_LOAD CMD(2, 0, 1)
#define CMD_MEDIA_INTERFACE_LOAD CMD(2, 0, 2)
#define CMD_MEDIA_OBJECT CMD(2, 1, 0)
#define CMD_MEDIA_OBJECT_EX CMD(2, 1, 1)
......@@ -54,6 +57,8 @@
/* DW1 */
# define CMD_CLEAR_PARAMS_DEPTH_CLEAR_VALID (1 << 15)
#define CMD_PIPE_CONTROL CMD(3, 2, 0)
/* for GEN6+ */
#define GEN6_3DSTATE_SAMPLER_STATE_POINTERS CMD(3, 0, 0x02)
# define GEN6_3DSTATE_SAMPLER_STATE_MODIFY_PS (1 << 12)
......@@ -166,6 +171,10 @@
#define MFD_AVC_BSD_OBJECT MFX(2, 1, 1, 8)
#define MFC_AVC_FQM_STATE MFX(2, 1, 2, 2)
#define MFC_AVC_INSERT_OBJECT MFX(2, 1, 2, 8)
#define MFC_AVC_PAK_OBJECT MFX(2, 1, 2, 9)
#define MFX_MPEG2_PIC_STATE MFX(2, 3, 0, 0)
#define MFX_MPEG2_QM_STATE MFX(2, 3, 0, 1)
......
......@@ -41,6 +41,7 @@
#include "i965_media.h"
#include "i965_drv_video.h"
#include "i965_defines.h"
#include "i965_encoder.h"
#define CONFIG_ID_OFFSET 0x01000000
#define CONTEXT_ID_OFFSET 0x02000000
......@@ -62,6 +63,9 @@
#define HAS_TILED_SURFACE(ctx) (IS_GEN6((ctx)->intel.device_id) && \
(ctx)->render_state.interleaved_uv)
#define HAS_ENCODER(ctx) (IS_GEN6((ctx)->intel.device_id) && \
(ctx)->intel.has_bsd)
enum {
I965_SURFACETYPE_RGBA = 1,
I965_SURFACETYPE_YUV,
......@@ -181,6 +185,10 @@ i965_QueryConfigEntrypoints(VADriverContextP ctx,
case VAProfileH264High:
if (HAS_H264(i965))
entrypoint_list[n++] = VAEntrypointVLD;
if (HAS_ENCODER(i965))
entrypoint_list[n++] = VAEntrypointEncSlice;
break;
case VAProfileVC1Simple:
......@@ -217,6 +225,10 @@ i965_GetConfigAttributes(VADriverContextP ctx,
attrib_list[i].value = VA_RT_FORMAT_YUV420;
break;
case VAConfigAttribRateControl:
attrib_list[i].value = VA_RC_VBR;
break;
default:
/* Do nothing */
attrib_list[i].value = VA_ATTRIB_NOT_SUPPORTED;
......@@ -286,7 +298,8 @@ i965_CreateConfig(VADriverContextP ctx,
case VAProfileH264Baseline:
case VAProfileH264Main:
case VAProfileH264High:
if (HAS_H264(i965) && VAEntrypointVLD == entrypoint) {
if ((HAS_H264(i965) && VAEntrypointVLD == entrypoint) ||
(HAS_ENCODER(i965) && VAEntrypointEncSlice == entrypoint)) {
vaStatus = VA_STATUS_SUCCESS;
} else {
vaStatus = VA_STATUS_ERROR_UNSUPPORTED_ENTRYPOINT;
......@@ -546,7 +559,7 @@ i965_QuerySubpictureFormats(VADriverContextP ctx,
static void
i965_destroy_subpic(struct object_heap *heap, struct object_base *obj)
{
// struct object_subpic *obj_subpic = (struct object_subpic *)obj;
// struct object_subpic *obj_subpic = (struct object_subpic *)obj;
object_heap_free(heap, obj);
}
......@@ -682,7 +695,7 @@ i965_DeassociateSubpicture(VADriverContextP ctx,
return VA_STATUS_SUCCESS;
}
static void
void
i965_reference_buffer_store(struct buffer_store **ptr,
struct buffer_store *buffer_store)
{
......@@ -694,7 +707,7 @@ i965_reference_buffer_store(struct buffer_store **ptr,
}
}
static void
void
i965_release_buffer_store(struct buffer_store **ptr)
{
struct buffer_store *buffer_store = *ptr;
......@@ -788,16 +801,9 @@ i965_CreateContext(VADriverContextP ctx,
break;
}
obj_context->context_id = contextID;
*context = contextID;
memset(&obj_context->decode_state, 0, sizeof(obj_context->decode_state));
obj_context->decode_state.current_render_target = -1;
obj_context->decode_state.max_slice_params = NUM_SLICES;
obj_context->decode_state.max_slice_datas = NUM_SLICES;
obj_context->decode_state.slice_params = calloc(obj_context->decode_state.max_slice_params,
sizeof(*obj_context->decode_state.slice_params));
obj_context->decode_state.slice_datas = calloc(obj_context->decode_state.max_slice_datas,
sizeof(*obj_context->decode_state.slice_datas));
obj_context->flags = flag;
obj_context->context_id = contextID;
obj_context->config_id = config_id;
obj_context->picture_width = picture_width;
obj_context->picture_height = picture_height;
......@@ -814,7 +820,22 @@ i965_CreateContext(VADriverContextP ctx,
obj_context->render_targets[i] = render_targets[i];
}
obj_context->flags = flag;
if (VA_STATUS_SUCCESS == vaStatus) {
if (VAEntrypointEncSlice == obj_config->entrypoint ) { /*encode routin only*/
memset(&obj_context->encode_state, 0, sizeof(obj_context->encode_state));
vaStatus = i965_encoder_create_context(ctx, config_id, picture_width, picture_height,
flag, render_targets, num_render_targets, obj_context);
} else {
memset(&obj_context->decode_state, 0, sizeof(obj_context->decode_state));
obj_context->decode_state.current_render_target = -1;
obj_context->decode_state.max_slice_params = NUM_SLICES;
obj_context->decode_state.max_slice_datas = NUM_SLICES;
obj_context->decode_state.slice_params = calloc(obj_context->decode_state.max_slice_params,
sizeof(*obj_context->decode_state.slice_params));
obj_context->decode_state.slice_datas = calloc(obj_context->decode_state.max_slice_datas,
sizeof(*obj_context->decode_state.slice_datas));
}
}
/* Error recovery */
if (VA_STATUS_SUCCESS != vaStatus) {
......@@ -829,9 +850,19 @@ i965_DestroyContext(VADriverContextP ctx, VAContextID context)
{
struct i965_driver_data *i965 = i965_driver_data(ctx);
struct object_context *obj_context = CONTEXT(context);
struct object_config *obj_config;
VAContextID config;
assert(obj_context);
config = obj_context->config_id;
obj_config = CONFIG(config);
assert(obj_config);
if (VAEntrypointEncSlice == obj_config->entrypoint ){
i965_encoder_destroy_context(&i965->context_heap, (struct object_base *)obj_context);
} else {
i965_destroy_context(&i965->context_heap, (struct object_base *)obj_context);
}
return VA_STATUS_SUCCESS;
}
......@@ -873,6 +904,10 @@ i965_create_buffer_internal(VADriverContextP ctx,
case VAResidualDataBufferType:
case VADeblockingParameterBufferType:
case VAImageBufferType:
case VAEncCodedBufferType:
case VAEncSequenceParameterBufferType:
case VAEncPictureParameterBufferType:
case VAEncSliceParameterBufferType:
/* Ok */
break;
......@@ -902,7 +937,7 @@ i965_create_buffer_internal(VADriverContextP ctx,
if (data)
dri_bo_subdata(buffer_store->bo, 0, size * num_elements, data);
} else if (type == VASliceDataBufferType || type == VAImageBufferType) {
} else if (type == VASliceDataBufferType || type == VAImageBufferType || type == VAEncCodedBufferType) {
buffer_store->bo = dri_bo_alloc(i965->intel.bufmgr,
"Buffer",
size * num_elements, 64);
......@@ -1059,6 +1094,11 @@ i965_BeginPicture(VADriverContextP ctx,
obj_config = CONFIG(config);
assert(obj_config);
if (VAEntrypointEncSlice == obj_config->entrypoint ){
vaStatus = i965_encoder_begin_picture(ctx, context, render_target);
return vaStatus;
}
switch (obj_config->profile) {
case VAProfileMPEG2Simple:
case VAProfileMPEG2Main:
......@@ -1184,12 +1224,23 @@ i965_RenderPicture(VADriverContextP ctx,
{
struct i965_driver_data *i965 = i965_driver_data(ctx);
struct object_context *obj_context;
struct object_config *obj_config;
VAContextID config;
int i;
VAStatus vaStatus = VA_STATUS_ERROR_UNKNOWN;
obj_context = CONTEXT(context);
assert(obj_context);
config = obj_context->config_id;
obj_config = CONFIG(config);
assert(obj_config);
if (VAEntrypointEncSlice == obj_config->entrypoint ){
vaStatus = i965_encoder_render_picture(ctx, context, buffers, num_buffers);
return vaStatus;
}
for (i = 0; i < num_buffers; i++) {
struct object_buffer *obj_buffer = BUFFER(buffers[i]);
assert(obj_buffer);
......@@ -1233,15 +1284,19 @@ i965_EndPicture(VADriverContextP ctx, VAContextID context)
int i;
assert(obj_context);
config = obj_context->config_id;
obj_config = CONFIG(config);
assert(obj_config);
if (VAEntrypointEncSlice == obj_config->entrypoint ){
return i965_encoder_end_picture(ctx, context);
}
assert(obj_context->decode_state.pic_param);
assert(obj_context->decode_state.num_slice_params >= 1);
assert(obj_context->decode_state.num_slice_datas >= 1);
assert(obj_context->decode_state.num_slice_params == obj_context->decode_state.num_slice_datas);
config = obj_context->config_id;
obj_config = CONFIG(config);
assert(obj_config);
i965_media_decode_picture(ctx, obj_config->profile, &obj_context->decode_state);
obj_context->decode_state.current_render_target = -1;
obj_context->decode_state.num_slice_params = 0;
......@@ -1376,6 +1431,9 @@ i965_Init(VADriverContextP ctx)
if (i965_render_init(ctx) == False)
return VA_STATUS_ERROR_UNKNOWN;
if (HAS_ENCODER(i965) && (i965_encoder_init(ctx) == False))
return VA_STATUS_ERROR_UNKNOWN;
return VA_STATUS_SUCCESS;
}
......@@ -1518,7 +1576,7 @@ i965_CreateImage(VADriverContextP ctx,
*out_image = *image;
return VA_STATUS_SUCCESS;
error:
error:
i965_DestroyImage(ctx, image_id);
return va_status;
}
......@@ -1641,7 +1699,7 @@ VAStatus i965_DeriveImage(VADriverContextP ctx,
return VA_STATUS_SUCCESS;
error:
error:
i965_DestroyImage(ctx, image_id);
return va_status;
}
......@@ -2017,6 +2075,9 @@ i965_Terminate(VADriverContextP ctx)
{
struct i965_driver_data *i965 = i965_driver_data(ctx);
if (HAS_ENCODER(i965) && (i965_encoder_terminate(ctx) == False))
return VA_STATUS_ERROR_UNKNOWN;
if (i965_render_terminate(ctx) == False)
return VA_STATUS_ERROR_UNKNOWN;
......@@ -2100,7 +2161,7 @@ VA_DRIVER_INIT_FUNC( VADriverContextP ctx )
vtable->vaQueryDisplayAttributes = i965_QueryDisplayAttributes;
vtable->vaGetDisplayAttributes = i965_GetDisplayAttributes;
vtable->vaSetDisplayAttributes = i965_SetDisplayAttributes;
// vtable->vaDbgCopySurfaceToBuffer = i965_DbgCopySurfaceToBuffer;
// vtable->vaDbgCopySurfaceToBuffer = i965_DbgCopySurfaceToBuffer;
i965 = (struct i965_driver_data *)calloc(1, sizeof(*i965));
assert(i965);
......
......@@ -40,6 +40,9 @@
#include "i965_media.h"
#include "i965_render.h"
#include "gen6_vme.h"
#include "gen6_mfc.h"
#define I965_MAX_PROFILES 11
#define I965_MAX_ENTRYPOINTS 5
#define I965_MAX_CONFIG_ATTRIBUTES 10
......@@ -81,17 +84,32 @@ struct decode_state
int num_slice_datas;
};
//keeping mfc encoder's stuff here
struct mfc_encode_state
{
struct buffer_store *seq_param;
struct buffer_store *pic_param;
struct buffer_store *pic_control;
struct buffer_store *iq_matrix;
struct buffer_store *q_matrix;
struct buffer_store **slice_params;
VASurfaceID current_render_target;
int max_slice_params;
int num_slice_params;
};
struct object_context
{
struct object_base base;
VAContextID context_id;
VAConfigID config_id;
VASurfaceID *render_targets;
VASurfaceID *render_targets; //input->encode, output->decode
int num_render_targets;
int picture_width;
int picture_height;
int flags;
struct decode_state decode_state;
struct mfc_encode_state encode_state;
};
#define SURFACE_REFERENCED (1 << 0)
......@@ -168,6 +186,8 @@ struct i965_driver_data
struct i965_media_state media_state;
struct i965_render_state render_state;
void *pp_context;
struct gen6_media_state gen6_media_state;
struct gen6_mfc_bcs_state gen6_mfc_bcs_state;
};
#define NEW_CONFIG_ID() object_heap_allocate(&i965->config_heap);
......
This diff is collapsed.
/*
* Copyright © 2010 Intel Corporation
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sub license, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
* The above copyright notice and this permission notice (including the
* next paragraph) shall be included in all copies or substantial portions
* of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
* IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR
* ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* Authors:
* Zhou chang <chang.zhou@intel.com>
*
*/
#ifndef _GEN6_MFC_H_
#define _GEN6_MFC_H_
#include <xf86drm.h>
#include <drm.h>
#include <i915_drm.h>
#include <intel_bufmgr.h>
#include "i965_structs.h"
#include "i965_drv_video.h"
VAStatus i965_encoder_create_context(
VADriverContextP ctx,
VAConfigID config_id,
int picture_width,
int picture_height,
int flag,
VASurfaceID *render_targets,
int num_render_targets,
struct object_context *obj_context
);
VAStatus i965_encoder_begin_picture(
VADriverContextP ctx,
VAContextID context,
VASurfaceID render_target
);
VAStatus i965_encoder_render_picture(VADriverContextP ctx,
VAContextID context,
VABufferID *buffers,
int num_buffers
);
VAStatus i965_encoder_end_picture(VADriverContextP ctx,
VAContextID context
);
void i965_encoder_destroy_context(struct object_heap *heap, struct object_base *obj);
Bool i965_encoder_init(VADriverContextP ctx);
Bool i965_encoder_terminate(VADriverContextP ctx);
#endif /* _GEN6_MFC_H_ */
SUBDIRS = h264 mpeg2 render post_processing
SUBDIRS = h264 mpeg2 render post_processing vme
INTEL_G6B = intra_frame.g6b
EXTRA_DIST = $(INTEL_G6B)
if HAVE_GEN4ASM
SUFFIXES = .asm .g6b
.asm.g6b:
m4 $*.asm > $*.g6m && intel-gen4asm -g 6 -o $@ $*.g6m && rm $*.g6m
BUILT_SOURCES= $(INTEL_G6B)
clean-local:
-rm -f $(INTEL_G6B)
endif
/*
* Copyright © <2010>, Intel Corporation.
*
* This program is licensed under the terms and conditions of the
* Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
* http://www.opensource.org/licenses/eclipse-1.0.php.
*
*/
// Modual name: IntraFrame.asm
//
// Make intra predition estimation for Intra frame
//
//
// Now, begin source code....
//
include(`vme_header.inc')
/*inline input data: r5~r11*/
mov(1) r5.20<1>:UB r0.20<1,1,0>:UB {align1} ;
mov(8) m0.0<1>:UD r5.0<8,8,1>:UD {align1};
mov(8) m1.0<1>:UD r6.0<8,8,1>:UD {align1};
mov(8) m2.0<1>:UD r7.0<8,8,1>:UD {align1};
mov(8) m3.0<1>:UD r8.0<8,8,1>:UD {align1};
send(8) 0 r12 null vme(0,0,0,2) mlen 4 rlen 1 {align1};
mov(1) r9.20<1>:UB r0.20<1,1,0>:UB {align1} ;
mov(8) m0.0<1>:UD r9.0<8,8,1>:UD {align1};
mov(1) m1.0<1>:UD r12.0<0,1,0>:UD {align1}; /*W0.0*/
mov(1) m1.4<1>:UD r12.16<0,1,0>:UD {align1}; /*W0.4*/
mov(1) m1.8<1>:UD r12.20<0,1,0>:UD {align1}; /*W0.5*/
mov(1) m1.12<1>:UD r12.24<0,1,0>:UD {align1}; /*W0.6*/
/* bind index 3, write 1 oword, msg type: 8(OWord Block Write) */
send (16) 0 r13 null write(3, 0, 8, 1) mlen 2 rlen 1 {align1};
mov (8) m0.0<1>:UD r0<8,8,1>:UD {align1};
send (16) 0 acc0<1>UW null thread_spawner(0, 0, 1) mlen 1 rlen 0 {align1 EOT};
{ 0x00000001, 0x20b40231, 0x00200014, 0x00000000 },
{ 0x00600001, 0x20000022, 0x008d00a0, 0x00000000 },
{ 0x00600001, 0x20200022, 0x008d00c0, 0x00000000 },
{ 0x00600001, 0x20400022, 0x008d00e0, 0x00000000 },
{ 0x00600001, 0x20600022, 0x008d0100, 0x00000000 },
{ 0x08600031, 0x21801cdd, 0x00000000, 0x08184000 },
{ 0x00000001, 0x21340231, 0x00200014, 0x00000000 },
{ 0x00600001, 0x20000022, 0x008d0120, 0x00000000 },
{ 0x00000001, 0x20200022, 0x00000180, 0x00000000 },
{ 0x00000001, 0x20240022, 0x00000190, 0x00000000 },
{ 0x00000001, 0x20280022, 0x00000194, 0x00000000 },
{ 0x00000001, 0x202c0022, 0x00000198, 0x00000000 },
{ 0x05800031, 0x21a01cdd, 0x00000000, 0x041b0003 },
{ 0x00600001, 0x20000022, 0x008d0000, 0x00000000 },
{ 0x07800031, 0x24001cc8, 0x00000000, 0x82000010 },
/*
* Copyright © <2010>, Intel Corporation.
*
* This program is licensed under the terms and conditions of the
* Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
* http://www.opensource.org/licenses/eclipse-1.0.php.
*
*/
// Modual name: ME_header.inc
//
// Global symbols define
//
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