Skip to content

L
libva
Commit 11418c9b authored by Xiang, Haihao's avatar Xiang, Haihao
Browse files
Options

i965_drv_video: track the internal format of a surface 

Signed-off-by: default avatarXiang, Haihao <haihao.xiang@intel.com>
parent e8882dde
Hide whitespace changes
Inline Side-by-side
Showing with 27 additions and 20 deletions
i965_drv_video/gen6_mfc.c
View file @ 11418c9b
......@@ -851,7 +851,7 @@ static VAStatus gen6_mfc_avc_prepare(VADriverContextP ctx,
/*Setup all the input&output object*/
obj_surface = SURFACE(pPicParameter->reconstructed_picture);
assert(obj_surface);
i965_check_alloc_surface_bo(ctx, obj_surface, 1);
i965_check_alloc_surface_bo(ctx, obj_surface, 1, VA_FOURCC('N','V','1','2'));
mfc_context->post_deblocking_output.bo = obj_surface->bo;
dri_bo_reference(mfc_context->post_deblocking_output.bo);
......
i965_drv_video/gen6_mfd.c
View file @ 11418c9b
......@@ -121,7 +121,7 @@ gen6_mfd_avc_frame_store_index(VADriverContextP ctx,
struct object_surface *obj_surface = SURFACE(ref_pic->picture_id);
assert(obj_surface);
i965_check_alloc_surface_bo(ctx, obj_surface, 1);
i965_check_alloc_surface_bo(ctx, obj_surface, 1, VA_FOURCC('N', 'V', '1', '2'));
for (frame_idx = 0; frame_idx < ARRAY_ELEMS(gen6_mfd_context->reference_surface); frame_idx++) {
for (j = 0; j < ARRAY_ELEMS(gen6_mfd_context->reference_surface); j++) {
......@@ -1042,7 +1042,7 @@ gen6_mfd_avc_decode_init(VADriverContextP ctx,
obj_surface->flags &= ~SURFACE_REF_DIS_MASK;
obj_surface->flags |= (pic_param->pic_fields.bits.reference_pic_flag ? SURFACE_REFERENCED : 0);
gen6_mfd_init_avc_surface(ctx, pic_param, obj_surface);
i965_check_alloc_surface_bo(ctx, obj_surface, 1);
i965_check_alloc_surface_bo(ctx, obj_surface, 1, VA_FOURCC('N','V','1','2'));
dri_bo_unreference(gen6_mfd_context->post_deblocking_output.bo);
gen6_mfd_context->post_deblocking_output.bo = obj_surface->bo;
......@@ -1191,7 +1191,7 @@ gen6_mfd_mpeg2_decode_init(VADriverContextP ctx,
/* Current decoded picture */
obj_surface = SURFACE(decode_state->current_render_target);
assert(obj_surface);
i965_check_alloc_surface_bo(ctx, obj_surface, 1);
i965_check_alloc_surface_bo(ctx, obj_surface, 1, VA_FOURCC('N','V','1','2'));
dri_bo_unreference(gen6_mfd_context->pre_deblocking_output.bo);
gen6_mfd_context->pre_deblocking_output.bo = obj_surface->bo;
......@@ -1502,7 +1502,7 @@ gen6_mfd_vc1_decode_init(VADriverContextP ctx,
obj_surface = SURFACE(decode_state->current_render_target);
assert(obj_surface);
gen6_mfd_init_vc1_surface(ctx, pic_param, obj_surface);
i965_check_alloc_surface_bo(ctx, obj_surface, 1);
i965_check_alloc_surface_bo(ctx, obj_surface, 1, VA_FOURCC('N','V','1','2'));
dri_bo_unreference(gen6_mfd_context->post_deblocking_output.bo);
gen6_mfd_context->post_deblocking_output.bo = obj_surface->bo;
......
i965_drv_video/gen7_mfd.c
View file @ 11418c9b
......@@ -121,7 +121,7 @@ gen7_mfd_avc_frame_store_index(VADriverContextP ctx,
struct object_surface *obj_surface = SURFACE(ref_pic->picture_id);
assert(obj_surface);
i965_check_alloc_surface_bo(ctx, obj_surface, 1);
i965_check_alloc_surface_bo(ctx, obj_surface, 1, VA_FOURCC('N','V','1','2'));
for (frame_idx = 0; frame_idx < ARRAY_ELEMS(gen7_mfd_context->reference_surface); frame_idx++) {
for (j = 0; j < ARRAY_ELEMS(gen7_mfd_context->reference_surface); j++) {
......@@ -989,7 +989,7 @@ gen7_mfd_avc_decode_init(VADriverContextP ctx,
obj_surface->flags &= ~SURFACE_REF_DIS_MASK;
obj_surface->flags |= (pic_param->pic_fields.bits.reference_pic_flag ? SURFACE_REFERENCED : 0);
gen7_mfd_init_avc_surface(ctx, pic_param, obj_surface);
i965_check_alloc_surface_bo(ctx, obj_surface, 1);
i965_check_alloc_surface_bo(ctx, obj_surface, 1, VA_FOURCC('N','V','1','2'));
dri_bo_unreference(gen7_mfd_context->post_deblocking_output.bo);
gen7_mfd_context->post_deblocking_output.bo = obj_surface->bo;
......@@ -1137,7 +1137,7 @@ gen7_mfd_mpeg2_decode_init(VADriverContextP ctx,
/* Current decoded picture */
obj_surface = SURFACE(decode_state->current_render_target);
assert(obj_surface);
i965_check_alloc_surface_bo(ctx, obj_surface, 1);
i965_check_alloc_surface_bo(ctx, obj_surface, 1, VA_FOURCC('N','V','1','2'));
dri_bo_unreference(gen7_mfd_context->pre_deblocking_output.bo);
gen7_mfd_context->pre_deblocking_output.bo = obj_surface->bo;
......@@ -1457,7 +1457,7 @@ gen7_mfd_vc1_decode_init(VADriverContextP ctx,
obj_surface = SURFACE(decode_state->current_render_target);
assert(obj_surface);
gen7_mfd_init_vc1_surface(ctx, pic_param, obj_surface);
i965_check_alloc_surface_bo(ctx, obj_surface, 1);
i965_check_alloc_surface_bo(ctx, obj_surface, 1, VA_FOURCC('N','V','1','2'));
dri_bo_unreference(gen7_mfd_context->post_deblocking_output.bo);
gen7_mfd_context->post_deblocking_output.bo = obj_surface->bo;
......
i965_drv_video/i965_avc_bsd.c
View file @ 11418c9b
......@@ -516,7 +516,7 @@ i965_avc_bsd_buf_base_state(VADriverContextP ctx,
obj_surface->flags |= (pic_param->pic_fields.bits.reference_pic_flag ? SURFACE_REFERENCED : 0);
i965_avc_bsd_init_avc_bsd_surface(ctx, obj_surface, pic_param, i965_h264_context);
avc_bsd_surface = obj_surface->private_data;
i965_check_alloc_surface_bo(ctx, obj_surface, 0);
i965_check_alloc_surface_bo(ctx, obj_surface, 0, VA_FOURCC('N','V','1','2'));
OUT_BCS_RELOC(batch, avc_bsd_surface->dmv_top,
I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION,
......@@ -959,7 +959,7 @@ i965_avc_bsd_frame_store_index(VADriverContextP ctx,
int frame_idx;
struct object_surface *obj_surface = SURFACE(ref_pic->picture_id);
assert(obj_surface);
i965_check_alloc_surface_bo(ctx, obj_surface, 0);
i965_check_alloc_surface_bo(ctx, obj_surface, 0, VA_FOURCC('N','V','1','2'));
for (frame_idx = 0; frame_idx < ARRAY_ELEMS(i965_h264_context->fsid_list); frame_idx++) {
for (j = 0; j < ARRAY_ELEMS(i965_h264_context->fsid_list); j++) {
......
i965_drv_video/i965_drv_video.c
View file @ 11418c9b
......@@ -489,6 +489,7 @@ i965_CreateSurfaces(VADriverContextP ctx,
obj_surface->size = SIZE_YUV420(obj_surface->width, obj_surface->height);
obj_surface->flags = SURFACE_REFERENCED;
obj_surface->fourcc = 0;
obj_surface->bo = NULL;
obj_surface->pp_out_bo = NULL;
obj_surface->locked_image_id = VA_INVALID_ID;
......@@ -1818,7 +1819,8 @@ i965_CreateImage(VADriverContextP ctx,
void
i965_check_alloc_surface_bo(VADriverContextP ctx,
struct object_surface *obj_surface,
int tiled)
int tiled,
unsigned int fourcc)
{
struct i965_driver_data *i965 = i965_driver_data(ctx);
......@@ -1846,6 +1848,7 @@ i965_check_alloc_surface_bo(VADriverContextP ctx,
0x1000);
}
obj_surface->fourcc = fourcc;
assert(obj_surface->bo);
}
......@@ -1933,7 +1936,7 @@ VAStatus i965_DeriveImage(VADriverContextP ctx,
}
}
i965_check_alloc_surface_bo(ctx, obj_surface, HAS_TILED_SURFACE(i965));
i965_check_alloc_surface_bo(ctx, obj_surface, HAS_TILED_SURFACE(i965), image->format.fourcc);
va_status = i965_create_buffer_internal(ctx, 0, VAImageBufferType,
obj_surface->size, 1, NULL, obj_surface->bo, &image->buf);
if (va_status != VA_STATUS_SUCCESS)
......@@ -2050,13 +2053,14 @@ get_image_i420(struct object_image *obj_image, uint8_t *image_data,
{
uint8_t *dst[3], *src[3];
const int Y = 0;
const int U = obj_image->image.format.fourcc == VA_FOURCC_YV12 ? 2 : 1;
const int V = obj_image->image.format.fourcc == VA_FOURCC_YV12 ? 1 : 2;
const int U = obj_image->image.format.fourcc == obj_surface->fourcc ? 1 : 2;
const int V = obj_image->image.format.fourcc == obj_surface->fourcc ? 2 : 1;
unsigned int tiling, swizzle;
if (!obj_surface->bo)
return;
assert(obj_surface->fourcc);
dri_bo_get_tiling(obj_surface->bo, &tiling, &swizzle);
if (tiling != I915_TILING_NONE)
......@@ -2114,6 +2118,7 @@ get_image_nv12(struct object_image *obj_image, uint8_t *image_data,
if (!obj_surface->bo)
return;
assert(obj_surface->fourcc);
dri_bo_get_tiling(obj_surface->bo, &tiling, &swizzle);
if (tiling != I915_TILING_NONE)
......
i965_drv_video/i965_drv_video.h
View file @ 11418c9b
......@@ -154,6 +154,7 @@ struct object_surface
int orig_width;
int orig_height;
int flags;
unsigned int fourcc;
dri_bo *bo;
int pp_out_width;
int pp_out_height;
......@@ -252,6 +253,7 @@ i965_driver_data(VADriverContextP ctx)
void
i965_check_alloc_surface_bo(VADriverContextP ctx,
struct object_surface *obj_surface,
int tiled);
int tiled,
unsigned int fourcc);
#endif /* _I965_DRV_VIDEO_H_ */
i965_drv_video/i965_media_mpeg2.c
View file @ 11418c9b
......@@ -516,7 +516,7 @@ i965_media_mpeg2_surface_setup(VADriverContextP ctx,
int w = obj_surface->width;
int h = obj_surface->height;
i965_check_alloc_surface_bo(ctx, obj_surface, 0);
i965_check_alloc_surface_bo(ctx, obj_surface, 0, VA_FOURCC('I','4','2','0'));
if (picture_structure == MPEG_FRAME) {
i965_media_mpeg2_surface_state(ctx, base_index + 0, obj_surface,
......
i965_drv_video/i965_render.c
View file @ 11418c9b
......@@ -783,7 +783,7 @@ i965_render_src_surfaces_state(VADriverContextP ctx,
i965_render_src_surface_state(ctx, 1, region, 0, rw, rh, w, I965_SURFACEFORMAT_R8_UNORM); /* Y */
i965_render_src_surface_state(ctx, 2, region, 0, rw, rh, w, I965_SURFACEFORMAT_R8_UNORM);
if (!render_state->inited) {
if (obj_surface->fourcc == VA_FOURCC('Y','V','1','2')) {
int u3 = 5, u4 = 6, v5 = 3, v6 = 4;
i965_render_src_surface_state(ctx, u3, region, w * h, rw / 2, rh / 2, w / 2, I965_SURFACEFORMAT_R8_UNORM); /* U */
......@@ -791,12 +791,12 @@ i965_render_src_surfaces_state(VADriverContextP ctx,
i965_render_src_surface_state(ctx, v5, region, w * h + w * h / 4, rw / 2, rh / 2, w / 2, I965_SURFACEFORMAT_R8_UNORM); /* V */
i965_render_src_surface_state(ctx, v6, region, w * h + w * h / 4, rw / 2, rh / 2, w / 2, I965_SURFACEFORMAT_R8_UNORM);
} else {
if (render_state->interleaved_uv) {
if (obj_surface->fourcc == VA_FOURCC('N','V','1','2')) {
i965_render_src_surface_state(ctx, 3, region, w * h, rw / 2, rh / 2, w, I965_SURFACEFORMAT_R8G8_UNORM); /* UV */
i965_render_src_surface_state(ctx, 4, region, w * h, rw / 2, rh / 2, w, I965_SURFACEFORMAT_R8G8_UNORM);
} else {
int u3 = 3, u4 = 4, v5 = 5, v6 = 6;
i965_render_src_surface_state(ctx, u3, region, w * h, rw / 2, rh / 2, w / 2, I965_SURFACEFORMAT_R8_UNORM); /* U */
i965_render_src_surface_state(ctx, u4, region, w * h, rw / 2, rh / 2, w / 2, I965_SURFACEFORMAT_R8_UNORM);
i965_render_src_surface_state(ctx, v5, region, w * h + w * h / 4, rw / 2, rh / 2, w / 2, I965_SURFACEFORMAT_R8_UNORM); /* V */
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment