- 24 Nov, 2008 2 commits
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Peter Ujfalusi authored
Keep Soft-volume disabled for now, since if it is enabled the FGAIN volume controls are not working in the current configuration: CODEC_MODE:OPT_MODE = 1 OPTION:ARXR2_EN = 1 OPTION:ARXL2_EN = 1 OPTION:ARXR1_EN = 0 OPTION:ARXL1_VRX_EN = 0 RX_PATH_SEL:RXL1_SEL = 0x0 (or 0x1) RX_PATH_SEL:RXR1_SEL = 0x0 (or 0x1) After the patch, FGAIN volume control works. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@nokia.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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Mark Brown authored
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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- 21 Nov, 2008 11 commits
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Mark Brown authored
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Takashi Iwai <tiwai@suse.de>
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Mark Brown authored
Print something a bit more verbose to help make errors a little more obvious. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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Mark Brown authored
It's not exported. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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Jarkko Nikula authored
Signed-off-by: Jarkko Nikula <jarkko.nikula@nokia.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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Mark Brown authored
Implement support for the Marvell Zylonite PXA3xx reference platform, supporting standard AC97 stereo and AUX interfaces together with the auxiliary I2S interface of the WM9713. The board has two options for the MCLK of the WM9713: either the standard AC97 system clock can be used or the 13MHz CLK_POUT output of the PXA3xx can be used, selected via SW15 on the board. Currently only the AC97 system clock is supported by this driver. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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Mark Brown authored
Liam Girdwood's ASoC v2 work avoids having two different ops structures for DAIs by merging the members of struct snd_soc_ops into struct snd_soc_dai_ops, allowing per DAI configuration for everything. Backport this change. This paves the way for future work allowing any combination of DAIs to be connected rather than having fixed purpose CODEC and CPU DAIs and only allowing CODEC<->CPU interconnections. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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Mark Brown authored
ASoC v2 factors most of the contents of soc.h out into separate headers, including soc-dai.h for the DAI. Factor the existing DAI API out into this file in order to prepare for backporting of the ASoC v2 DAI API. Also backport some of Liam's improvements to the documentation. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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Karl Beldan authored
Signed-off-by: Karl Beldan <karl.beldan@gmail.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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Karl Beldan authored
Clean up our record of the active streams in shutdown(), fixing subsequent failures of snd_pcm_hw_constraints_complete after closure of a stream. NOTE: - The ssm2602 allows pairs of non-matching PB/REC rates. - This is a fix for less evil: The logic is flawed (e.g. the slave might startup before the master's rate and sample_bits are set). Signed-off-by: Karl Beldan <karl.beldan@gmail.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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Mark Brown authored
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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Mark Brown authored
One of the issues with the ASoC v1 API which has been addressed in the ASoC v2 work that Liam Girdwood has done is that the ALSA card provided by ASoC is distributed around the ASoC structures. For example, machine wide data such as the struct snd_card are maintained as part of the CODEC data structure, preventing the use of multiple codecs. This has been addressed by refactoring the data structures so that all the data for the ALSA card is contained in a single structure snd_soc_card which replaces the existing snd_soc_machine and snd_soc_device. Begin the process of backporting this by renaming struct snd_soc_machine to struct snd_soc_card, better reflecting its function and bringing it closer to standard ALSA terminology. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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- 19 Nov, 2008 5 commits
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Mark Brown authored
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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Mark Brown authored
Missed these during review. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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Arun KS authored
This patch adds twl4030 audio support on omap2evm Signed-off-by: Arun KS <arunks@mistralsolutions.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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Hugo Villeneuve authored
The PCM3008 is used on the Lyrtech SFFSDR board, in conjunction with an FPGA that generates the bit clock and the master clock [Downgraded the rate debug print to pr_debug() in hw_params, converted asm/gpio.h to linux/gpio.h -- broonie] Signed-off-by: Hugo Villeneuve <hugo@hugovil.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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Hugo Villeneuve authored
The PCM3008 is a 16-bit stereo audio codec. It accepts left-justified format for ADC, and right-justified format for DAC. Independent power-down modes for ADC and DAC are provided, as well as a digital de-emphasis filter (4 modes). [Merged Makefile & Kconfig, changed asm/gpio.h to linux/gpio.h -- broonie] Signed-off-by: Hugo Villeneuve <hugo@hugovil.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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- 18 Nov, 2008 11 commits
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Mark Brown authored
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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Mark Brown authored
For consistency with other ASoC codec drivers. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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Mike Frysinger authored
Cc: Cliff Cai <cliff.cai@analog.com> Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <cooloney@kernel.org> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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Bryan Wu authored
Cc: Cliff Cai <cliff.cai@analog.com> Signed-off-by: Bryan Wu <cooloney@kernel.org> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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Mike Frysinger authored
Cc: Cliff Cai <cliff.cai@analog.com> Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <cooloney@kernel.org> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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Michael Hennerich authored
A probe function should have a clean return 0 path. Cc: Cliff Cai <cliff.cai@analog.com> Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Bryan Wu <cooloney@kernel.org> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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Cliff Cai authored
clean up redudent code and correct building problem in non-mmap mode Signed-off-by: Cliff Cai <cliff.cai@analog.com> Signed-off-by: Bryan Wu <cooloney@kernel.org> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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Cliff Cai authored
This patch provides a option for users to enable multi-channel function support in Blackfin ASoC driver. Because Blackfin is without MMU, it is easy for us and the user to enable this function at compiling stage not dynamically on the fly. Signed-off-by: Cliff Cai <cliff.cai@analog.com> Signed-off-by: Bryan Wu <cooloney@kernel.org> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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Cliff Cai authored
We added multi-channel function to this codec driver and Blackfin ASoC driver as well. It was tested on Blackfin hardware. Signed-off-by: Cliff Cai <cliff.cai@analog.com> Signed-off-by: Bryan Wu <cooloney@kernel.org> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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Mike Frysinger authored
tweak SPORT range for non-BF54x so we get proper behavior for BF52x parts Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <cooloney@kernel.org> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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Naresh Medisetty authored
Fix concurrent capture/playback issue. The issue is caused by re-initialization of control registers used specifically for capture or playback in both capture and playback operations. Signed-off-by: Steve Chen <schen@mvista.com> Signed-off-by: Naresh Medisetty <naresh@ti.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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- 17 Nov, 2008 7 commits
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Mark Brown authored
Also merge down a couple of last minute style changes that got lost in the shuffle. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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Mark Brown authored
A small additional power saving can be achieved for the WM8990 by maintaining VMID using a 2*250k divider when in standby mode. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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Mark Brown authored
Enable a hardware workaround which avoids problems with the clocking of the ADCs in certain configurations. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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Mark Brown authored
Only fully documented registers are cached in the WM8990 but additional registers exist. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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Christian Pellegrin authored
Signed-off-by: Christian Pellegrin <chripell@fsfe.org> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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Christian Pellegrin authored
Signed-off-by: Christian Pellegrin <chripell@fsfe.org> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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Peter Ujfalusi authored
FGAIN for playback is in range of 0-0x3f, while for capture GAIN it is in the range of 0-0x1f. The original value of 128 (0x7f) would modify the CGAIN also for playback. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@nokia.com> Acked-by: Steve Sakoman <steve@sakoman.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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- 14 Nov, 2008 2 commits
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Mark Brown authored
The WM8728 is a high performance stereo DAC designed for applications such as DVD, home theatre and digital TV. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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Mark Brown authored
This reverts commit 8dc840f8. Christian Pellegrin <chripell@gmail.com> reported that on some systems the patch caused DMA to fail which is much more serious than the original skipped audio issue. Further investigation by Dave shows that the behaviour depends on the clock speed of the SoC - a better fix is neeeded. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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- 13 Nov, 2008 2 commits
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Jarkko Nikula authored
Originally it was put too tight limits to support only 44.1 kHz and 48 kHz sample rates in McBSP DAI driver. Extend it now to 8 kHz - 96 kHz. With 96 kHz and 2*16 bits, bit clock is 3.072 MHz < 3.125 MHz (I2S max?). Tested on Nokia N810 with TVL320AIC33 from rates 8 - 96 kHz and on Texas Instruments Beagle with TWL4030 from rates 8 - 48 kHz. Signed-off-by: Jarkko Nikula <jarkko.nikula@nokia.com> Acked-by: Steve Sakoman <steve@sakoman.com> Acked-by: Arun KS <arunks@mistralsolutions.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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Jarkko Nikula authored
TWL4030 currently supports rates between 8 kHz and 48 kHz and sets the codec mode register accordingly in twl4030_hw_params. Expose this info so that ASoC can match other rates than 44.1 kHz or 48 kHz as well. Signed-off-by: Jarkko Nikula <jarkko.nikula@nokia.com> Acked-by: Steve Sakoman <steve@sakoman.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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