- 27 Sep, 2007 5 commits
-
-
Paul Mundt authored
There was some debug code left in here that caused the pin changes to never be hit. Kill that off, and all is well. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
Paul Mundt authored
We already set this in arch/sh/mm/Kconfig, don't set a conflicting one in arch/sh/Kconfig too.. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
Paul Mundt authored
Trivial build fix for SH-2. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
Paul Mundt authored
4kB pages are unstable on extended mode TLB, it's recommended that TLB compat mode be used when using a 4kB PAGE_SIZE. Set the default for extended mode to 8kB. This should have negligible impact, as other than the extra swap cache entry bits, there's no reason to use the extended mode TLB with 4kB pages. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
Paul Mundt authored
The probing logic works for both URAM and L2, with no way to distinguish between the two. Disable the probing for now and let the CPU subtypes that have this in a real L2 configuration explicitly say so. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
- 24 Sep, 2007 5 commits
-
-
Paul Mundt authored
The uClinux MTD device uses _ebss, add the symbol and corresponding export. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
Paul Mundt authored
These were right the first time. Either a thinko or building in the wrong tree. Revert this. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
Paul Mundt authored
Calculate the number of cache aliases on probed L2 caches, and while we're at it, print out the detected statistics at boot time for these also. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
Paul Mundt authored
We stopped referencing these functions unconditionally when the old entry.S code was refactored, so this is just dead code at present. Kill it off. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
Paul Mundt authored
There was an off-by-1 on the cache alias detection logic on SH-4, which caused n_aliases to always be 1 even when the page size precluded the existence of aliases. With this corrected, 64KB pages happily reports n_aliases == 0, and hits the appropriate fast paths in the flushing routines. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
- 21 Sep, 2007 30 commits
-
-
Paul Mundt authored
This adds basic support for SH-X3 SMP (4 CPUs). More IPI and cache debugging is necessary, mostly interfacing the d-cache coherency and the I-cache broadcast invalidates. Only for testing at present! Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
Paul Mundt authored
Now that the SMP stubs are in place, call in to the setup code to be defined by the platform. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
Magnus Damm authored
Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
Paul Mundt authored
There was a very preliminary bunch of SMP code scattered around for the SH7604 microcontrollers from way back when, and it has mostly suffered bitrot since then. With the tree already having been slowly getting prepped for SMP, this plugs in most of the remaining platform-independent bits. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
Magnus Damm authored
This implements initial support for the SMP INTC (particularly INTC2) controllers. These are largely implemented as conventional blocks, with register sets grouped together at fixed strides relative to the CPU id. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
Paul Mundt authored
This adds the TLB flushing routines for SMP systems, based on the MIPS implementation, with some additional SH-specific flush routines. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
Paul Mundt authored
current_cpu_data uses smp_processor_id() in order to find the corresponding cpu_data. As the cache descs are all currently identical, just have this look at probed results from the boot CPU. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
Paul Mundt authored
This consolidates the cpu_data definitions and gets rid of the special boot_cpu_data. It's made a wrapper to the boot CPU, in order to keep the existing in-tree users happy. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
Paul Mundt authored
The cpufreq driver banner is currently printed for each CPU, move it down so it's not as noisy and it's only printed once. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
Paul Mundt authored
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
Adrian McMenamin authored
The Maple bus is SEGA's proprietary serial bus for peripherals (keyboard, mouse, controller etc). The bus is capable of some (limited) hotplugging and operates at up to 2 M/bits. Drivers of one sort or another existed/exist for 2.4 and a rudimentary port, which didn't support the 2.6 device driver model was also in existence. This driver - for the bus logic itself and for the keyboard (other drivers will follow) are based on the code and concepts of those old drivers but have lots of completely rewritten parts. I have the maple bus code as a built in now as that seems the sane and rational way to handle something like that - you either want the bus or you don't. Signed-off-by: Adrian McMenamin <adrian@mcmen.demon.co.uk> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
Markus Brunner authored
This update moves the flash mapping for the Magic Panel into the board setup. It also removes references to the old MTD mapping option in the defconfig. Signed-off by: Markus Brunner <super.firetwister@gmail.com> Signed-off by: Mark Jonas <toertel@gmail.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
Paul Mundt authored
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
Aoi Shinkai authored
Support CF IDE on R2D-1 boards. Signed-off-by: Aoi Shinkai <shinkoi2005@gmail.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
Paul Mundt authored
The extended mode TLB requires both 64-bit PTEs and a 64-bit pgprot, correspondingly, the PGD also has to be 64-bits, so fix that up. The kernel and user permission bits really are decoupled in early cuts of the silicon, which means that we also have to set corresponding kernel permissions on user pages or we end up with user pages that the kernel simply can't touch (!). Finally, with those things corrected, really enable MMUCR.ME and correct the PTEA value (this simply needs to be the upper 32-bits of the PTE, with the size and protection bit encoding). Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
Paul Mundt authored
Add SH7785 URAM as node 1, follows the SH-X3 change. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
Paul Mundt authored
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
Paul Mundt authored
This fixes up the port calculation logic for non-SuperIO accesses, before these were always matching the MRSHPC base, now just make sure the original port is handed back if it's not in the I/O port range. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
Paul Mundt authored
Trivial build fix. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
Paul Mundt authored
Get the IRL->IRQ stuff building. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
Paul Mundt authored
Most boards use 8 or 16-bit access for the LED bank, se7206 needs 32. There's only 8 individual LEDs however, each with a 'special' value in terms of logical ordering. Go FPGA, go! Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
Paul Mundt authored
The port routines were logically inverted, and the MRSHPC range had no upper bound, causing 8 and 16-bit port I/O to get mangled. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
Markus Brunner authored
This adds support for the SH7720 (SH3-DSP) based Magic Panel R2 board. Signed-off-by: Markus Brunner <super.firetwister@gmail.com> Signed-off by: Mark Jonas <toertel@gmail.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
Kristoffer Ericson authored
Signed-off-by: Kristoffer Ericson <Kristoffer.Ericson@gmail.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
Kristoffer Ericson authored
IRQ0->IRQ3 need to be an IRQ mode for these to work, fix them up. Signed-off-by: Kristoffer Ericson <Kristoffer.Ericson@gmail.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
Paul Mundt authored
This leads to invalid configurations where both FPU and DSP support can be enabled in the same kernel, resulting in build failure. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
Paul Mundt authored
Trivial build fix for when sysfs is disabled. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
Paul Mundt authored
Get the SH7343 and SH7770 stuff linking again. Both of these still require proper INTC support. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
Paul Mundt authored
The kgdb console code requires uart_set_options() and friends, which are only provided by the serial core when console support is enabled. These were sitting under CONFIG_SH_KGDB and resulted in a link error when console support wasn't enabled, work that by rolling the console routines under CONFIG_SH_KGDB_CONSOLE, which they should have been all along. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
Kristoffer Ericson authored
The vector changed, so follow the INTC changes for the new vector. Signed-off-by: Kristoffer Ericson <Kristoffer.Ericson@gmail.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-