- 07 Feb, 2006 40 commits
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Zou Nan hai authored
Make sure to save space for the trailing '\0'. Signed-off-by: Zou Nan hai <nanhai.zou@intel.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
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Jens Axboe authored
The softirq rq completion handler needs to save/restore interrupt flags appropriately. Signed-off-by: Jens Axboe <axboe@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
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Andi Kleen authored
Fix wrong '!' in bad apic fix I forgot to remove the ! when moving the code from x86-64 to i386 x86-64 tested !disable_apic, but of course for cpu_has_apic it shouldn't be negated. Credit goes to Jan Beulich for spotting it with eagle eyes. Cc: Jan Beulich <jbeulich@novell.com> Cc: Ingo Molnar <mingo@elte.hu> Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
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Linus Torvalds authored
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Ralf Baechle authored
The reset state is undefined and some firmware doesn't clear this bit possibly resulting in crashes on entry into userland. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Sergei Shtylylov authored
I've noticed that PCI clock was incorrectly reported as 66 MHz while being mere 33 MHz on RBTX4937 board -- this was due to the different encoding of the PCI divisor field in CCFG register between TX4927 and TX4937 chips... Also, RBTX49x7 was printed out as a CPU name (e.g., "CPU is RBTX4937"); and some debug printk() were duplicating each other... Signed-off-by: Konstantin Baydarov <kbaidarov@ru.mvista.com> Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Atsushi Nemoto authored
If mfc0 $12 follows store and the mfc0 is last instruction of a page and fetching the next instruction causes TLB miss, the result of the mfc0 might wrongly contain EXL bit. ERT-TX49H2-027, ERT-TX49H3-012, ERT-TX49HL3-006, ERT-TX49H4-008 Workaround: mask EXL bit of the result or place a nop before mfc0. It doesn't harm to always clear those bits, so we change the code to do so. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Ralf Baechle authored
Very much to my surprise Fuxin Zhang reports this is all it takes to get the kernel to work for page sizes larger than 4kB. This also paves the way for support for the R6000 and R8000 which don't support 4kB page size. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Ralf Baechle authored
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Atsushi Nemoto authored
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Atsushi Nemoto authored
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Ralf Baechle authored
From Franck Bui-Huu <vagabon.xyz@gmail.com> with modifications by me. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Ralf Baechle authored
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Atsushi Nemoto authored
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Ralf Baechle authored
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Daniel Jacobowitz authored
I'm pretty sure that the CKSEG0 bits are wrong, but I did need to cover that region - because the SB-1 kernel links at 0xffffffff80100000 or so, disassembly and printing static variables don't work unless the debugger can read that region. Signed-off-by: Daniel Jacobowitz <dan@codesourcery.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Ralf Baechle authored
From: Kaj-Michael Lang <milang@tal.org> In ip22-setup.c the checks for serial/graphics console logic does not check if ARCS console=g but the machine is using serial console, as it does if no keyboard is attached. This patch adds a check if ConsoleOut is serial. There might also be support for other graphics than Newport soon... Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Atsushi Nemoto authored
It looks glibc's pow() assumes an unary '-' operation for any number (including NaNs) always inverts its sign bit (though IEEE754 does not specify the sign bit for NaNs). This patch make the kernel math-emu emulates real MIPS neg.[ds] instruction. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Atsushi Nemoto authored
This fixes sparse warnings 'dereference of noderef expression'. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Ralf Baechle authored
fls was the only called of flz, so fold flz into fls, same for the __ilog2 call. Delete the now unused flz function. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Ralf Baechle authored
It always left the assembler in reorder mode possibly causing disaster. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Ralf Baechle authored
Adding -mmad is not usable since over half a decade in gcc and when fixed the proper -march option values should enable the use of the mad, madu and mul instructions of the R5500, RM5200, RM7000 and RM9000 families. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Peter Horton authored
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Atsushi Nemoto authored
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Atsushi Nemoto authored
Build blast_xxx, blast_xxx_page, blast_xxx_page_indexed from template. Easier to maintaina and saves 300 lines. Generated code should be unchanged. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Atsushi Nemoto authored
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Ralf Baechle authored
Patch courtesy of Emily Postnews ;-) Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Ralf Baechle authored
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Ralf Baechle authored
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Sergei Shtylylov authored
AMD Au1200 SOC just doesn't have UART3, so KGDB won't even compile for it as is, here's the fix to make KGDB use UART1. Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Sergei Shtylylov authored
Fix a really old buglet in AMD Au1xx0 restart code: instead of modifying the whole CP0 Config.K0 field to 010b (meaning KSEG0 uncached) before flushing the caches and resetting a board, it only sets bit 1 of that reg. which is effectively a NOP since Config.K0 == 011b as the kernel sets it up (which is also its default value for Au1xx0). Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Sergei Shtylylov authored
Fix the #define's for TX4927/37 timer reg's to match the datasheets (those Signed-off-by: Konstantin Baydarov <kbaidarov@mvista.com> Signed-off-by: Sergei Shtylyov <sshtylyov@mvista.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Ralf Baechle authored
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Mark Mason authored
Signed-off-by: Mark Mason <mason@broadcom.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Mark Mason authored
Signed-off-by: Mark Mason <mason@broadcom.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Mark Mason authored
Make BCM1125 targets to link again. Signed-off-by: Mark Mason <mason@broadcom.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Ralf Baechle authored
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Ralf Baechle authored
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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