1. 29 Jul, 2009 3 commits
    • Michel Dänzer's avatar
      drm/radeon: Don't unreserve twice on failure to validate. · e46074ef
      Michel Dänzer authored
      This is done later in radeon_object_list_unvalidate(). Doing it twice triggers
      a BUG in TTM, rendering X on KMS unusable until reboot.
      Signed-off-by: default avatarMichel Dänzer <daenzer@vmware.com>
      Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
      e46074ef
    • Jerome Glisse's avatar
      drm/radeon/kms: fix bandwidth computation on avivo hardware · c93bb85b
      Jerome Glisse authored
      Fix bandwidth computation and crtc priority in memory controller
      so that crtc memory request are fullfill in time to avoid display
      artifact.
      Signed-off-by: default avatarJerome Glisse <jglisse@redhat.com>
      Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
      c93bb85b
    • Dave Airlie's avatar
      drm/radeon/kms: add initial colortiling support. · e024e110
      Dave Airlie authored
      This adds new set/get tiling interfaces where the pitch
      and macro/micro tiling enables can be set. Along with
      a flag to decide if this object should have a surface when mapped.
      
      The only thing we need to allocate with a mapped surface should be
      the frontbuffer. Note rotate scanout shouldn't require one, and
      back/depth shouldn't either, though mesa needs some fixes.
      
      It fixes the TTM interfaces along Thomas's suggestions, and I've tested
      the surface stealing code with two X servers and not seen any lockdep issues.
      
      I've stopped tiling the fbcon frontbuffer, as I don't see there being
      any advantage other than testing, I've left the testing commands in there,
      just flip the fb_tiled to true in radeon_fb.c
      
      Open: Can we integrate endian swapping in with this?
      
      Future features:
      texture tiling - need to relocate texture registers TXOFFSET* with tiling info.
      
      This also merges Michel's cleanup surfaces regs at init time patch
      even though it makes sense on its own, this patch really relies on it.
      
      Some PowerMac firmwares set up a tiling surface at the beginning of VRAM
      which messes us up otherwise.
      that patch is:
      Signed-off-by: default avatarMichel Dänzer <daenzer@vmware.com>
      Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
      e024e110
  2. 15 Jul, 2009 20 commits
  3. 08 Jul, 2009 17 commits