Call clk_enable() before clk_get_rate(). Also free use
gpmc_clk instead of it's parent l3 clock.

Fixes based on comments from RMK, the real fix would be to
use the gpmc functions for timing calculations.
Signed-off-by: Tony Lindgren <tony@atomide.com>

This patch adds missing defines for TWL4030.
Signed-off-by: Francisco Alecrim <francisco.alecrim@indt.org.br>
Signed-off-by: Carlos Eduardo Aguiar <carlos.aguiar@indt.org.br>
Acked-by: Felipe Balbi <felipe.balbi@nokia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

Signed-off-by: tapio laxström <ext-tapio.laxstroem@nokia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

This patch implements enable/disable for non-CORE DPLLs (DPLLs 1, 2,
4, 5) in the OMAP34xx clock framework.

"Enabling" a DPLL in this context means taking the DPLL from off to
lock, off to bypass, or bypass to lock.  If the clock's target rate is
set to the DPLL parent's clock rate, the DPLL will go to bypass.
Otherwise, the DPLL will attempt to lock.  "Disabling" means going
from bypass or lock to off.

Jouni Högander contributed a fix for _omap3_noncore_dpll_lock().to
bypass the DPLL state test when the DPLL is in autoidle mode.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

This patch adds support for DPLL autoidle control to the OMAP3 clock
framework.  These functions will be used by the noncore DPLL enable
and disable code - this is because, according to the CDP code, the
DPLL autoidle status must be saved and restored across DPLL
lock/bypass/off transitions.

N.B.: the CORE DPLL (DPLL3) has three autoidle mode options, rather
than just two.  This code currently does not support the third option,
low-power bypass autoidle.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

Ensure that people who have contributed several bug fixes to the
34xx clock framework are appropriately credited.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

Convert existing code that reads, modifies, and writes back CM/PRM
register values to use the rmw functions introduced in the previous
patch.  This code should eventually disappear once clockdomain handling
is integrated into the 24xx clock framework.

Also restructure arch/arm/mach-omap2/prcm.c slightly while we
are here.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

This patch implements an idea from Igor Stoppa <igor.stoppa@nokia.com>
from last year.  We use functions to modify PRM/CM register bits,
rather than open-coding those operations.

The patch provides functions that do read + AND + OR + write sequences
on CM and PRM registers: {cm,prm}_rmw_reg_bits(), and
{cm,prm}_rmw_mod_reg_bits().  Several convenience functions are then
implemented on top of those functions for setting and clearing bits:
{cm,prm}_{set,clear}_mod_reg_bits().

These functions don't provide any locking; it is expected that the caller
will handle this.

Thanks to Jouni Högander <jouni.hogander@nokia.com> for catching some
embarrassing errors in earlier versions of this code.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

This patch adapts the existing driver to use the power IRQ handler. This
patch superseeds any previous version.
Signed-off-by: Peter 'p2' De Schrijver <peter.de-schrijver@nokia.com>
Signed-off-by: Felipe Balbi <felipe.balbi@nokia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

Kconfig and Makefile changes
Signed-off-by: Peter 'p2' De Schrijver <peter.de-schrijver@nokia.com>
Signed-off-by: Felipe Balbi <felipe.balbi@nokia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

The following patch implements power button and IRQ support
for triton2 power block.
Signed-off-by: Peter 'p2' De Schrijver <peter.de-schrijver@nokia.com>
Signed-off-by: Felipe Balbi <felipe.balbi@nokia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

If CONFIG_OMAP_RESET_CLOCKS is enabled, musb->clock would
be disabled because nobody was enabling it.

Be sure that omap2430.c enables musb->clock to avoid problems
later.
Signed-off-by: Felipe Balbi <felipe.balbi@nokia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

Prevent AIC23 driver Oopsing when no AIC23 is present by moving some of the
initialisation to after the chip is found.  There seems to be more that
should be fixed in this driver but with this change it can at least be
compiled into a kernel safely.
Signed-off-by: Andrzej Zaborowski <balrog@zabor.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>

[Sorry, the previous patch was a copy/paste mistake, this one should be
better]

I have no access to the docs for this chip but I'm pretty sure the current
address of the two DIDR1 registers is wrong because it's outside the
TUSB-specific register space.  The modified address in turn has a good
chance to be correct.
Signed-off-by: Andrzej Zaborowski <balrog@zabor.org>
Acked-by: Felipe Balbi <felipe.balbi@nokia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

Fixed output from checkpatch.pl and got rid of double spaces.
Signed-off-by: Tony Lindgren <tony@atomide.com>

While getting trying to get the keyboard driver to accept my
keyboard layout I found and fixed a few bugs.

- Fixed the driver to respect the matrix size and .rep
  fields from "struct omap_kp_platform_data"

- Fixed misc. configuration problems.

- Fixed some problems with the interrupt/polling code by
  implementing 100% event driven scan handling (there
  was a race between the timer and interrupt initiated
  calls to twl_4030_kp_scan()).

- Too many interrupts was delivered -> enable "PENDING_DISABLE".

- The controller would hang with keys stuck on -> program
  KEYP_TIMEOUT so sensible timeout.

Other enhancements:

- Simple ghost key suppression.
- Support for non-matrix switches. That is switches connected
  between GND and a row.

To configure the driver for the non-matrix switches you add the
key as you normally would, but the col-index will have to be the
same value as the col-size.

For example with .cols = 2 and you will use the value "2" for
COL for the two non-matrix switches:

static int rocket_control_keymap[] = {
	/* COL ROW */
	KEY(0,  0, KEY_3),
	KEY(0,  1, KEY_2),
	KEY(1,  0, KEY_1),
	KEY(1,  1, KEY_LAUNCH),
	KEY(2,  0, KEY_ABORT),
	KEY(2,  1, KEY_SD),
	0
}

Cleanup:

I might have gone too far when fixing the twl4030-keypad.h file,
but I was loosing breath and attention spelling my way through
these 32+ letter identifiers with names like:

    BIT_KEYP_CTRL_REG_TOLE_EN_MASK

which is a bit in the register:

   REG_KEYP_CTRL_REG

leading to statements like:

   twl4030_kpwrite_u8(TWL4030_MODULE_KEYPAD,
           BIT_KEYP_CTRL_REG_TOLE_EN_MASK, REG_KEYP_CTRL_REG);

What I did was to take out all the redundant stuff like BIT, REG
and MASK, making reading a little easier:

   twl4030_kpwrite_u8(TWL4030_MODULE_KEYPAD,
                      KEYP_CTRL_TOLE_EN, KEYP_CTRL);

There was a lot of configuration stuff in header file that wasn't
really needed. I think I even found a joke:

.h had this line:
   #define BIT_PTV_REG_PTV4                       (0x4)

.c had this:
       /* Set Pre Scalar Field PTV to 4 */
       reg = BIT_LK_PTV_REG_PTV_MASK & (BIT_PTV_REG_PTV4 << BIT_LK_PTV_REG_PTV);
Signed-off-by: Klaus Pedersen <klaus.k.pedersen@nokia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

Signed-off-by: Roman Tereshonkov <roman.tereshonkov@nokia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

Signed-off-by: Hiroshi DOYU <Hiroshi.DOYU@nokia.com>
Acked-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

OMAP2430/3430 contain an 1.8V-only MMC2 host that is not properly
supported by the current driver.  This patch contains changes to
correctly set up this host.
Signed-off-by: Seth Forshee <seth.forshee@gmail.com>
Acked-by: Francisco Alecrim <francisco.alecrim@indt.org.br>
Signed-off-by: Tony Lindgren <tony@atomide.com>

This patch adds device configuration to provide second HSMMC slot support
on OMAP 2430 and 3430 boards.
Signed-off-by: Jarkko Lavinen <jarkko.lavinen@nokia.com>

Change CONFIG_ARCH_OMAP24XX by CONFIG_ARCH_OMAP243X macro when this config
is needed only for 2430 boards.
Signed-off-by: Carlos Eduardo Aguiar <carlos.aguiar@indt.org.br>
Acked-by: Francisco Alecrim <francisco.alecrim@indt.org.br>
Signed-off-by: Tony Lindgren <tony@atomide.com>

Merge branches 'master' and 'linus'

Refresh palmz71_defconfig
Signed-off-by: Francisco Alecrim <francisco.alecrim@indt.org.br>
Signed-off-by: Tony Lindgren <tony@atomide.com>

Change error to warning for twl4030 clock init
Signed-off-by: Tony Lindgren <tony@atomide.com>

Small typo in the patch recently merged to avoid the unused symbol
message for count_partial(). Discussion thread with confirmation of fix at
http://marc.info/?t=120696854400001&r=1&w=2

Typo in the check if we need the count_partial function that was
introduced by 53625b42Signed-off-by: Christoph Lameter <clameter@sgi.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>

* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/ieee1394/linux1394-2.6:
  firewire: fw-ohci: plug dma memory leak in AR handler

* git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6.25:
  sh: Fix up uImage compression type
  remove include/asm-sh/floppy.h
  sh: Fix TIF_USEDFPU clearing under FPU emulation.
  sh: Fix occasional FPU register corruption under preempt.

* 'upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/ralf/upstream-linus:
  [MIPS] XSS1500: Fix compilation
  [MIPS] Bigsur: make defconfig more useful.
  [MIPS] Alchemy: work around clock misdetection on early Au1000
  [MIPS] Add missing 4KEC TLB refill handler
  [MIPS] BCM1480: Fix PCI/HT IO access
  [MIPS] Fix the installation condition of MIPS clocksource
  [MIPS] Check for GCC r10k-cache-barrier support
  [MIPS] I8253: Export i2853_lock to modules.
  [MIPS] VPE loader: Check result of memory allocation.

This patch corrects an error in the driver it8712f_wdt.  You cannot set
the 16-bit WDT_TIMEOUT access as a 16-bit outw, because the byte
ordering will be wrong.  So just do the high 8 bits as a separate
access.
Signed-off-by: Oliver Schuster <olivers137@aol.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>

* master.kernel.org:/home/rmk/linux-2.6-arm:
  [ARM] 4875/1: Add MODULE_ALIAS to ixp4xx-beeper module
  [ARM] 4873/1: Fix ITE 8152 interrupt demux
  [ARM] 4878/1: Add oabi shim for fstatat64

* 'release' of git://lm-sensors.org/kernel/mhoffman/hwmon-2.6:
  hwmon: (w83781d) Fix I/O resource conflict with PNP

* 'for-linus' of git://git.o-hand.com/linux-rpurdie-leds:
  leds: Remove incorrect use of preempt_count() from leds-gpio
  leds: Fix potential leds-gpio oops

* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input:
  Input: make sure input interfaces pin parent input devices
  Input: apm-power - fix crash when unloading modules
  Input: pxa27x - fix keypad KPC macros

Some time ago it turned out that our suspend code ordering broke some
NVidia-based systems that hung if _PTS was executed with one of the PCI
devices, specifically a USB controller, in a low power state.

Then, it was noticed that the suspend code ordering was not compliant
with ACPI 1.0, although it was compliant with ACPI 2.0 (and later), and
it was argued that the code had to be changed for that reason (ref.
http://bugzilla.kernel.org/show_bug.cgi?id=9528).

So we did, but evidently we did wrong, because it's now turning out that
some systems have been broken by this change. Refs:
	http://bugzilla.kernel.org/show_bug.cgi?id=10340
	https://bugzilla.novell.com/show_bug.cgi?id=374217#c16

[ I said at that time that something like this might happend, but the
  majority of people involved thought that it was improbable due to the
  necessity to preserve the compliance of hardware with ACPI 1.0. ]

This actually is a quite serious regression from 2.6.24.

Moreover, the ACPI 1.0 ordering of suspend code introduced another issue
that I have only noticed recently.  Namely, if the suspend of one of
devices fails, the already suspended devices will be resumed without
executing _WAK before, which leads to problems on some systems (for
example, in such situations thermal management is broken on my HP
nx6325).  Consequently, it also breaks suspend debugging on the affected
systems.

Note also, that the requirement to execute _PTS before suspending
devices does not really make sense, because the device in question may
be put into a low power state at run time for a reason unrelated to a
system-wide suspend.

For the reasons outlined above, the change of the suspend ordering
should be reverted, which is done by the patch below.

[ Felix Möller: "I am the reporter from the original Novell Bug:

	https://bugzilla.novell.com/show_bug.cgi?id=374217

  I just tried current git head (two hours ago) with the patch (the one
  from the beginning of this thread) from Rafael and without it.  With
  the patch my MacBook does suspend without it does not." ]
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
Tested-by: Felix Möller <felix@derklecks.de>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>

Plip uses spin_lock_irq/spin_unlock_irq in its IRQ handler (called from
parport IRQ handler), the latter enables interrupts without parport
subsystem IRQ handler expecting it.

The bug can be seen if you compile kernel with lock dependency checking
and use plip --- it produces a warning.

This patch changes it to spin_lock_irqsave/spin_lock_irqrestore, so that
it doesn't enable interrupts when already disabled.
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>

This patch fixes the compilation of the Au1000 XSS1500
board setup and irqmap code.
Signed-off-by: Florian Fainelli <florian.fainelli@telecomint.eu>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

Work around the CPU clock miscalculation on Au1000DA/HA/HB due the
sys_cpupll register being write-only, i.e. actually do what the comment
before cal_r4off() function advertised for years but the code failed at.
This is achieved by just giving user a chance to define the clock
explicitly  in the board config. via CONFIG_SOC_AU1000_FREQUENCY option,
defaulting to 396 MHz if the option is not given...

The patch is based on the AMD's big unpublished patch, the issue seems to
be an undocumented errata (or feature :-)...
Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

Early 4KEc were MIPS32r1 and therefore need some love to get a TLB
refill handler.
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

- removed check for enable HT-PCI bridges, because some CFE version
  init only the needed one and scanning works even with disabled HT
  links
- implemented I/O access behind HT PCI busses
- fixed pci_map for IO resource behind PCI bridge

Tested with E100 and Tulip driver.
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>