The RTC library code contains everything necessary to set the
system time from the RTC; for similar reasons as the previous
commit, it's far better to let the RTC library code sort this
out rather than implement something which might not be
appropriate for everyone.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

Remove the RTC management over a suspend/resume cycle.  As per the
corresponding PXA patch, the RTC library code handles updating
system time on resume.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

When running Linux in non-secure mode (on ARM1176 for example),
depending on the CP15 secure configuration register, the CPSR.F bit
(6) might only be modified from the secure mode. However, the
valid_user_regs() function checks for this bit being cleared. With
commit a6c61e9d, a SIGSEGV is forced in handle_signal() if the user
registers are not considered valid.

The patch also ensures that the CPSR.A bit is cleared and the USR mode
is set if the CPU does not support the 26bit user mode.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

The patch moves the HWCAP definitions and the extern elf_hwcap
declaration to the hwcap.h header file.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

This allows individual CPU support to determine which platform
devices should be registered.  Also fix a copy-n-paste bug in
the I2C power platform device entry.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

The RTC library code contains everything necessary to set the
system time from the RTC; for similar reasons as the previous
commit, it's far better to let the RTC library code sort this
out rather than implement something which might not be
appropriate for everyone.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

Remove the RTC management over a suspend/resume cycle.  Firstly,
we may not be using the internal RTC for time keeping; some
platforms have an external RTC for this inspite of the PXA having
an internal RTC.  Secondly, the RTC library code handles updating
system time on resume.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

Since the number of dma channels varies between pxa25x and pxa27x, it
introduces some specific code in dma.c. This patch moves the specific
code to pxa25x.c and pxa27x.c and makes dma.c more generic.

1. add pxa_init_dma() for dma initialization, the number of channels
   are passed in by the argument

2. add a "prio" field to the "struct pxa_dma_channel" for the channel
   priority, and is initialized in pxa_init_dma()

3. use a general priority comparison with the channels "prio" field so
   to remove the processor specific pxa_for_each_dma_prio macro,  this
   is not lightning fast as the original one,  but it is acceptable as
   it happens when requesting dma, which is usually not so performance
   critical
Signed-off-by: eric miao <eric.miao@marvell.com>
Acked-by: Nicolas Pitre <nico@cam.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

/* should be ok this time, I aligned this patch to your arm:pxa2.mbox */

1. move pxa25x specific IRQ initialization code to pxa25x_init_irq()
and pxa27x code to pxa27x_init_irq(), remove pxa_init_irq()

2. replace all pxa_init_irq() with their PXA25x or PXA27x specific
functions
Signed-off-by: eric miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

ICIP2 is not examined during IRQ entrance, this patch add the
checking if the processor is PXA27x or later, with CoreG bits
in CPUID (Core Generation) > 1
Signed-off-by: eric miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

1. use GPIO_IRQ_mask[] to select those bits of interest, actually
   only those "unmasked" GPIO IRQs with their corresponding bits
   in GPIO_IRQ_mask[] set to "1" should be checked

2. remove #ifdef PXA_LAST_GPIO > 96 .. #endif, GPIO_IRQ_mask[]
   is used to mask out the irrelevant bits, so that even though
   the GEDR3 on PXA25x is reserved, it will be masked, and the
   following code will never run. Another point is that GPIO85-
   GPIO95 bits within GEDR2 will also be masked out on PXA25x
Signed-off-by: eric miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

move the GPIO IRQ initialization code to pxa_init_irq_gpio()
Signed-off-by: eric miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

1. move low IRQ initialization code to pxa_init_irq_low()
Signed-off-by: eric miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

1. define PXA_GPIO_IRQ_BASE to be right after the internal IRQs,
   and define PXA_GPIO_IRQ_NUM to be 128 for all PXA2xx variants

2. make the code specific to the high IRQ numbers (32..64) to be
   PXA27x specific

3. add a function pxa_init_irq_high() to initialize the internal
   high IRQ chip, the invoke of this function could be moved to
   PXA27x specific initialization code
Signed-off-by: eric miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

1. PXA_IRQ_SKIP is defined to be 7 on PXA25x so that the first IRQ
   starts from zero. This makes IRQ numbering inconsistent between
   PXA25x and PXA27x. Remove this macro so that the same IRQ_XXXXX
   definition has the same value on both PXA25x and PXA27x.

2. make IRQ_SSP3..IRQ_PWRI2C valid only if PXA27x is defined, this
   avoids unintentional use of these macros on PXA25x
Signed-off-by: eric miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

pxa_pm_prepare() tried to validate the suspend method type.  As
noted in previous commits:
	eb9289eb
	9c372d06
	e8c9c502

the checking of the suspend type in the 'prepare' method is the
wrong place to do this; use the 'valid' method instead.  This
means that pxa_pm_prepare() can be entirely removed.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

Move the pm_ops structure into the PXA25x and PXA27x support
files.  Remove the old pxa_pm_prepare() function, and rename
the both pxa_cpu_pm_prepare() functions as pxa_pm_prepare().
We'll fix that later.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

pxamci.h redefines the MMC registers differently so they can be used
with ioremap.  Remove the incompatible definitions from pxa-regs.h.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

pxa_pm_finish() does nothing but return zero.  The core code
does nothing with this return value, and will not try to call
the finish method in the pm_ops structure if it is NULL.

Therefore, we can remove this useless function.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

The ARM show_regs() tombstone only partially decodes which ARM ISA was
executing at the time a fault occurred displaying either "(T)" for the
Thumb case or nothing at all for other cases.  This patch therefore
explicitly identifies which state the processor is in at the time of
a fault: ARM, Thumb, Jazelle or JazelleEE.
Signed-off-by: George G. Davis <gdavis@mvista.com>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

Examines the ATAGS pointer (r2) at boot, and interprets
a nonzero value as a reference to an ATAGS structure. A
suitable ATAGS structure replaces the kernel's command line.
Signed-off-by: Bill Gatliff <bgat@billgatliff.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

The current arch/arm/boot/compressed/head.S code only supports cores
to ARMv6 with the old CPU Id format. This patch adds support for the
new ARMv6 with the new CPU Id and ARMv7 cores that no longer have the
ARMv4 cache operations.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

If size=16M offset=2K then we should map two supersections
rather than just one.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

font_acorn_8x8.o was being built in drivers/video/console/ twice
during a build _in the same location_ - once for the kernel proper,
and once for the decompressor.  The result is when you came to run an
install target, the kernel was always rebuilt due to this file
apparantly having been built with different compiler arguments.

Solve this by making a local copy at build time in the decompressor's
directory.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

Driver to control the GPIO pins on the KS8695 processor.
The driver natively supports the Generic GPIO interface.
Signed-off-by: Andrew Victor <andrew@sanpeople.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

If MACH_GTWX5715 is set in Kconfig, this code sets the mach id
automatically. Howeber, this means that any IXP4xx kernel which
is setup to support the gtwx5715 board will not successfully boot
on any other board.

If the bootloader sets the wrong mach id, it should be set correctly
by a kernel shim.
Signed-off-by: Michael-Luke Jones <mlj28@cam.ac.uk>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

This patch fixes up compiling of the gtwx5715 board setup code,
which has apparently been broken since 2.6.18 and the generic
IRQ changes. In addition it removes some unecessary extern
declarations in the gtwx5715-pci.c file.
Signed-off-by: Michael-Luke Jones <mlj28@cam.ac.uk>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

This patch provides support for the Netgear WG302 v2 and WAG302 v2 AccessPoint series.

This patch relies on the patch "Gateway 7001 series support" minimally, as they only have UART2 connected.

Updated to stay below the 80 char limit in uncompress.h
Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
Signed-off-by: Deepak Saxena <dsaxena@mvista.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

This patch provides support for the Gateway 7001 AccessPoint series.

Updated to stay below the 80 char limit in uncompress.h
Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
Signed-off-by: Deepak Saxena <dsaxena@mvista.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

IXDP425 NAND support (arch specific part).

The generic platform driver that is used by ixdp425 platfrom is already
in upstream kernel in 2.6.22-rc1.
Signed-off-by: Vladimir Barinov <vbarinov@ru.mvista.com>
Signed-off-by: Ruslan Sushko <rsushko@ru.mvista.com>
Signed-off-by: Deepak Saxena <dsaxena@mvista.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

The tpmi control registers can be accessed on the internal bus via an
address with PCI attributes or IOP attributes (i.e. read-only,
read-write... etc).  The sas driver needs access to the iop-attribute
registers for initialization.

Changelog:
* use ARRAY_SIZE for num_resources, Russell King
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

Support clock event source based on i.MX general purpose
timer in free running timer mode.
Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
Acked-by: Thomas Gleixner <tglx@linutronix.de>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

Support for generic input output for MX1 family.
The implementation prevents allocation of one pin
by two users, but does not store pointer to the user
description permanently, because this solution
would have bigger memory overhead.

The simple way to integrate code with per BSP
pins setup and allocation is required else all GPIO
registration checking is useless. The function
imx_gpio_setup_multiple_pins() can be used for this
purpose in future.
Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

Modify the common at91 hardware support to deal with the non-MMU
at91x40 family. The base RAM (which is most likely not DRAM) is
set to the configured value. Virtual IO device mapping is set
to be 1 to 1 with the physical addresses.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Acked-by: Andrew Victor <andrew@sanpeople.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

Base at91x40 architecture support defines. These parts are somewhat
simpler than the ARM9 Atmel based parts.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Acked-by: Andrew Victor <andrew@sanpeople.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>