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  1. 06 May, 2010 1 commit
  2. 04 Feb, 2010 1 commit
    • Sekhar Nori's avatar
      davinci: add support for DM6467T EVM · c1978e1d
      Sekhar Nori authored
      DM6467T (T for Turbo) is a newer and faster DM6467
      part from TI. The new part supports 1080p video and
      has the ARM running at 495MHz. More SoC information:
      
      http://focus.ti.com/docs/prod/folders/print/tms320dm6467t.html
      
      Spectrum Digital, Inc has a new EVM for this part.
      It is _mostly_ same as the older DM6467 EVM except
      for a 33MHz crystal input and THS8200 video encoder
      for 1080p support.
      
      The meat of this patch is dedicated to initializing
      the crystal frequency from EVM board file.
      
      Additional notes:
      I did consider some alternative ways to make the crystal
      input board specific including - (1) having board code
      initialize the crystal frequency using the first member
      of soc_info->cpu_clks array (2) introducing a new ref_clk_rate
      member in soc_info structure.
      
      But, the current way seems to be the simplest and least
      intruding considering that both the clock array and SoC
      info structure are actually private to the SoC file. Also
      the fact that davinci_common_init() initializes both the
      soc_info and clocks in one go.
      Signed-off-by: default avatarSekhar Nori <nsekhar@ti.com>
      Signed-off-by: default avatarKevin Hilman <khilman@deeprootsystems.com>
      c1978e1d
  3. 25 Nov, 2009 8 commits
  4. 26 Aug, 2009 6 commits
  5. 31 May, 2009 1 commit
  6. 28 May, 2009 1 commit
  7. 26 May, 2009 4 commits
  8. 27 Apr, 2009 2 commits
  9. 23 Apr, 2009 1 commit
    • Kevin Hilman's avatar
      davinci: major rework of clock, PLL, PSC infrastructure · c5b736d0
      Kevin Hilman authored
      This is a significant rework of the low-level clock, PLL and Power
      Sleep Controller (PSC) implementation for the DaVinci family.  The
      primary goal is to have better modeling if the hardware clocks and
      features with the aim of DVFS functionality.
      
      Highlights:
      - model PLLs and all PLL-derived clocks
      - model parent/child relationships of PLLs and clocks
      - convert to new clkdev layer
      - view clock frequency and refcount via /proc/davinci_clocks
      
      Special thanks to significant contributions and testing by David
      Brownell.
      
      Cc: David Brownell <dbrownell@users.sourceforge.net>
      Signed-off-by: default avatarKevin Hilman <khilman@deeprootsystems.com>
      c5b736d0
  10. 11 May, 2007 1 commit