- 16 Apr, 2009 14 commits
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Mark A. Greer authored
Currently, there is one set of platform_device and platform_data structures for all DaVinci SoCs. The differences in the data between the various SoCs is handled by davinci_serial_init() by checking the SoC type. However, as new SoCs appear, this routine will become more & more cluttered. To clean up the routine and make it easier to add support for new SoCs, move the platform_device and platform_data structures into the SoC-specific code and use the SoC infrastructure to provide access to the data. In the process, fix a bug where the wrong irq is used for uart2 of the dm646x. Signed-off-by: Mark A. Greer <mgreer@mvista.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Mark A. Greer authored
The current gpio code needs to know the number of gpio irqs there are and what the bank irq number is. To determine those values, it checks the SoC type. It also assumes that the base address and the number of irqs the interrupt controller uses is fixed. To clean up the SoC checks and make it support different base addresses and interrupt controllers, have the SoC-specific code set those values in the soc_info structure and have the gpio code reference them there. Signed-off-by: Mark A. Greer <mgreer@mvista.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Mark A. Greer authored
The watchdog code currently hardcodes the base address of the timer its using. To support new SoCs, make it support timers at any address. Use the soc_info structure to do this. Signed-off-by: Mark A. Greer <mgreer@mvista.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Mark A. Greer authored
The davinci timer code currently hardcodes the timer register base addresses, the timer irq numbers, and the timers to use for clock events and clocksource. This won't work for some a new SoC so put those values into the soc_info structure and set them up in the SoC-specific files. Signed-off-by: Mark A. Greer <mgreer@mvista.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Mark A. Greer authored
Use the SoC infrastructure to hold the interrupt controller information (i.e., base address, default priorities, interrupt controller type, and the number of IRQs). The interrupt controller base, although initially put in the soc_info structure's intc_base field, is eventually put in the global 'davinci_intc_base' so the low-level interrupt code can access it without a dereference. These changes enable the SoC default irq priorities to be put in the SoC-specific files, and the interrupt controller to be at any base address. Signed-off-by: Mark A. Greer <mgreer@mvista.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Mark A. Greer authored
The pinmux register base and setup can be different for different SoCs so move the pinmux reg base, pinmux table (and its size) to the SoC infrastructure. Signed-off-by: Mark A. Greer <mgreer@mvista.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Mark A. Greer authored
The current code to support the DaVinci Power and Sleep Controller (PSC) assumes that there is only one controller. This assumption is no longer valid so expand the support to allow greater than one PSC. To accomplish this, put the base addresses for the PSCs in the SoC infrastructure so it can be referenced by the PSC code. This also requires adding an extra parameter to davinci_psc_config() to specify the PSC that is to be enabled/disabled. Signed-off-by: Mark A. Greer <mgreer@mvista.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Mark A. Greer authored
All of the davinci SoCs need to call davinci_clk_init() so put the call in the common init routine. Signed-off-by: Mark A. Greer <mgreer@mvista.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Mark A. Greer authored
The Davinci cpu_is_davinci_*() macros use the SoC part number and variant retrieved from the JTAG ID register to determine the type of cpu that the kernel is running on. Currently, the code to read the JTAG ID register assumes that the register is always at the same base address. This isn't true on some newer SoCs. To solve this, have the SoC-specific code set the JTAG ID register base address in soc_info structure and add a 'cpu_id' member to it. 'cpu_id' will be used by the cpu_is_davinci_*() macros to match the cpu id. Also move the info used to identify the cpu type into the SoC-specific code to keep all SoC-specific code together. The common code will read the JTAG ID register, search through an array of davinci_id structures to identify the cpu type. Once identified, it will set the 'cpu_id' member of the soc_info structure to the proper value and the cpu_is_davinci_*() macros will now work. Signed-off-by: Mark A. Greer <mgreer@mvista.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Mark A. Greer authored
Create a structure to encapsulate SoC-specific information. This will assist in generalizing code so it can be used by different SoCs that have similar hardware but with minor differences such as having a different base address. The idea is that the code for each SoC fills out a structure with the correct information. The board-specific code then calls the SoC init routine which in turn will call a common init routine that makes a copy of the structure, maps in I/O regions, etc. After initialization, code can get a pointer to the structure by calling davinci_get_soc_info(). Eventually, the common init routine will make a copy of all of the data pointed to by the structure so the original data can be made __init_data. That way the data for SoC's that aren't being used won't consume memory for the entire life of the kernel. The structure will be extended in subsequent patches but initially, it holds the map_desc structure for any I/O regions the SoC/board wants statically mapped. Signed-off-by: Mark A. Greer <mgreer@mvista.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Chaithrika U S authored
Fix EMAC driver build errors for 2.6.30-rc2 staging branch The member 'bus_id' no longer exists in the device structure, instead use dev_name() function. Also, replace netif_rx_schedule() and netif_rx_complete() with napi_schedule() and napi_complete() respectively. Tested on TI DM644x and DM646x EVMs. Signed-off-by: Chaithrika U S <chaithrika@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Kevin Hilman authored
Conflicts: arch/arm/mach-davinci/board-evm.c arch/arm/mach-davinci/include/mach/nand.h drivers/ide/palm_bk3710.c drivers/media/video/Makefile drivers/misc/eeprom/at24.c drivers/misc/eeprom/at25.c drivers/mmc/host/Kconfig drivers/mmc/host/Makefile drivers/mtd/nand/Kconfig drivers/mtd/nand/Makefile drivers/mtd/nand/davinci_nand.c drivers/usb/musb/davinci.c drivers/video/Makefile drivers/watchdog/davinci_wdt.c include/linux/memory.h sound/soc/davinci/davinci-evm.c sound/soc/davinci/davinci-sffsdr.c
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Troy Kisky authored
Move the creation of a random ethernet address from devices.c into davinci_emac.c. This allows me to delete the davinci_emac_init function and directly call the dmxxx specific function from the board file. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
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Kevin Hilman authored
This reverts commit 1420b5d7.
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- 15 Apr, 2009 5 commits
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Troy Kisky authored
Use the same mac order in emac_set_type0addr as in emac_set_type1addr. The byte order was reversed. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Stijn Devriendt authored
Signed-off-by: Stijn Devriendt <HIGHGuY@gmail.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Vipin Bhandari authored
The scatterlist traversal is made proper. The patch has some minor comments modification and also sets the value written to the DAVINCI_MMCTOR register properly. The timeout calculation is made proper by deriving it from the clock values. This patch incorporates most of review comments given on LKLM by Pierre Ossman. Signed-off-by: Vipin Bhandari <vipin.bhandari@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Naresh Medisetty authored
Currently the auto generated file mach-types.h is checking for MACH_DAVINCI_DM6467_EVM, while it is configured as MACH_DAVINCI_DM646X_EVM in the Kconfigs and defconfigs. So machine_is_davinci_dm6467_evm() always returns FALSE. Signed-off-by: Naresh Medisetty <naresh@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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David Brownell authored
Update NAND partitioning for the dm6446 evm, unmasking the hidden data at the beginning and letting the kernel be updated from Linux. - This is boot-compatible with TI's software (U-Boot 1.20 and both the 2.6.10 and 2.6.18 kernels), in terms of startup and loading kernels from flash. - In the same way, it's also boot-compatible with mainline U-Boot, which stores U-Boot params in block 0 not block 16. - It's not quite compatible with systems that previously used NAND partitions to hold (filesystem) data. The compatibilities are a bit different based on which kernel was used previously + Users of TI/MV kernels no longer see mtd2 "params" (mainline u-boot env is in a different place) * Filesystem is now mtd2 ... vs mtd3 + Users of GIT kernels now see mtd0 and mtd1 partitions * Filesystem partition starts 640 KBytes earlier * Filesystem is now mtd2 ... vs mtd0 * Linux now *uses* the flash-resident BBT * Removes annoying slowdown/hiccup during boot * Potentially ~64KB less space available with TI/MV kernels If you *used* NAND partitions from Linux, there is no solution that's fully compatible with all previous kernels in those respects ... ergo this "best compromise". It'd be good to back back up the filesystem data; or, carry your own backwards-compatibility patch for awhile. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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- 14 Apr, 2009 21 commits
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Linus Torvalds authored
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git://git.kernel.org/pub/scm/linux/kernel/git/anholt/drm-intelLinus Torvalds authored
* 'drm-intel-next' of git://git.kernel.org/pub/scm/linux/kernel/git/anholt/drm-intel: drm/i915: fix scheduling while holding the new active list spinlock drm/i915: Allow tiling of objects with bit 17 swizzling by the CPU. drm/i915: Correctly set the write flag for get_user_pages in pread. drm/i915: Fix use of uninitialized var in 40a5f0de drm/i915: indicate framebuffer restore key in SysRq help message drm/i915: sync hdmi detection by hdmi identifier with 2D drm/i915: Fix a mismerge of the IGD patch (new .find_pll hooks missed) drm/i915: Implement batch and ring buffer dumping
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Hugh Dickins authored
Revert part of af5c820a ("x86: cpumask: use work_on_cpu in arch/x86/kernel/microcode_core.c") That change is causing only one Intel CPU's microcode to be updated e.g. microcode: CPU3 updated from revision 0x9 to 0x17, date = 2005-04-22 where before it announced that also for CPU0 and CPU1 and CPU2. We cannot use work_on_cpu() in the CONFIG_MICROCODE_OLD_INTERFACE code, because Intel's request_microcode_user() involves a copy_from_user() from /sbin/microcode_ctl, which therefore needs to be on that CPU at the time. Signed-off-by: Hugh Dickins <hugh@veritas.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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Shaohua Li authored
regression caused by commit 5e118f41: i915_gem_object_move_to_inactive() should be called in task context, as it calls fput(); Signed-off-by: Shaohua Li<shaohua.li@intel.com> [anholt: Add more detail to the comment about the lock break that's added] Signed-off-by: Eric Anholt <eric@anholt.net>
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Linus Torvalds authored
Merge branch 'core-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip * 'core-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: lockdep: warn about lockdep disabling after kernel taint, fix
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git://git.kernel.org/pub/scm/linux/kernel/git/mszeredi/fuseLinus Torvalds authored
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mszeredi/fuse: fuse: fix "direct_io" private mmap fuse: fix argument type in fuse_get_user_pages()
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git://git.kernel.org/pub/scm/linux/kernel/git/ryusuke/nilfs2Linus Torvalds authored
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/ryusuke/nilfs2: nilfs2: fix possible mismatch of sufile counters on recovery nilfs2: segment usage file cleanups nilfs2: fix wrong accounting and duplicate brelse in nilfs_sufile_set_error nilfs2: simplify handling of active state of segments fix nilfs2: remove module version nilfs2: fix lockdep recursive locking warning on meta data files nilfs2: fix lockdep recursive locking warning on bmap nilfs2: return f_fsid for statfs2
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git://git.monstr.eu/linux-2.6-microblazeLinus Torvalds authored
* 'fixes-for-linus' of git://git.monstr.eu/linux-2.6-microblaze: microblaze: Add missing FILE tag to MAINTAINERS microblaze: remove duplicated #include's microblaze: struct device - replace bus_id with dev_name() microblaze: Simplify copy_thread() microblaze: Add TIMESTAMPING constants to socket.h microblaze: Add missing empty ftrace.h file microblaze: Fix problem with removing zero length files
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git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6Linus Torvalds authored
* git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6: sh: Add in PCI bus for DMA API debugging. sh: Pre-allocate a reasonable number of DMA debug entries. sh: sh7786: modify usb setup timeout judgment bug. MAINTAINERS: Update sh architecture file patterns. sh: ap325: use edge control for ov772x camera sh: Plug in support for ARCH=sh64 using sh SRCARCH. sh: urquell: Fix up address mapping in board comments. sh: Add support for DMA API debugging. sh: Provide cpumask_of_pcibus() to fix NUMA build. sh: urquell: Add board comment sh: wire up sys_preadv/sys_pwritev() syscalls. sh: sh7785lcr: fix PCI address map for 32-bit mode sh: intc: Added resume from hibernation support to the intc
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David Howells authored
Fix lpfc_parse_bg_err()'s use of do_div(). It should be passing a 64-bit variable as the first parameter. However, since it's only using a 32-bit variable, it doesn't need to use do_div() at all, but can instead use the division operator. This deals with the following warnings: CC drivers/scsi/lpfc/lpfc_scsi.o drivers/scsi/lpfc/lpfc_scsi.c: In function 'lpfc_parse_bg_err': drivers/scsi/lpfc/lpfc_scsi.c:1397: warning: comparison of distinct pointer types lacks a cast drivers/scsi/lpfc/lpfc_scsi.c:1397: warning: right shift count >= width of type drivers/scsi/lpfc/lpfc_scsi.c:1397: warning: passing argument 1 of '__div64_32' from incompatible pointer type Signed-off-by: David Howells <dhowells@redhat.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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Leandro Dorileo authored
Updates some usb_serial_port members documentation. Signed-off-by: Leandro Dorileo <ldorileo@gmail.com> Signed-off-by: Alan Cox <alan@lxorguk.ukuu.org.uk> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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Tony Breeds authored
In commit 51dcdfec ("parport: Use the PCI IRQ if offered") parport_pc_probe_port() gained an irqflags arg. This isn't being supplied on powerpc. This patch make powerpc fallback to the old behaviour, that is using "0" for irqflags. Fixes build failure: In file included from drivers/parport/parport_pc.c:68: arch/powerpc/include/asm/parport.h: In function 'parport_pc_find_nonpci_ports': arch/powerpc/include/asm/parport.h:32: error: too few arguments to function 'parport_pc_probe_port' arch/powerpc/include/asm/parport.h:32: error: too few arguments to function 'parport_pc_probe_port' arch/powerpc/include/asm/parport.h:32: error: too few arguments to function 'parport_pc_probe_port' make[3]: *** [drivers/parport/parport_pc.o] Error 1 Signed-off-by: Tony Breeds <tony@bakeyournoodle.com> Signed-off-by: Alan Cox <alan@linux.intel.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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Alan Cox authored
These got overlooked first time around. Signed-off-by: Alan Cox <alan@linux.intel.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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Alan Cox authored
If the ti-usb adapter returns an zero data length frame (which happens) then we leak a kref. Found by Christoph Mair <christoph.mair@gmail.com> who proposed a patch. The patch here is different as Christoph's patch didn't work for the case where tty = NULL and data arrived but Christoph did all the hard work chasing it down. Signed-off-by: Alan Cox <alan@linux.intel.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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Alan Cox authored
ACM sets the low latency flag but calls the flip buffer routines from IRQ context which isn't permitted (and as of 2.6.29 causes a warning hence this one was caught) Fortunatelt ACM doesn't need to set this flag in the first place as it only set it to work around problems in ancient (pre tty flip rewrite) kernels. Reported-by: Chuck Ebbert <cebbert@redhat.com> Signed-off-by: Alan Cox <alan@lxorguk.ukuu.org.uk> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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Kevin Hilman authored
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Sekhar Nori authored
The skb data allocated for packet data received is 4 byte aligned. Unfortunately, this causes non-32bit aligned accesses in IP stack because the MAC header is non-word aligned (14 bytes). The result can be observed by looking at /proc/cpu/alignment while the device is over network. Doing an skb_reserve(NET_IP_ALIGN) as other driver do fixed the issue. A quick performance test over lab network using iperf on DM6446 EVM showed an increase in bandwidth from 60Mbits/s to 70Mbits/s. Signed-off-by: Steve Chen <schen@mvista.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Sekhar Nori authored
The provision for extra bytes in each rx buffer was meant for allocators who cannot guarantee cacheline aligned buffer allocation. cacheline aligned allocation is guaranteed by alloc_skb so this provision is not required. This should save 32*128 = 4k of space. Tested on DM6446 EVM using NFS root, iperf (TCP) and tftp of a gigabyte of data. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Kevin Hilman authored
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Michal Simek authored
Signed-off-by: Michal Simek <monstr@monstr.eu>
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Ingo Molnar authored
Impact: build fix for Sparc and s390 Stephen Rothwell reported that the Sparc build broke: In file included from kernel/panic.c:12: include/linux/debug_locks.h: In function '__debug_locks_off': include/linux/debug_locks.h:15: error: implicit declaration of function 'xchg' due to: 9eeba613: lockdep: warn about lockdep disabling after kernel taint There is some inconsistency between architectures about where exactly xchg() is defined. The traditional place is in system.h but the more logical point for it is in atomic.h - where most architectures (especially new ones) have it defined. These architecture also still offer it via system.h. Some, such as Sparc or s390 only have it in asm/system.h and not available via asm/atomic.h at all. Use the widest set of headers in debug_locks.h and also include asm/system.h. Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Cc: Frederic Weisbecker <fweisbec@gmail.com> Cc: "David S. Miller" <davem@davemloft.net> Cc: Linus Torvalds <torvalds@linux-foundation.org> LKML-Reference: <20090414144317.026498df.sfr@canb.auug.org.au> Signed-off-by: Ingo Molnar <mingo@elte.hu>
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