Commits · aaf76a3245c02faba51c96b9a340c14d6bb0dcc0 · linux / linux-davinci

11 Oct, 2007 40 commits

[MIPS] tlbex.c: Cleanup __init usage. · aaf76a32

Franck Bui-Huu authored Oct 09, 2007

Signed-off-by: Franck Bui-Huu <fbuihuu@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

aaf76a32

[MIPS] WRPPMC serial support move to platform device · 2c4d1357

Yoichi Yuasa authored Oct 11, 2007

Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

2c4d1357

[MIPS] R1: Fix hazard barriers to make kernels work on R2 also. · 572afc24

Ralf Baechle authored Sep 21, 2007

Tested with Malta; inflates malta_defconfig by 3932 bytes. Ideally there
should be additional configuration to allow getting rid of this overhead
but that would be too much complexity at this stage of the release cycle.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

572afc24

[MIPS] VPE: reimplement ELF loader. · bdf5d42c

Ralf Baechle authored Oct 10, 2007

Loading ELF binaries based on the section table is totally wrong. This
still leaves the other fat bug of referencing symbols in an executable
unfixed, so people better don't run strip on their binaries ...

As added bonus the new loader is also 23 lines shorter.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

bdf5d42c

[MIPS] cleanup WRPPMC include files · 4b92fe23

Yoichi Yuasa authored Oct 10, 2007

Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

4b92fe23

[MIPS] Add BUG_ON assertion for attempt to run kernel on the wrong CPU type. · dec8b1ca
Franck Bui-Huu authored Oct 08, 2007
```
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
```
dec8b1ca
[MIPS] SMP: Use ISO C struct initializer for local structs. · 89a8a5a6
Ralf Baechle authored Oct 04, 2007
```
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
```
89a8a5a6
[MIPS] SMP: Kill useless casts. · c50cade9
Ralf Baechle authored Oct 04, 2007
```
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
```
c50cade9
[MIPS] Kill num_online_cpus() loops. · b5eb5511
Ralf Baechle authored Oct 03, 2007
```
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
```
b5eb5511
[MIPS] SMP: Implement smp_call_function_mask(). · bd6aeeff
Ralf Baechle authored Oct 03, 2007
```
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
```
bd6aeeff

[MIPS] Make facility to convert CPU types to strings generally available. · 9966db25

Ralf Baechle authored Oct 11, 2007

So far /proc/cpuinfo has been the only user but human readable processor
name are more useful than that for proc.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

9966db25

[MIPS] Convert list of CPU types from #define to enum. · 36cfbaad
Ralf Baechle authored Oct 11, 2007
```
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
```
36cfbaad
[MIPS] Optimize get_unaligned / put_unaligned implementations. · 9cfde202
Ralf Baechle authored Feb 14, 2007
```
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
```
9cfde202
[MIPS] checkfiles: Fix "need space after that ','" errors. · 21a151d8
Ralf Baechle authored Oct 11, 2007
```
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
```
21a151d8
[MIPS] Fix "no space between function name and open parenthesis" warnings. · 49a89efb
Ralf Baechle authored Oct 11, 2007
```
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
```
49a89efb

[MIPS] Allow hardwiring of the CPU type to a single type for optimization. · 10cc3529

Ralf Baechle authored Oct 11, 2007

This saves a few k on systems which only ever ship with a single CPU type.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

10cc3529

[MIPS] tlbex: Size optimize code by declaring a few functions inline. · aeffdbba
Ralf Baechle authored Oct 11, 2007
```
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
```
aeffdbba

[MIPS] pg-r4k.c: Dump the generated code · 1ac74d52

Maciej W. Rozycki authored Oct 02, 2007

Dump the generated code for clear/copy page calls like it is done for TLB 
fault handlers.  Useful for debugging.
Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

1ac74d52

[MIPS] Cobalt: Remove cobalt_machine_power_off() · f13558c2

Yoichi Yuasa authored Oct 02, 2007

It's same as cobalt_machine_halt().
Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

f13558c2

[MIPS] Cobalt: Move reset port definition to arch/mips/cobalt/reset.c · 3282bd3c

Yoichi Yuasa authored Oct 02, 2007

It's only used in arch/mips/cobalt/reset.c.
Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

3282bd3c

[MIPS] Cobalt: Move UART base definition to arch/mips/cobalt/console.c · 5a860424

Yoichi Yuasa authored Oct 02, 2007

They're only used in arch/mips/cobalt/console.c.
Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

5a860424

[MIPS] Cobalt: Move PCI definitions to arch/mips/pci/fixup-cobalt.c. · b4126e86

Yoichi Yuasa authored Oct 02, 2007

These PCI definitions are only used in arch/mips/pci/fixup-cobalt.c.
Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

b4126e86

[MIPS] MTX1: Add defconfig file · b1df86d6

Florian Fainelli authored Oct 01, 2007

Signed-off-by: Florian Fainelli <florian.fainelli@telecomint.eu>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

b1df86d6

[MIPS] Cobalt: Add LED support to cobalt_defconfig · 414461f9

Yoichi Yuasa authored Oct 01, 2007

Add LED support to cobalt_defconfig.
Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

414461f9

[MIPS] Cobalt: Add Qube series front LED support to platform register · 9a203755

Yoichi Yuasa authored Oct 01, 2007

Add Cobalt Qube series front LED support to platform register.
Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

9a203755

[MIPS] Cobalt: Add Cobalt Raq LED platform register and power off trigger · e86169ff
Yoichi Yuasa authored Oct 01, 2007
```
Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
```
e86169ff
[MIPS] Optimize __alloc_zeroed_user_highpage implementation. · f4fae826
Ralf Baechle authored Oct 11, 2007
```
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
```
f4fae826

[MIPS] Avoid indexed cacheops. · db813fe5

Ralf Baechle authored Sep 27, 2007

On MP configurations it's highly dubious what this code will actually
affect since blasting away cachelines may or may not do the right
thing wrt. cache coherency.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

db813fe5

[MIPS] Don't abort the build process if '-msym32' isn't supported · e58d95ab

Franck Bui-Huu authored Sep 27, 2007

-msym32 and previously the strategy to tell the compiler to generate
64-bit code but the assembler to put it into 32-bit ELF was initially
a hack to get around the lack of proper 64-bit binutils support and
later turned into a neat optimization with significant code size
savings.  But it's really just an optimization so there is nothing
wrong with just dropping the option (and whatever else goes along with
it, I forgot all the nasty details) on the floor if due to a vintage
compiler it can't be suported.
Signed-off-by: Franck Bui-Huu <fbuihuu@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

e58d95ab

[MIPS] Clockevent driver for BCM1480 · e9f874b6
Ralf Baechle authored Oct 11, 2007
```
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
```
e9f874b6
[MIPS] Clockevent driver for BCM1250 · 9b9ea220
Ralf Baechle authored Oct 11, 2007
```
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
```
9b9ea220

[MIPS] i8253 PIT clocksource and clockevent drivers · d865bea4

Ralf Baechle authored Oct 11, 2007

Derived from the i386 variant with a few x86 complexities chopped off.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

d865bea4

[MIPS] IP27: Add clocksource drivers · 87b2335d
Ralf Baechle authored Oct 11, 2007
```
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
```
87b2335d
[MIPS] Jazz clockevent driver · 584d98be
Ralf Baechle authored Oct 11, 2007
```
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
```
584d98be

[MIPS] Dyntick support for SMTC: · ea580401

Ralf Baechle authored Oct 11, 2007

The kernel currently only supports broadcasting of the timer interrupt
from a single timer, not multicasting into two multicast groups of
processors. So the implemented mechanism for SMTC works by broadcasting
the cp0 compare interrupt on VPE 0 and ignoring it on any additional VPEs.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

ea580401

[MIPS] Implement clockevents for R4000-style cp0 count/compare interrupt · 7bcf7717
Ralf Baechle authored Oct 11, 2007
```
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
```
7bcf7717
[MIPS] Consolidate all variants of MIPS cp0 timer interrupt handlers. · 91a2fcc8
Ralf Baechle authored Oct 11, 2007
```
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
```
91a2fcc8

[MIPS] Switch from to_tm to rtc_time_to_tm · 90b02340

Ralf Baechle authored Oct 11, 2007

This replaces the MIPS-specific to_tm function with the generic
rtc_time_to_tm function.  The big difference between the two functions is
that rtc_time_to_tm uses epoch 70 while to_tm uses 1970, so the result of
rtc_time_to_tm needs to be fixed up.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

90b02340

[MIPS] Deforest the function pointer jungle in the time code. · 4b550488

Ralf Baechle authored Oct 11, 2007

Hard to follow who is pointing what to where and why so it's simply getting
in the way of the time code renovation.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

4b550488

[MIPS] Use generic NTP code for all MIPS platforms · f5ff0a28
Ralf Baechle authored Aug 13, 2007
```
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
```
f5ff0a28