- 09 Mar, 2010 38 commits
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Barry Song authored
During very early init, the stack pointer is given a slightly incorrect value (&init_thread_union). The value is later adjusted to the right one during early init (&init_thread_union + THREAD_SIZE), but it is used a few times in between. While the few functions used don't actually put things onto the stack (due to optimization), it's best if we simply use the right value from the start. Signed-off-by:
Barry Song <barry.song@analog.com> Signed-off-by:
Mike Frysinger <vapier@gentoo.org>
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Barry Song authored
Use the common attribute rather than setting the section name directly. The common linker script defines expect the newer naming. Signed-off-by:
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Barry Song authored
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Jie Zhang authored
Since we are now discarding .exit.text at runtime instead of link time, we need to place all .text sections ahead of the .data sections. Otherwise, a really large attached initramfs may cause link errors as it pushes the PC relative relocations behind the limits of the Blackfin ISA (~16meg). The instructions in the .exit.text are unable to call back into the .text sections leading to a link failure. Signed-off-by:
Jie Zhang <jie.zhang@analog.com> Signed-off-by:
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Yi Li authored
Signed-off-by:
Yi Li <yi.li@analog.com> Signed-off-by:
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Yi Li authored
There is no need to use {get,put}_cpu() when we already have a spinlock to protect against multiple processors running simultaneously. Signed-off-by: -
Graf Yang authored
Signed-off-by:
Graf Yang <graf.yang@analog.com> Signed-off-by:
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Yi Li authored
SMP systems require per-cpu local clock event devices in order to enable HRT support. One a BF561, we can use local core timer for this purpose. Originally, there was one global core-timer clock event device set up for core A. To accomplish this feat, we need to split the gptimer0/core timer logic so that each is a standalone clock event. There is no requirement that we only have one clock event source anyways. Once we have this, we just define per-cpu clock event devices for each local core timer. Signed-off-by:
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Graf Yang authored
Common API already provides functions for managing online CPUs. Signed-off-by:
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Sonic Zhang authored
Now that the Blackfin IRQ controller supports this, drivers get the normal functionality of controlling which CPU to bind IRQs to. Signed-off-by:
Sonic Zhang <sonic.zhang@analog.com> Signed-off-by:
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Mike Frysinger authored
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Mike Frysinger authored
Don't want the compiler assuming the rare sanity checks are the norm and optimize for those paths. Signed-off-by: -
Sonic Zhang authored
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Michael Hennerich authored
Signed-off-by:
Michael Hennerich <michael.hennerich@analog.com> Signed-off-by:
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Valentin Yakovenkov authored
Signed-off-by:
Valentin Yakovenkov <yakovenkov@gmail.com> Signed-off-by:
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Sonic Zhang authored
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Mike Frysinger authored
The Kconfig option was never mainlined, so replace the define with the actual pin that it is hooked up to by default. Signed-off-by: -
Mike Frysinger authored
These platforms don't hook up to this USB controller, so no point in declaring resources for it. Signed-off-by: -
Michael Hennerich authored
The BF51x's Instruction SRAM is 32kB, not 48kB. Signed-off-by:
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Michael Hennerich authored
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Michael Hennerich authored
The gpio label size is 16 char, but the current code uses a longer name resulting in chopped display. So use a shorter name. Reported-by:
Peter Meerwald <pmeerw@pmeerw.net> Signed-off-by:
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Michael Hennerich authored
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Sonic Zhang authored
Make sure the non-constant version of the dma_sync functions actually complete instead of recursively calling itself forever. Signed-off-by:
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Mike Frysinger authored
The option already exists for everyone in init/Kconfig. Signed-off-by: -
Mike Frysinger authored
Rather than copy and paste the MMR defines and register layout, consolidate everything in one place. Signed-off-by: -
Mike Frysinger authored
These all just go to the stub syscall at the moment, so this is largely future proofing. Signed-off-by: -
Graf Yang authored
The current Blackfin SMP code relies on the legacy cpu area code, so select it until we port things to the newer code. Signed-off-by:
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Sonic Zhang authored
We weren't handling the user-specified cache behavior for the reserved memory regions (via mem=/max_mem=). The no-MPU code already takes care of this, so add support to the MPU code as well. Signed-off-by:
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Michael Hennerich authored
This lets us support the new BF527-EZKIT V2.1 via platform resources tweaks only. Signed-off-by:
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Michael Hennerich authored
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Barry Song authored
Attempting to use the MPU while doing XIP out of parallel flash hooked up to the async memory bus would often result in random crashes as the MPU slowly corrupted memory. The fallout here is that the async banks gain MPU protection from user space too. So any accesses have to go through the mmap() interface rather than just using hardcoded pointers. Signed-off-by:
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Yi Li authored
Sometimes a SMP system will randomly panic at boot. This is due to caches being out of sync when one core tries to signal the other. So when one core calls another via IPI, flush the data caches. Signed-off-by:
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Mike Frysinger authored
Rather than have every SPORT driver copy & paste things, declare the C structure and MMR bitmasks in one place for everyone to use. Signed-off-by: -
Sonic Zhang authored
This lets people easily select the UART/SPORT consoles for early printk while leveraging the pins declared in the boards file. Signed-off-by:
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Sonic Zhang authored
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Sonic Zhang authored
Rather than keeping the pins in the actual driver and worrying about a mess of Kconfig options, declare all the desired pin resources in the boards file. This lets people easily select the specific pins/ports for the normal emulated UART as well as GPIOs for CTS/RTS. Signed-off-by:
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Barry Song authored
Signed-off-by:
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Sonic Zhang authored
Rather than keeping the pins in the actual driver and worrying about a mess of Kconfig options, declare all the desired pin resources in the boards file. This lets people easily select the specific pins/ports for the normal UART as well as GPIOs for CTS/RTS. Signed-off-by:
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- 08 Mar, 2010 2 commits
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Linus Torvalds authored
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git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core-2.6Linus Torvalds authored
* git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core-2.6: (62 commits) msi-laptop: depends on RFKILL msi-laptop: Detect 3G device exists by standard ec command msi-laptop: Add resume method for set the SCM load again msi-laptop: Support some MSI 3G netbook that is need load SCM msi-laptop: Add threeg sysfs file for support query 3G state by standard 66/62 ec command msi-laptop: Support standard ec 66/62 command on MSI notebook and nebook Driver core: create lock/unlock functions for struct device sysfs: fix for thinko with sysfs_bin_attr_init() sysfs: Kill unused sysfs_sb variable. sysfs: Pass super_block to sysfs_get_inode driver core: Use sysfs_rename_link in device_rename sysfs: Implement sysfs_rename_link sysfs: Pack sysfs_dirent more tightly. sysfs: Serialize updates to the vfs inode sysfs: windfarm: init sysfs attributes sysfs: Use sysfs_attr_init and sysfs_bin_attr_init on module dynamic attributes sysfs: Document sysfs_attr_init and sysfs_bin_attr_init sysfs: Use sysfs_attr_init and sysfs_bin_attr_init on dynamic attributes sysfs: Use one lockdep class per sysfs attribute. sysfs: Only take active references on attributes. ...
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