The rtc-omap driver currently hardcodes the RTC wakeup capability
to be "not capable". While this seems to be true for existing OMAP1
boards which are not wired for this, the DA850/OMAP-L138 SoC, the
RTC can always be wake up source from its "deep sleep" mode.

This patch lets the wakeup capability to be set from platform data and
does not override the setting from the driver. For DA850/OMAP-L138, this
is done from arch/arm/mach-davinci/devices-da8xx.c:da8xx_register_rtc()

Note that this patch does not change the behavior on any existing OMAP1
board since the platform device registration sets the wakeup capability
to 0 by default.
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>

This driver features:

* Alarm support.
* Periodic interrupt by using a timer include into the RTC module.
* The update interrupt is not supported by this RTC module.

This driver was tested on a DM365 EVM by using the rtc-test application
from the Documentation/rtc.txt.
Signed-off-by: Miguel Aguilar <miguel.aguilar@ridgerun.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Acked-by: Alessandro Zummo <a.zummo@towertech.it>

Currently, the ISR in the EDMA driver clears the pending interrupt for all
channels without regard to whether that channel has a registered callback
or not.

This causes problems for devices like DM355/DM365 where the multimedia
accelerator uses EDMA by polling on the interrupt pending bits of some of the
EDMA channels. Since these channels are actually allocated through the Linux
EDMA driver (by an out-of-kernel module), the same shadow region is used by
Linux and accelerator. There a race between the Linux ISR and the polling code
running on the accelerator on the IPR (interrupt pending register).

This patch fixes the issue by making the ISR clear the interrupts only for
those channels which have interrupt enabled. The channels which are allocated
for the purpose of being polled on by the accelerator will not have a callback
function provided and so will not have IER (interrupt enable register) bits set.

Tested on DM365 and OMAP-L137/L138 with audio and MMC/SD (as EDMA users).
Signed-off-by: Anuj Aggarwal <anuj.aggarwal@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
CC: Archith John Bency <archith@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>

The merge for 2.6.34 brings in 8-bit support to the DaVinci MMC/SD driver.

This patch updates the platform data for DA830/OMAP-L137 EVM to use 8-wire
support available in the driver.
Signed-off-by: Vipin Bhandari <vipin.bhandari@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>

The DA830/OMAP-L137 EVM has GPIO based card detection logic, but the current
code does not use it.

Add support for GPIO based card detection to avoid reading the card to see
if a card is present or not.
Signed-off-by: Vipin Bhandari <vipin.bhandari@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>

Cleanup usage of void pointers when using genirq.  genirq API
takes and returns void *, where this GPIO API is using those
as __iomem pointers.
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>

- Convert data/functions to static
- include headers for missing declarations
- pointer cleanups:  struct foo *__iomem f --> struct foo __iomem *f;
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>

IRQ 29 has two possible interrupts DDRINT and RTC, but having both in
the default priority table is confusing (and triggers a warning from
sparse.)

This patch removes the lower priority DDRINT from the default priority
table leaving the RTC setting as the default.
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>

Improve the suspend and resume callbacks in DaVinci MMC host controller driver.
Modify the reset status of the contorller and clock during suspend and resume.
Also migrate the power management callbacks from platform driver to dev_pm_ops
structure.

Tested on DA850/OMAP-L138 EVM.
Signed-off-by: Chaithrika U S <chaithrika@ti.com>
Acked-by: Kevin Hilman <khilman@deeprootsystems.com>

Add a helper function which will aid in changing the reset
status of the controller.
Signed-off-by: Chaithrika U S <chaithrika@ti.com>
Acked-by: Kevin Hilman <khilman@deeprootsystems.com>

On some platforms like DM355, the number of EDMA parameter
slots available for EDMA_SLOT_ANY usage are few. In such cases,
if MMC/SD uses 16 slots for each instance of MMC controller,
then the number of slots available for other modules will be
very few.

By passing the number of EDMA slots to be used in MMC driver
from platform data, EDMA slots available for other purposes
can be controlled.
Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
Acked-by: Kevin Hilman <khilman@deeprootsystems.com>

Migrate from the legacy PM hooks to use dev_pm_ops structure.
Signed-off-by: Chaithrika U S <chaithrika@ti.com>
Acked-by: Kevin Hilman <khilman@deeprootsystems.com>

The davinci emac driver uses some ARM specific DMA APIs
for cache coherency which have been removed from kernel
with the 2.6.34 merge.

Modify the driver to use the dma_{map, unmap}_single() APIs
defined in dma-mapping.h

Without this fix, the driver fails to compile on Linus's
tree.

Tested on DM365 and OMAP-L138 EVMs.
Signed-off-by: Sekhar Nori <nsekhar@ti.com>

On some platforms like DM355, the number of EDMA parameter
slots available for EDMA_SLOT_ANY usage are few. In such cases,
if MMC/SD uses 16 slots for each instance of MMC controller,
then the number of slots available for other modules will be
very few.

By passing the number of EDMA slots to be used in MMC driver
from platform data, EDMA slots available for other purposes
can be controlled.
Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
Acked-by: Kevin Hilman <khilman@deeprootsystems.com>

This off by one error was found by smatch.

drivers/net/davinci_emac.c +2390 emac_dev_open(13) error: buffer overflow 'priv->mac_addr' 6 <= 6
Signed-off-by: Dan Carpenter <error27@gmail.com>

The ARM kernel supports writethrough data cache via the
CONFIG_CPU_DCACHE_WRITETHROUGH option.  However, that
functionality wasn't implemented in the arch/arm/boot/compressed
code.  It is now necessary due to a new ARM926EJS processor
that has an issue with writeback data cache.
Signed-off-by: Mark A. Greer <mgreer@mvista.com>

On TI's DA830/OMAP-L137, DA850/OMAP-L138 and DM365, after
setting the 4BITECC_ADD_CALC_START bit in the NAND Flash
control register to 1 and before waiting for the NAND Flash
status register to be equal to 1, 2 or 3, we have to wait
till the ECC HW goes to correction state. Without this wait,
ECC correction calculations will not be proper.

This has been tested on DA830/OMAP-L137, DA850/OMAP-L138,
DM355 and DM365 EVMs.
Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
Acked-by: Sneha Narnakaje <nsnehaprabha@ti.com>
Acked-by: Kevin Hilman <khilman@deeprootsystems.com>

This patch implements memory accessor interface in the MTD
layer which enables the kernel to access flash data.

This patch adds two new members to the mtd_partition structure,
a function handler which will be called during setup of the
partition and an argument to be passed to this setup function.

Example:
+static struct mtd_partition spi_flash_partitions[] = {
+       [0] = {
+               .name       = "U-Boot",
+               .offset     = 0,
+               .size       = SZ_256K,
+               .mask_flags = MTD_WRITEABLE,
+       },
+       [1] = {
+               .name       = "U-Boot Environment",
+               .offset     = MTDPART_OFS_NXTBLK,
+               .size       = SZ_64K,
+               .mask_flags = MTD_WRITEABLE,
+       },
+       [2] = {
+               .name       = "Linux",
+               .offset     = MTDPART_OFS_NXTBLK,
+               .size       = SZ_7M,
+               .mask_flags = 0,
+       },
+       [3] = {
+               .name       = "MAC Address",
+               .offset     = MTDPART_OFS_NXTBLK,
+               .size       = SZ_64K,
+               .mask_flags = 0,
+               .setup      = davinci_get_mac_addr,
+               .context    = (void *)0,
+       },
+};

The davinci_get_mac_addr function reads the MAC address from
offset ZERO of last MTD partition.
Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
Acked-by: Kevin Hilman <khilman@deeprootsystems.com>
Cc: David Brownell <david-b@pacbell.net>
Cc: David Woodhouse <dwmw2@infradead.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>

Come out of i2c time out condition by following the
bus recovery procedure outlined in the i2c protocol v3 spec.
The kernel must be robust enough to gracefully recover
from i2c bus failure without having to reset the machine.
This is done by first NACKing the slave, pulsing the SCL
line 9 times and then sending the stop command.

This patch has been tested on a DM6446 and DM355
Signed-off-by: Philby John <pjohn@in.mvista.com>
Signed-off-by: Srinivasan, Nageswari <nageswari@ti.com>
Acked-by: Kevin Hilman <khilman@deeprootsystems.com>

Add cpufreq support for DaVinci I2C driver.
Tested on DA850/OMAP-L138 EVM. For the purpose of testing, the patches
which add cpufreq support [1] for this SoC are needed.

[1]http://linux.davincidsp.com/pipermail/davinci-linux-open-source/
2009-September/016118.html
Signed-off-by: Chaithrika U S <chaithrika@ti.com>
Acked-by: Kevin Hilman <khilman@deeprootsystems.com>

Add suspend and resume callbacks to DaVinci I2C driver.
This has been tested on DA850/OMAP-L138 EVM. The SoC specific
suspend-to-RAM support patch series [1] is needed to test this feature.

[1] http://linux.davincidsp.com/pipermail/davinci-linux-open-source/
2009-November/016958.html
Signed-off-by: Chaithrika U S <chaithrika@ti.com>
Acked-by: Kevin Hilman <khilman@deeprootsystems.com>

Add i2c reset control and clock divider calculation functions
which will be useful for power management features.
Signed-off-by: Chaithrika U S <chaithrika@ti.com>
Acked-by: Kevin Hilman <khilman@deeprootsystems.com>

Cleanup the DaVinci I2C driver. Remove MOD_REG_BIT macro.
Also use ioremap instead of IO_ADDRESS macro.
Signed-off-by: Chaithrika U S <chaithrika@ti.com>
Acked-by: Kevin Hilman <khilman@deeprootsystems.com>

This fixes Oops at kernel startup while "scanning" for TLV320AIC23IDx
addresses.

Additional fix from Sudhakar Rajashekhara: I think 'first byte set'
should come after the write because an I2C transaction is being
carried out before configuring the I2C mode register (which has bits
to configure Master, Start condition etc), which causes undefined
behavior.
Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
Signed-off-by: Alexander Vasiliev <alexvasiljev@gmail.com>
Signed-off-by: Brad Griffis <bgriffis@ti.com>
Signed-off-by: Dirk Behme <dirk.behme@gmail.com>
Acked-by: Kevin Hilman <khilman@deeprootsystems.com>

This patch fixes an issue where a DMA channel can erroneously process an
event generated by a previous transfer.  A failure case is where DMA is
being used for SPI transmit and receive channels on OMAP L138.  In this
case there is a single bit that controls all event generation from the
SPI peripheral.  Therefore it is possible that between when edma_stop()
has been called for the transmit channel on a previous transfer and
edma_start() is called for the transmit channel on a subsequent transfer,
that a transmit event has been generated.

The fix is to clear events in edma_start().  This prevents false events
from being processed when events are enabled for that channel.
Signed-off-by: Brian Niebuhr <bniebuhr@efjohnson.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>

The da8xx/omap-l1 boards refuse to build when CONFIG_DAVINCI_MUX is undefined
because arch/arm/mach-davinci/mux.c:da8xx_pinmux_setup() is not defined.

This patch fixes this issue. This is build tested with davinci_all_defconfig
and da8xx_omapl_defconfig and boot tested on DA830 EVM.
Reported-by: Shanmuga Sundaram Mahendran <shanmuga@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>

On da830, when the same timer is used for clocksource and clockevent,
the timer can be started before the clockevent is
registered/initialzed.  This creates a window where a timer
interrupt might fire before the clockevent handler has been
setup and causes a crash.

This patch moves the actual enable/start of the timer after
the clockevent has ben registered.
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>

Add basic driver for the MSP430 on the DM 365 EVM; it's used
only to report commands from an IR remote.  (This assumes the
same remote used with other DaVinci EVM boards.)
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>

* git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core-2.6: (62 commits)
  msi-laptop: depends on RFKILL
  msi-laptop: Detect 3G device exists by standard ec command
  msi-laptop: Add resume method for set the SCM load again
  msi-laptop: Support some MSI 3G netbook that is need load SCM
  msi-laptop: Add threeg sysfs file for support query 3G state by standard 66/62 ec command
  msi-laptop: Support standard ec 66/62 command on MSI notebook and nebook
  Driver core: create lock/unlock functions for struct device
  sysfs: fix for thinko with sysfs_bin_attr_init()
  sysfs: Kill unused sysfs_sb variable.
  sysfs: Pass super_block to sysfs_get_inode
  driver core: Use sysfs_rename_link in device_rename
  sysfs: Implement sysfs_rename_link
  sysfs: Pack sysfs_dirent more tightly.
  sysfs: Serialize updates to the vfs inode
  sysfs: windfarm: init sysfs attributes
  sysfs: Use sysfs_attr_init and sysfs_bin_attr_init on module dynamic attributes
  sysfs: Document sysfs_attr_init and sysfs_bin_attr_init
  sysfs: Use sysfs_attr_init and sysfs_bin_attr_init on dynamic attributes
  sysfs: Use one lockdep class per sysfs attribute.
  sysfs: Only take active references on attributes.
  ...

* git://git.kernel.org/pub/scm/linux/kernel/git/wim/linux-2.6-watchdog:
  [WATCHDOG] i6300esb.c: change platform_driver to pci_driver
  [WATCHDOG] i6300esb: fix unlock register with
  [WATCHDOG] drivers/watchdog/wdt.c:wdt_ioctl(): make `ident' non-static
  [WATCHDOG] change reboot_notifier to platform-shutdown method.
  [WATCHDOG] watchdog_info constify
  [WATCHDOG] gef_wdt: Author corrections following split of GE Fanuc joint venture
  [WATCHDOG] iTCO_wdt: clean up probe(), modify err msg
  [WATCHDOG] ep93xx: watchdog timer driver for TS-72xx SBCs cleanup
  [WATCHDOG] support for max63xx watchdog timer chips
  [WATCHDOG] ep93xx: added platform side support for TS-72xx WDT driver
  [WATCHDOG] ep93xx: implemented watchdog timer driver for TS-72xx SBCs