- 08 Dec, 2009 16 commits
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Sekhar Nori authored
This patch modifies clock dump to take care of clock tress rooted at multiple oscillators. Current code assumes the entire tree is rooted on a single oscillator. When using off-chip clock synthesizers, some of the clocks can be obtained from a different on-board oscillator. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Sekhar Nori authored
Currently, the spinlock in DaVinci clock framework is being used to: 1) Protect clock structure variables usecount and rate against concurrent modification. 2) Protect against simultaneous PSC enables/disables ie. serialize davinci_psc_config(). 3) Serialize clk_set_rate(): i. Prevent simultaneous setting of clock rates ii. Ensure clock list remains sane during rate propagation (also in clk_set_parent). Remove the spinlock usage in clock framework by: 1) Making clock rate and usecount as atomic variables. 2) Making davinci_psc_config() protect itself instead of relying on serialization by caller. 3) (i) Allowing the clk->set_rate to serialize itself. There should be no need to serialize all clock rate settings. Currently the only user of rate setting is cpufreq driver on DA850. cpufreq naturally serializes the calls to set CPU rate. Also, there appears no need to lock IRQs during CPU rate transtitions. If required, IRQs can be locked in the actual set_rate function. 3) (ii) Use the mutex already in place for serialzing clock list manipulation for serializing clock rate propagation as well. Apart from the general benefit of reducing locking granurlarity, the main motivation behind this change is to enable usage of clock framework for off-chip clock synthesizers. One such synthesizer, CDCE949, is present on DM6467 EVM. Access to the synthesizer happens through I2C bus - accessing which can lead to CPU sleep. Having IRQs locked in clk_set_rate prevents the clk->set_rate function from sleeping. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Sekhar Nori authored
All DaVinci platforms include a DSP or co-processor for audio/video acceleration. While creating memory for the DSP/co-processor, system integrator can end up creating a hole in the memory map of the sort: <kernel memory> <hole (memory for DSP)> <kernel memory> This sort of configuration needs ARCH_HAS_HOLES_MEMORYMODEL enabled. See further details see this discussion on ARM linux mailing list: http://www.mail-archive.com/linux-omap@vger.kernel.org/msg15262.html The patch is boot tested on OMAP-L138, DM6446 and DM355 EVMs Signed-off-by: Sekhar Nori <nsekhar@ti.com> CC: Sriramakrishnan <srk@ti.com> CC: Khasim Syed Mohammed <khasim@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Sekhar Nori authored
DM6467T (T for Turbo) is a newer and faster DM6467 part from TI. The new part supports 1080p video and has the ARM running at 495MHz. More SoC information: http://focus.ti.com/docs/prod/folders/print/tms320dm6467t.html Spectrum Digital, Inc has a new EVM for this part. It is _mostly_ same as the older DM6467 EVM except for a 33MHz crystal input and THS8200 video encoder for 1080p support. The meat of this patch is dedicated to initializing the crystal frequency from EVM board file. Additional notes: I did consider some alternative ways to make the crystal input board specific including - (1) having board code initialize the crystal frequency using the first member of soc_info->cpu_clks array (2) introducing a new ref_clk_rate member in soc_info structure. But, the current way seems to be the simplest and least intruding considering that both the clock array and SoC info structure are actually private to the SoC file. Also the fact that davinci_common_init() initializes both the soc_info and clocks in one go. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Sekhar Nori authored
Currently all the #defines and static variables in the board-dm646x-evm.c file are located right at the start of the file because of which the related code is not together - making reading the code difficult. This patch moves around the code keeping related code together. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Sekhar Nori authored
Leave a comment explaining the constant value of 27Mhz used in include/mach/timex.h for all DaVinci platforms. Many of the platforms actually run at 24MHz timer frequency (Eg. EVMs of DM355, DM365 and OMAP-L1). The comment also serves as a porting alert. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Sekhar Nori authored
Create static map for internal SRAM and populate SRAM base and size in soc_info structure to allow SRAM allocation functions from arch/arm/mach-davinci/sram.c to work. On DA850 SRAM is used for suspend-to-RAM implementation in places where DDR2 cannot be accessed as its clocks are stopped. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Sekhar Nori authored
On omap-l1 devices the PLL registers can be locked from writes. Currently the cpufreq rate setting code unlocks PLL0 before the write actually happens. With suspend support getting added PLL1 registers need be be unlocked as well. To facilitate this, unlock both PLLs during the init time itself. This also obviates the need to unlock PLL registers for each CPUFreq transtition. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Sekhar Nori authored
When suspend is supported, both cpuidle and suspend code need to work on DDR2 registers. Instead of mapping the DDR2 registers twice, do it once outside of cpuidle driver and let cpuidle driver get the virtual base address of DDR2 registers. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Sekhar Nori authored
psc.h contains register defines for PSC module which need to be accessed in assembly code which helps the DA850/OMAP-L138 SoC go to sleep. Shutting down DDR clock using PSC is a part of the sleep procedure. Also, the PLL related hardware definitions in clock.h are needed in assembly code to bypass the DDR2 PLL. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Sekhar Nori authored
The motivation behind the change is to use the same definitions in the assembly code responsible for suspending the SoC, a part of which is to clock gate the DDR2 clock. Note that the assembly code cannot invoke the C function meant for this. The main reason being that stack in DDR2 cannot be accessed while DDR2 clock is being clock gated. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Sekhar Nori authored
Move defintions of DDR2 controller registers to memory.h from cpuidle.c. The motivation behind the change is to be able to use these defintions in assembly code that puts DDR2 in self-refresh and enables the SoC to enter suspend state. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Sekhar Nori authored
As suspend support is added, the code supporting the suspend operation needs to bypass PLLs and needs to access the same wait time values as the PLL code in clock.c. To facilitate this, move the PLL wait times to clock.h where they can be accessed by suspend code. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Sekhar Nori authored
OMAP-L138 adds a second SYSCFG region having useful functionality like deep sleep, pull up/down control and SATA clock stop. This patch makes provision for accessing registers from second SYSCFG region in da8xx code. Note that OMAP-L137 has a single SYSCFG region. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Sekhar Nori authored
On da850, RTC alarm is a wakeup source from deep sleep. Mark it as a wakeup source after the rtc platform device is registered. Without this patch, the rtc-omap driver suspends the RTC during the suspend sequence and hence it cannot wakeup the SoC. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Sekhar Nori authored
There is nothing special to be done for interrupts which can wakeup the device from sleep on CP-INTC, but not having a set_wake implemented prevents use of common drivers which expect this function to be implemented for all wakeup interrupt sources. This patch fixes the issue encountered when using the omap-rtc driver on DA850. On DA850 the RTC alarm interrupt is used to wake up the SoC from deep sleep mode. Without this patch, the disable_irq_wake throws an unbalanced wake disable warning while resuming because the previous enable call fails for lack of set_wake implementation. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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- 07 Dec, 2009 24 commits
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Andrey Porodko authored
The Neuros OSD 2.0 is the hardware component of the Neuros Open Internet Television Platform. Hardware is very close to Ti DM644X-EVM board. It has: DM6446M02 module with 256MB NAND, 256MB RAM, TLV320AIC32 AIC, USB, Ethernet, SD/MMC, UART, THS8200, TVP7000 for video. Additionaly realtime clock, IR remote control receiver, IR Blaster based on MSP430 (firmware although is different from used in DM644X-EVM), internal ATA-6 3.5” HDD drive with PATA interface, two muxed red-green leds. For more information please refer to http://wiki.neurostechnology.com/index.php/OSD_2.0_HDSigned-off-by: Andrey Porodko <panda@chelcom.ru> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Sekhar Nori authored
This patch fixes the following warning: arch/arm/mach-davinci/board-sffsdr.c:99: warning: 'sffsdr_emac_pdata' defined but not used Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Sekhar Nori authored
A section mismatch is reported for gpio_led_platform_data as it is referenced by a non annotated function (evm_led_setup) This patch fixes the issue by converting the __initconst to const as is the case in arch/arm/mach-davinci/board-dm644x-evm.c file. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Miguel Aguilar authored
The general structures are defined at DM365 SoC file and the specific platform data structure for the EVM is defined at board file. Signed-off-by: Miguel Aguilar <miguel.aguilar@ridgerun.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Chaithrika U S authored
Include high speed capabilities in MMC/SD platform data for DA830/OMAP-L137 and DA850/OMAP-L138 EVMs. Signed-off-by: Chaithrika U S <chaithrika@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Sekhar Nori authored
Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Sekhar Nori authored
Using a device_initcall() for initializing the voltage regulator on DA850 is not such a good idea because it gets called for all platforms - even those who do not have a regulator implemented. This leads to a big fat warning message during boot-up when regulator cannot be found. Instead, tie initialization of voltage regulator to cpufreq init. Define a platform specific init call which in case of DA850 gets used for initializing the regulator. On other future platforms it can be used for other purposes. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Sekhar Nori authored
Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Sekhar Nori authored
This patch provides a function to help register cpuidle driver on da8xx/omap-l1xx platforms. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Sekhar Nori authored
The patch adds support for DaVinci cpu idle driver. Two idle states are defined: 1. Wait for interrupt 2. Wait for interrupt and DDR self-refresh (or power down) Some DaVinci SoCs support putting DDR in self-refresh (eg Dm644x, DM6467) while others support putting DDR in self-refresh and power down (eg DM35x, DA8xx). Putting DDR (or mDDR) in power down saves more power than self-refresh. The patch has been tested on DA850/OMAP-L138 EVM. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Sudhakar Rajashekhara authored
When kernel is built with CONFIG_DEBUG_SECTION_MISMATCH=y option, using da8xx_omapl_defconfig, some warnings are observed: WARNING: vmlinux.o(.text+0xc2a4): Section mismatch in reference from the function da850_evm_setup_nor_nand() to the variable .init.data:da850_nand_pins The function da850_evm_setup_nor_nand() references the variable __initdata da850_nand_pins. This is often because da850_evm_setup_nor_nand lacks a __initdata annotation or the annotation of da850_nand_pins is wrong. This patch fixes such warnings. Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Sudhakar Rajashekhara authored
Eliminate the static function declaration by rearranging data in da850/omap-l138 board file. Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Sekhar Nori authored
There are multiple steps in configuring the EMAC to MII or RMII mode. Current code implements them using multiple checks. Consolidate the multiple checks into a single if construct. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Sekhar Nori authored
Get rid of DA850_UI_EXP config option since it is not used anywhere else in code. Instead make the UI expander choice menu dependent on the EVM selection itself. Also add help text indicating that UI board is actually detected automatically. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Sekhar Nori authored
Implement autodetection of RMII PHY by shifting the decision to use the RMII PHY to da850_evm_ui_expander_setup() from da850_evm_init() earlier. Without this patch, selecting RMII PHY in the UI expander menu will make the MII PHY unusable even though UI board is not connected. The actual configuration and registration of the EMAC device is delayed to device_initcall() so it happens after the UI card detection is complete. A side effect of this patch is the removal of a voilation of Documentation/SubmittingPatches section 2.2 in function da850_evm_init() Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Sekhar Nori authored
On the DA830, AEMIF and MMC/SD pins are shared. On the EVM, when the mux_mode signal is low MMC/SD works and when mux_mode signal is high, NAND works. When MMC/SD driver is configured in the kernel, do not let NAND get registered and drive mux_mode high. Instead, print a warning for user to understand why the platform device for NAND did not get registered. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Sekhar Nori authored
This patch supports runtime detection of DA830 UI card and eliminates the need for DA830_UI config option. Successful probe of GPIO expander present on the UI card is used to detect its presence. For this reason, GPIO_PCF857X is auto- selected when DA830 EVM is configured. In case the UI card is absent, the probe fails in reasonable time. As a side effect this patch also gets rid of the voilation of Documentation/SubmittingPatches section 2.2 in function da830_evm_ui_expander_setup() Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Sekhar Nori authored
Remove ifdefs inside da830_evm_init function since they are discouraged in Documentation/SubmittingPatches section 2.2 Use the method outlined in that document for fixing it. Tested on DA830 EVM. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Sekhar Nori authored
This patch fixes the following warning seen when building with default config: arch/arm/mach-davinci/board-da830-evm.c:371: warning: 'da830_evm_devices' defined but not used Tested on DA830 EVM with and without CONFIG_DA830_UI_NAND enabled. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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David A. Griego authored
Add support for NAND flash parts on the DA830/OMAP-L137 EVM User Interface board. This includes overriding the default bad block tables used by the davinci_nand driver. Signed-off-by: David A. Griego <dgriego@mvista.com> Signed-off-by: Mark A. Greer <mgreer@mvista.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Sergei Shtylyov authored
Properly set up the OTG mode thru the CFGCHIP2 register, enable the USB0_DRVVBUS pin, and finally register the MUSB platform device. Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Sergei Shtylyov authored
Add the function to register the MUSB platform device. Additional compile warning fixes by Sekhar Nori. Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Sergei Shtylyov authored
Rename setup_usb() into davinci_setup_usb(). While at it: - move its declaration from <mach/common.h> to more fitting <mach/usb.h>; - teach it to handle values of the 'mA' parameter greater than 510 and thus pass 1000 instead of 500 for the power switches capable of sourcing over 1 A; - teach it to handle odd values of the 'potpgt_ms' parameter... Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Miguel Aguilar authored
The general structures are defined at DM365 SoC file and the specific platform data structure for the EVM is defined at board file. Signed-off-by: Miguel Aguilar <miguel.aguilar@ridgerun.com>
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