- 04 Dec, 2006 3 commits
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Alan authored
Switch to pci_get_bus_and_slot because some x86 systems seem to be handing us a device with dev->bus = NULL. Also don't apply the isa fixup to revision C6 and later of the chip. Really we need to work out wtf is handing us pdev->bus = NULL, but firstly and more importantly we need the drivers working. Signed-off-by: Alan Cox <alan@redhat.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
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Alan authored
Signed-off-by: Alan Cox <alan@redhat.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
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Alan authored
Signed-off-by: Alan Cox <alan@redhat.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
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- 03 Dec, 2006 17 commits
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Mikael Pettersson authored
This patch adds code to fix up the PHYMODE4 "align timing" register value on second-generation Promise SATA chips. Failure to correct this value on non-x86 machines makes drive detection prone to failure due to timeouts. (I've observed about 50% detection failure rates on SPARC64.) The HW boots with a bad value in this register, but on x86 machines the Promise BIOS corrects it to the value recommended by the manual, so most people have been unaffected by this issue. After developing the patch I checked Promise's SATAII driver, and discovered that it also corrects PHYMODE4 just like this patch does. This patch depends on the sata_promise SATAII updates patch I sent recently. Signed-off-by: Mikael Pettersson <mikpe@it.uu.se> Signed-off-by: Jeff Garzik <jeff@garzik.org>
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Tejun Heo authored
libata switched to IRQ-driven IDENTIFY when IRQ-driven PIO was introduced. This has caused a lot of problems including device misdetection and phantom device. ATA_FLAG_DETECT_POLLING was added recently to selectively use polling IDENTIFY on problemetic drivers but many controllers and devices are affected by this problem and trying to adding ATA_FLAG_DETECT_POLLING for each such case is diffcult and not very rewarding. This patch makes libata always use polling IDENTIFY. This is consistent with libata's original behavior and drivers/ide's behavior. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
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Jeff Garzik authored
Noticed by Tejun and others. Signed-off-by: Jeff Garzik <jeff@garzik.org>
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Tejun Heo authored
ahci_init_controller() calls ahci_deinit_port() to make sure the controller is stopped before initializing the controller. In turn, ahci_deinit_port() invokes ahci_power_down() to power down the port. If the controller supports slumber mode, the link is put into it. Unfortunately, some devices don't implement link powersaving mode properly and show erratic behavior after link is put into slumber mode. For example, HL-DT-ST DVD-RAM GSA-H30N completely locks up on slumber transition and can only be recovered with the *REAL* hard reset - power removal and reapply. Note that this makes the first probing reset different from all others. If the above dvd-ram is hotplugged after ahci is initialized, no problem occurs because ahci is already fully initialized with phy powered up. So, this might also be the reason for other weird AHCI initial probing abnormalities. This patch moves power up/down out of port init/deinit and call them only when needed. Power down is now called only when suspending. As system suspend usually involves powering down 12v for storage devices, this shouldn't cause problem even if the attached device doesn't support slumber mode. However, in partial power management and suspend failure cases, devices might lock up after suspend attempt. I thought about removing transition to slumber mode altogether but ahci spec mandates it before HBA D3 state transition. Blacklisting such devices might be the solution. Signed-off-by: Tejun Heo <htejun@gmail.com>
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Tejun Heo authored
Make ata_sg_clean() global and don't allow NCQ for internal commands. Signed-off-by: Tejun Heo <htejun@gmail.com>
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Tejun Heo authored
Separate out rw ATA taskfile building from ata_scsi_rw_xlat() into ata_build_rw_tf(). This will be used to improve media error handling. Signed-off-by: Tejun Heo <htejun@gmail.com>
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Tejun Heo authored
Sg'ify ata_exec_internal() and call it ata_exec_internal_sg(). Wrapper function around ata_exec_internal_sg() is implemented to provide ata_exec_internal() interface. Signed-off-by: Tejun Heo <htejun@gmail.com>
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Tejun Heo authored
Now that BMDMA status is recorded in irq handler. ata_bmdma_freeze() is free to manipulate host status. Under certain circumstances, some controllers (ICH7 in enhanced mode w/ IRQ shared) raise IRQ when CTL register is written to and ATA_NIEN doesn't mask it. This patch makes ata_bmdma_freeze() clear all pending IRQs after freezing a port. This change makes explicit clearing in ata_device_add() unnecessary and thus kills it. The removed code was SFF-specific and was in the wrong place. Note that ->freeze() handler is always called under ap->lock held and irq disabled. Even if CTL manipulation causes stuck IRQ, it's cleared immediately. This should be safe (enough) even in SMP environment. More correct solution is to mask the IRQ from IRQ controller but that would be an overkill. Signed-off-by: Tejun Heo <htejun@gmail.com>
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Tejun Heo authored
For certain errors, interrupt handler alter BMDMA host status before entering EH (clears active and intr). Thus altered BMDMA host status value is recorded by BMDMA EH and reported to user. Move BMDMA host status recording from EH to interrupt handler. Signed-off-by: Tejun Heo <htejun@gmail.com>
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Tejun Heo authored
ata_scsi_dev_rescan() doesn't synchronize against SCSI device detach and the target sdev might go away in the middle. Fix it. Signed-off-by: Tejun Heo <htejun@gmail.com>
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Tejun Heo authored
If EH command is issued to a frozen port, it fails with AC_ERR_SYSTEM. libata used to request sense even when the port is frozen needlessly adding AC_ERR_SYSTEM to err_mask. Don't do it. Signed-off-by: Tejun Heo <htejun@gmail.com>
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Tejun Heo authored
* READ CAPACITY (16) implementation fixed. Result was shifted by two bytes. Carlos Pardo spotted this problem and submitted preliminary patch. Capacity => 2TB is handled correctly now. (verifid w/ fake capacity) * Use dev->n_sectors instead of re-reading directly from ID data. * Define and use ATA_SCSI_RBUF_SET() which considers rbuf length. This should be done for all simulation functions. Userland can issue any simulated command with arbitrary buffer length. Signed-off-by: Tejun Heo <htejun@gmail.com> Cc: Carlos Pardo <Carlos.Pardo@siliconimage.com>
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Tejun Heo authored
This patch implements ATA_FLAG_SETXFER_POLLING and use in pata_via. If this flag is set, transfer mode setting performed by polling not by interrupt. This should help those controllers which raise interrupt before the command is actually complete on SETXFER. Rationale for this approach. * uses existing facility and relatively simple * no busy sleep in the interrupt handler * updating drivers is easy While at it, kill now unused flag ATA_FLAG_SRST in pata_via. Signed-off-by: Tejun Heo <htejun@gmail.com>
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Tejun Heo authored
There are machines out there which share legacy PCI IDE IRQs w/ other devices. libata SFF interrupt/HSM code is ready for shared IRQ and has been setting IRQF_SHARED for devices in native PCI mode. Device in legacy mode is still a PCI device and thus supposedly uses active-low level triggered IRQ. Machines with such setup should be quite rare and w/o this flag libata is likely to fail loading and render the system unuseable. Also, IDE driver has been setting IRQF_SHARED for devices in legacy mode for a looooong time. Signed-off-by: Tejun Heo <htejun@gmail.com>
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Tejun Heo authored
HSM_ST_UNKNOWN is not used anywhere. Its value is zero and supposed to serve sanity check purpose but HSM_ST_IDLE is used for that purpose. This unused state causes confusion. After a port is initialized but before the first command is executed, the idle hsm state is UNKNOWN. However, once a command has completed, the idle hsm state is IDLE. This defeats sanity check in ata_pio_task() for the first command. This patch removes HSM_ST_UNKNOWN and consequently make HSM_ST_IDLE the default state. Signed-off-by: Tejun Heo <htejun@gmail.com>
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Tejun Heo authored
sht->max_sectors is overrided unconditionally in ->slave_configure. There's no reason to set it to any value. Signed-off-by: Tejun Heo <htejun@gmail.com>
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Tejun Heo authored
Add missing sht->slave_destroy. Most drivers received this fix in didn't. Fix those four drives. Signed-off-by: Tejun Heo <htejun@gmail.com>
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- 02 Dec, 2006 20 commits
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Tejun Heo authored
Print cdb[0] in failed qc report. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
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Robert Hancock authored
The attached patch against 2.6.19-rc6-mm1 fixes some problems in sata_nv with ATAPI devices on controllers running in ADMA mode. Some of the logic in the nv_adma_bmdma_* functions was inverted causing a bunch of warnings and caused those functions not to work properly. Also, when an ATAPI device is connected, we need to use the legacy DMA engine. The code now disables the PCI configuration register bits for ADMA so that this works, and ensures that no ATAPI DMA commands go through until this is done. Fixes Bugzilla http://bugzilla.kernel.org/show_bug.cgi?id=7538Signed-off-by: Robert Hancock <hancockr@shaw.ca> Signed-off-by: Jeff Garzik <jeff@garzik.org>
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Alan authored
Correct and complete the Marvell PATA cable detection logic. From: Arnaud Patard <apatard@mandriva.com> Signed-off-by: Arnaud Patard <apatard@mandriva.com> Signed-off-by: Alan Cox <alan@redhat.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
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Alan authored
Again split the chipset init away and call it both on resume and on setup Signed-off-by: Alan Cox <alan@redhat.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
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Alan authored
Signed-off-by: Alan Cox <alan@redhat.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
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Alan authored
Another chipset which needs some reconfiguration after a resume. All the chip setup is moved to a new function called in both setup and resume. Signed-off-by: Alan Cox <alan@redhat.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
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Alan authored
The major VIA issues were handled by the quirks update for resume quirks. The ATA driver also has to do some work however when resuming from RAM. Certain chips need the FIFO reconfiguring, and the 66MHz clock setup updating. Signed-off-by: Alan Cox <alan@redhat.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
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Alan authored
Early AMD chips require FIFO and/or simplex flag clearing work on resume from RAM. Most devices need no help Signed-off-by: Alan Cox <alan@redhat.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
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Alan authored
If you are using the noraid option then after a suspend/resume sequence we need to reset the card back out of raid mode again. Signed-off-by: Alan Cox <alan@redhat.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
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Alan authored
The Serverworks chips need various fixups doing on a resume from RAM. Conveniently the needed functions were already split out ready for re-use Signed-off-by: Alan Cox <alan@redhat.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
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Alan authored
On a resume of the CMD64x we must restore MRDMODE and latency if the BIOS didn't get them right originally. Signed-off-by: Alan Cox <alan@redhat.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
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Alan authored
The CS5520 doesn't need much help to resume but we do need to restore pcicfg which may have been reset to the BIOS default which is sometimes incorrect. Signed-off-by: Alan Cox <alan@redhat.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
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Alan authored
This patch adds the suspend/resume callbacks for drivers which don't need any additional help (beyond the pci resume quirk patch I posted earlier anyway). Also bring version numbers back inline with master copies. Signed-off-by: Alan Cox <alan@redhat.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
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Alan authored
The SI680 can come back from s2ram with the clocks disabled (crash time) or wrong (ugly as this can cause CRC errors, and in theory corruption). On a resume we must put the clock back. Signed-off-by: Alan Cox <alan@redhat.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
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Alan authored
The RZ1000 is a generic device except that it has a readahead fifo flaw that corrupts. We force this off at init time but we want to be paranoid and force it off at resume as well. I don't know of any actual hardware that supports both RZ1000 and suspend to RAM but given its a disk muncher better safe than sorry. Signed-off-by: Alan Cox <alan@redhat.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
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Alan authored
Various chipset functions must be reprogrammed on a resume from RAM, without this things like ATAPI DMA stop working on resume with some chipset variants. Split the chipset programming and init time method selection into two functions. Signed-off-by: Alan Cox <alan@redhat.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
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Alan authored
This (and the pci resume quirk code) get the JMicron controllers to resume properly. Without this patch the drive mapping changes when you suspend/resume which is not good at all.... Signed-off-by: Alan Cox <alan@redhat.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
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Alan authored
The 5530 needs various set up performing both at init time and resume time. To keep the code clean the common setup code is moved into a new function and called from both handlers. Signed-off-by: Alan Cox <alan@redhat.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
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Alan authored
More enablebits Signed-off-by: Alan Cox <alan@redhat.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
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Mikael Pettersson authored
This patch updates the sata_promise driver as follows: - Correct typo in definition of PDC_TBG_MODE: it's at 0x41C not 0x41 in first-generation chips. This error caused PCI access alignment exceptions on SPARC64, and on all platforms it disabled the expected initialisation of TBG mode. - Add flags field to struct pdc_host_priv. Define PDC_FLAG_GEN_II and use it to distinguish first- and second-generation chips. - Prevent the FLASH_CTL FIFO_SHD bit from being set to 1 on second- generation chips. This matches Promises' ulsata2 driver. - Prevent TBG mode and SLEW rate initialisation in second-generation chips. These two registers have moved, TBG mode has been redefined, and Promise's ulsata2 driver no longer attempts to initialise them. - Correct PCI device table so devices 0x3570, 0x3571, and 0x3d73 are marked as 2057x (2nd gen) not 2037x (1st gen). - Correct PCI device table so device 0x3d17 is marked as 40518 (2nd gen 4 ports) not 20319 (1st gen 4 ports). - Correct pdc_ata_init_one() to treat 20771 as a second-generation chip. Tested on 0x3d75 (2nd gen), 0x3d73 (2nd gen), and 0x3373 (1st gen) chips. The information comes from the newly uploaded Promise SATA HW specs, Promise's ultra and ulsata2 drivers, and debugging on 3d75/3d73/3373 chips. hp->hotplug_offset could now be removed and its value recomputed in pdc_host_init() using hp->flags, but that would be a cleanup not a functional change, so I'm ignoring it for now. Signed-off-by: Mikael Pettersson <mikpe@it.uu.se> Signed-off-by: Jeff Garzik <jeff@garzik.org>
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