- 05 Aug, 2008 25 commits
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Paul Walmsley authored
Add the omap3_core_dpll_m2_set_rate() function to the OMAP3 clock code, which calls into the SRAM function omap3_sram_configure_core_dpll() to change the CORE DPLL M2 divider. (SRAM code is necessary since rate changes on clocks upstream from the SDRC can glitch SDRAM accesses.) Use this function for the set_rate function pointer in the dpll3_m2_ck struct clk. With this function in place, PM/OPP code should be able to alter SDRAM speed via code similar to: clk_set_rate(&dpll3_m2_ck, target_rate). Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Paul Walmsley authored
3430ES2+ CORE DPLL M2 divider can divide by 1 to 31, unlike ES1, which was more limited. The SRAM code currently only supports dividing by 1 or 2, but we should mask off the full range of bits to guard against the event that the previous contents of CM_CLKSEL_PLL1 included an M2 divider > 2. Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Paul Walmsley authored
The only SRAM function currently used on OMAP3 is the CORE DPLL M2 divider reprogramming function; remove the rest of the stubs. Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Paul Walmsley authored
Add timing data for the Qimonda HYB18M512160AF-6 SDRAM chip, used on the OMAP3430SDP boards. Thanks to Rajendra Nayak <rnayak@ti.com> for his help identifying the chip used on 3430SDP. Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Paul Walmsley authored
Add timing data for the Micron MT46H32M32LF-6 SDRAM chip, used on the OMAP3 Beagle and EVM boards. Original timing data is from the Micron datasheet PDF downloaded from: http://download.micron.com/pdf/datasheets/dram/mobile/1gb_ddr_mobile_sdram_t48m.pdf Thanks to Rajendra Nayak <rnayak@ti.com> for his help identifying the chips used on Beagle & OMAP3EVM. Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Paul Walmsley authored
For a given SDRAM clock rate, SDRAM chips require memory controllers to use a specific set of timing minimums and maximums to transfer data reliably. These parameters can be different for different memory chips and can also potentially vary by board. This patch adds the infrastructure for board-*.c files to pass this timing data to the SDRAM controller init function. The timing data is specified in an 'omap_sdrc_params' structure, in terms of SDRC controller register values. An array of these structs, one per SDRC target clock rate, is passed by the board-*.c file to omap2_init_common_hw(). This patch does not define the values for different memory chips, nor does it use the values for anything; those will come in subsequent patches. Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Paul Walmsley authored
Separate SDRC code common to OMAP2/3 from mach-omap2/sdrc2xxx.c to mach-omap2/sdrc.c. Rename the OMAP2xxx-specific functions to use an 'omap2xxx' prefix rather than an 'omap2' prefix, and use "sdrc" in the function names rather than "memory." Mark several functions as static that should not be used outside the sdrc2xxx.c file. Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Paul Walmsley authored
Rename arch/arm/mach-omap2/memory.c to arch/arm/mach-omap2/sdrc2xxx.c, since it contains exclusively SDRAM-related functions. Most of the functions are also OMAP2xxx-specific - those which are common will be separated out in a following patch. Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Paul Walmsley authored
Move the contents of the arch/arm/mach-omap2/memory.h file to the existing include/asm-arm/arch-omap/sdrc.h file, and remove memory.h. Modify files which include memory.h to include asm/arch/sdrc.h instead. Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Paul Walmsley authored
Fix sparse issues with smartreflex.c. Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Paul Walmsley authored
This cleans up remaining sparse warnings for OMAP2 builds and fixes a few CodingStyle issues. This involves: - removing casts where they don't belong, - adding casts where they should be, - marking internal functions as static, - fixing some indentation in board-2430sdp-flash.c. Patch should cause no change in kernel behavior. Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Paul Walmsley authored
Mark casts between integers and pointers with __force to keep sparse from complaining. Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Paul Walmsley authored
Fix the following sparse warnings: arch/arm/mach-omap2/pm.c:58:6: warning: symbol 'omap2_block_sleep' was not declared. Should it be static? arch/arm/mach-omap2/pm.c:63:6: warning: symbol 'omap2_allow_sleep' was not declared. Should it be static? arch/arm/mach-omap2/pm.c:71:12: warning: symbol 'omap_pm_init' was not declared. Should it be static? arch/arm/mach-omap2/pm34xx.c:49:6: warning: symbol '_omap_sram_idle' was not declared. Should it be static? arch/arm/mach-omap2/prcm.c:96:5: warning: symbol 'cm_read_mod_reg' was not declared. Should it be static? arch/arm/mach-omap2/prcm.c:103:6: warning: symbol 'cm_write_mod_reg' was not declared. Should it be static? arch/arm/mach-omap2/prcm.c:110:5: warning: symbol 'cm_rmw_mod_reg_bits' was not declared. Should it be static? Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Dirk Behme authored
I2C2 at BeagleBoard is connected to expansion connector, i.e. unused if nothing is connected to this connector. As internal OMAP3 pull up resistors are not strong enough, enabled but unused I2C2 bus results in error messages (e.g. I2C timeouts). I2C2 should be enabled only if something is connected to I2C2 at board's expansion connector and this extension has additional pull up resistors for I2C2 bus. - Add configuration option for this - Use configuration option in board-omap3beagle - While being there, add OMAP3 to OMAP I2C help text Signed-off-by: Dirk Behme <dirk.behme@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Roman Tereshonkov authored
Signed-off-by: Roman Tereshonkov <roman.tereshonkov@nokia.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Roman Tereshonkov authored
Only once MODULE_ALIAS declaration is enough. Columns are counted from 0 to n_cols - 1. Signed-off-by: Roman Tereshonkov <roman.tereshonkov@nokia.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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steve@sakoman.com authored
Enable nand and jffs2 in defconfig Signed-off-by: Steve Sakoman <steve@sakoman.com> Signed-off-by: Dirk Behme <dirk.behme@gmail.com> Acked-by: Koen Kooi <koen at openembedded dot org> Signed-off-by: Tony Lindgren <tony@atomide.com>
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steve@sakoman.com authored
Add nand support to omap3beagle Signed-off-by: Steve Sakoman <steve@sakoman.com> Signed-off-by: Dirk Behme <dirk.behme@gmail.com> Acked-by: Koen Kooi <koen at openembedded dot org> Signed-off-by: Tony Lindgren <tony@atomide.com>
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teerth@ti.com authored
Dirk Behme <dirk.behme@gmail.com> Extend omap2 mtd nand driver to work with ARCH_OMAP3 boards Signed-off-by: Steve Sakoman <steve@sakoman.com> Signed-off-by: Dirk Behme <dirk.behme@gmail.com> Acked-by: Koen Kooi <koen at openembedded dot org> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Carlos Eduardo Aguiar authored
This patch removes a few errors and warnings reported by checkpatch.pl. Signed-off-by: Carlos Eduardo Aguiar <carlos.aguiar@indt.org.br> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Carlos Eduardo Aguiar authored
This patch moves menelaus register map to include/linux/i2c/menelaus.h Signed-off-by: Carlos Eduardo Aguiar <carlos.aguiar@indt.org.br> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Carlos Eduardo Aguiar authored
This patch moves menelaus header from include/asm-arm/arch-omap/ to include/linux/i2c/ It also includes menelaus' headers to include/linux/i2c Signed-off-by: Carlos Eduardo Aguiar <carlos.aguiar@indt.org.br> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Carlos Eduardo Aguiar authored
This patch makes drivers/i2c/chips/menelaus.c file to use macros instead of some constant magic numbers. Signed-off-by: Carlos Eduardo Aguiar <carlos.aguiar@indt.org.br> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Paul Walmsley authored
Several functions use old-style function documentation; convert those to use the current kerneldoc style. Thanks to Felipe Balbi <felipe.balbi@nokia.com> for catching an error. Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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David Brownell authored
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Acked-by: Koen Kooi <koen@openembedded.org> Update and fix Beagle LED declarations: gpios for USR0 and USR1 were swapped, and their names don't match docs or silksreen. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Tony Lindgren <tony@atomide.com>
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- 04 Aug, 2008 15 commits
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Riku Voipio authored
n800 and n810 have different peripherals on the second i2c bus (tea5761 on n800 and lm8323 on n810). Split the i2c_board_info to common and hw specific to avoid probing nonexistent devices. Signed-off-by: Riku Voipio <riku.voipio@iki.fi> Acked-by: Felipe Balbi <felipe.balbi@nokia.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Viktor Rosendahl authored
req is an automatic variable and thus we cannot rely on it being initialized to zero (I am leaving the 0!= NULL discussion aside). Other functions test if this pointer is NULL, in order to determine whether it is a valid address or not. Signed-off-by: Viktor Rosendahl <viktor.rosendahl@nokia.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Nishant Kamat authored
This patch fixes the omap2 nand driver code that allows reading of partition data from board info. The parse_mtd_partitions() function no longer returns a negative error in case cmdline is not passed. See commit: b0d06afbSigned-off-by: Nishant Kamat <nskamat@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Paul Walmsley authored
Mask/clear TWL module IMRs/ISRs by iterating through arrays rather than using a block of cut-and-pasted commands. Removes 1056 bytes of bloat. Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Paul Walmsley authored
twl_init_irq() uses a bunch of magic numbers as register indices; this has already led to several errors, fixed earlier in this patch series. Now use descriptive macros instead of magic numbers. This patch should not change kernel behavior. Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Paul Walmsley authored
twl_init_irq() uses "magic numbers" to access TWL module IMR and ISR registers. Symbolic constants are definitely preferred. Rather than duplicating already existing symbolic constants in twl4030-gpio.c and twl4030-pwrirq.c, move the existing constants out into include files. This patch should not change kernel behavior. Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Paul Walmsley authored
twl_init_irq() prints error messages and returns if any interrupt mask register writes fail. Change this to generate a warning traceback and to continue execution rather than skipping TWL init. (These mask writes should not fail at all unless either the I2C bus or the TWL4030 is somehow wedged.) Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Paul Walmsley authored
TWL4030 interrupt status register bits can be cleared in one of two ways: either by reading from the register, or by writing a 1 to the appropriate bit(s) in the register. This behavior can be altered at any time by the <twlmodule>_SIH_CTRL.COR register bit ("clear-on-read"). The TWL4030 TRM is deeply confused as to whether COR=1 means that the registers are cleared on reads, or cleared on writes. Peter De Schrijver <peter.de-schrijver> confirms that COR=1 means that the registers are cleared on read. So, for each TWL4030 SIH, check the value of the *_SIH_CTRL.COR bit, and if it is 1, use reads to clear the ISRs; if it is 0, use writes. Also, use WARN_ON() to warn if the read/write failed, and don't skip the rest of the initialization on failure either. Thanks to Peter for his help with this patch. Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Paul Walmsley authored
twl_init_irq() does not clear MADC interrupt status registers upon init - fix. Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Paul Walmsley authored
The existing code to mask and clear BCI interrupts in twl_init_irq() is wrong. It uses the wrong register offsets, it does not mask all of the BCI IMR registers, and it does not clear all of the BCI ISR registers. Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Paul Walmsley authored
twl_init_irq() does not clear the TWL GPIO ISR registers, but the PIH ISR thinks that it has. This causes any previously-latched GPIO interrupts to be stuck on until twl4030-gpio.c initializes, often drowning the console in TWL4030 module irq 368 is disabled but can't be masked! messages. This seems to be a particular problem when booting on Beagle. Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Paul Walmsley authored
twl_irq_init() clears PWR interrupt status bits, then masks the interrupts off, then clears the PWR interrupt status bits again. The first clear seems unnecessary, so, remove it. Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Paul Walmsley authored
Skip compiling OMAP15xx I2C ISR for non-OMAP15xx builds. Saves 400 bytes of text for most OMAP builds. Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Paul Walmsley authored
Mark functions called only at init time as __init. Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Paul Walmsley authored
omap_i2c_idle() sets an internal flag, "dev->idle", instructing its ISR to decline interrupts. It sets this flag before it actually masks the interrupts on the I2C controller. This is problematic, since an I2C interrupt could arrive after dev->idle is set, but before the interrupt source is masked. When this happens, Linux disables the I2C controller's IRQ, causing all future transactions on the bus to fail. Symptoms, happening on about 7% of boots: irq 56: nobody cared (try booting with the "irqpoll" option) <warning traceback here> Disabling IRQ #56 i2c_omap i2c_omap.1: controller timed out In omap_i2c_idle(), this patch sets dev->idle only after the interrupt mask write to the I2C controller has left the ARM write buffer. That's probably the major offender. For additional prophylaxis, in omap_i2c_unidle(), the patch clears the dev->idle flag before interrupts are enabled, rather than afterwards. The patch has survived twenty-two reboots on the 3430SDP here without wedging I2C1. Not absolutely dispositive, but promising! Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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