- 06 Jan, 2006 40 commits
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Rafael J. Wysocki authored
This patch makes swsusp free only as much memory as needed to complete the suspend and not as much as possible. In the most of cases this should speed up the suspend and make the system much more responsive after resume, especially if a GUI (eg. X Windows) is used. If needed, the old behavior (ie to free as much memory as possible during suspend) can be restored by unsetting FAST_FREE in power.h Signed-off-by:
Rafael J. Wysocki <rjw@sisk.pl> Acked-by:
Pavel Machek <pavel@suse.cz> Signed-off-by:
Andrew Morton <akpm@osdl.org> Signed-off-by:
Linus Torvalds <torvalds@osdl.org>
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Rafael J. Wysocki authored
This patch introduces the swap map structure that can be used by swsusp for keeping tracks of data pages written to the swap. The structure itself is described in a comment within the patch. The overall idea is to reduce the amount of metadata written to the swap and to write and read the image pages sequentially, in a file-alike way. This makes the swap-handling part of swsusp fairly independent of its snapshot-handling part and will hopefully allow us to completely separate these two parts in the future. This patch is needed to remove the suspend image size limit imposed by the limited size of the swsusp_info structure, which is essential for x86-64 systems with more than 512 MB of RAM. Signed-off-by:
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Rafael J. Wysocki authored
This patch removes the image encryption that is only used by swsusp instead of zeroing the image after resume in order to prevent someone from reading some confidential data from it in the future and it does not protect the image from being read by an unauthorized person before resume. The functionality it provides should really belong to the user space and will possibly be reimplemented after the swap-handling functionality of swsusp is moved to the user space. Signed-off-by:
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Ivan Kokshaysky authored
Kconfig tweaks and tons of deletions. Signed-off-by:
Ivan Kokshaysky <ink@jurassic.park.msu.ru> Cc: Christoph Hellwig <hch@lst.de> Cc: Richard Henderson <rth@twiddle.net> Signed-off-by:
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Ivan Kokshaysky authored
Thanks to Christoph for doing most of the work. This allows automatic SMP IRQ affinity assignment other than default "all interrupts on all CPUs" which is rather expensive. This might be useful if the hardware can be programmed to distribute interrupts among different CPUs, like Alpha does. Signed-off-by:
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Shaohua Li authored
With physical CPU hotplug, the CPU is hot removed and it should not receive any interrupts. Disabling interrupt is much safer. This basically is what we do in ia64 & x86. Signed-off-by:
Shaohua Li <shaohua.li@intel.com> Cc: Andi Kleen <ak@muc.de> Signed-off-by:
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Ben Collins authored
Signed-off-by:
Ben Collins <bcollins@ubuntu.com> Signed-off-by:
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Vivek Goyal authored
o Currently, during kexec reboot, IOAPIC is re-programmed back to virtual wire mode if there was an i8259 connected to it. This enables getting timer interrupts in second kernel in legacy mode. o After putting into virtual wire mode, IOAPIC delivers the i8259 interrupts to CPU0. This works well for kexec but not for kdump as we might crash on a different CPU and second kernel will not see timer interrupts. o This patch modifies the redirection table entry to deliver the timer interrupts to the cpu we are rebooting (instead of hardcoding to zero). This ensures that second kernel receives timer interrupts even on a non-boot cpu. Signed-off-by:
Vivek Goyal <vgoyal@in.ibm.com> Cc: Andi Kleen <ak@muc.de> Cc: "Seth, Rohit" <rohit.seth@intel.com> Signed-off-by:
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Brian Gerst authored
GCC 4.1 gives the following warning: include/asm/mpspec.h:79: warning: `packed' attribute ignored for field of type `unsigned char' The packed attribute isn't really necessary anyways so just remove it. Signed-off-by:
Brian Gerst <bgerst@didntduck.org> Acked-by:
Dave Jones <davej@codemonkey.org.uk> Cc: Andi Kleen <ak@muc.de> Signed-off-by:
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Larry Finger authored
When we re-calibrate the frequency, it is likely that an interrupt (as for example the main system clock) will be triggered by the system. Therefore the calibration may not be accurate. This will also provide a fix to bug #5266. Many thanks to Larry Finger for helping resolving this issue. Signed-off-by:
Bruno Ducrot <ducrot@poupinou.org> Cc: john stultz <johnstul@us.ibm.com> Cc: Dave Jones <davej@codemonkey.org.uk> Signed-off-by:
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Jordan Crouse authored
- Fix screen blanking on BIOSes that return APM_NOT_ENGAGED when APM enabled screen blanking is not turned on. The original code only tried to set the state on device 0x100, and then 0x1FF, and I added 0x101 to the mix too. - Clean up logic in apm_console_blank(). - Prevent the error message from printing out twice. Cc: Jordan Crouse <jordan.crouse@amd.com> Cc: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by:
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Jordan Crouse authored
Add support to hw_random for the Geode LX HRNG device. Signed-off-by:
Jordan Crouse <jordan.crouse@amd.com> Cc: Alan Cox <alan@lxorguk.ukuu.org.uk> Cc: Jeff Garzik <jgarzik@pobox.com> Signed-off-by:
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Jordan Crouse authored
Provide basic support for the AMD Geode GX and LX processors. Signed-off-by:
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Daniel Marjamaki authored
Removed the unused variable "rv". Signed-off-by:
Daniel Marjamaki <daniel.marjamaki@comhem.se> Signed-off-by:
H. Peter Anvin <hpa@zytor.com> Signed-off-by:
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Daniel Marjamaki authored
Removed the unused variable "rv". Signed-off-by:
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Stephen Hemminger authored
There is a single instruction on i386 to find largest set bit; so it makes sense to use it (like we use bfs for ffs()). Signed-off-by:
Stephen Hemminger <shemminger@osdl.org> Signed-off-by:
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Dave Jones authored
Missing newline in printk. Signed-off-by:
Dave Jones <davej@redhat.com> Signed-off-by:
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Dave Jones authored
The 'make rodata read-only' patch in -mm exposes a latent bug in the 32-bit change_page_attr() function, which causes certain CPUs (Those with NX basically) to reboot instantly after pages are marked read-only. The same bug got fixed a while back on x86-64, but never got propagated to i386. Stuart Hayes from Dell also picked up on this last June, but it never got fixed, as the only thing affected by it aparently was the nvidia driver. Blatantly stealing description from his post.. "It doesn't appear to be fixed (in the i386 arch). The change_page_attr()/split_large_page() code will still still set all the 4K PTEs to PAGE_KERNEL (setting the _PAGE_NX bit) when a large page needs to be split. This wouldn't be a problem for the bulk of the kernel memory, but there are pages in the lower 4MB of memory that's free, and are part of large executable pages that also contain kernel code. If change_page_attr() is called on these, it will set the _PAGE_NX bit on the whole 2MB region that was covered by the large page, causing a large chunk of kernel code to be non-executable." Signed-off-by:
Arjan van de Ven <arjan@infradead.org> Signed-off-by:
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Ashok Raj authored
If we are using hotplug enabled kernel, then make bigsmp the default mode. Signed-off-by:
Ashok Raj <ashok.raj@intel.com> Signed-off-by:
Venkatesh Pallipadi <venkatesh.pallipadi@intel.com> Cc: Andi Kleen <ak@muc.de> Signed-off-by:
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Ashok Raj authored
When we bring up a new CPU via INIT/startup IPI messages, the CPU that's coming up sends a xTPR message to the chipset. Intel chipsets (at least) don't provide any architectural guarantee on what the chipset will do with this message. For example, the E850x chipsets uses this xTPR message to interpret the interrupt operating mode of the platform. When the CPU coming online sends this message, it always indicates that it is in logical flat mode. For the CPU hotplug case, the platform may already be functioning in cluster APIC mode at this time, the chipset can get confused and mishandle I/O device and IPI interrupt routing. The situation eventually gets corrected when the new CPU sends another xTPR update when we switch it to cluster mode, but there's a window during which the chipset may be in an inconsistent state. This patch avoids this problem by using the flat physical interrupt delivery mode instead of cluster mode for bigsmp (>8 cpu) support. Signed-off-by:
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Anton Blanchard authored
On architectures that implement sparsemem but not discontigmem we want to be able to hide the flatmem option in some cases. On ppc64 for example, when we select NUMA we must not select flatmem. Signed-off-by:
Anton Blanchard <anton@samba.org> Signed-off-by:
Andy Whitcroft <apw@shadowen.org> Signed-off-by:
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Andy Whitcroft authored
Allow SPARSEMEM to be enabled on non-numa x86 systems. This is made dependant on EXPERIMENTAL also being set. When an in-tree user (such as simulated numa) exists it should be made dependant on that. The plan is to have no options and no selector as normal when !EXPERIMENTAL. When EXPERIMENTAL we enable the FLATMEM and SPARSEMEM options for X86_PC whilst maintaining DISCONTIGMEM and SPARSEMEM for NUMA. Signed-off-by:
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Arjan van de Ven authored
Mark some key kernel datastructures readonly. This patch was previously posted on Jun 28th but was back then not merged because nothing was enforcing rodata anyway.. well that changed now :) Patch by Christoph Lameter <christoph@lameter.com> and Dave Jones <davej@redhat.com> Signed-off-by:
Ingo Molnar <mingo@elte.hu> Cc: Andi Kleen <ak@muc.de> Signed-off-by:
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Arjan van de Ven authored
x86-64 specific parts to make the .rodata section read only Signed-off-by:
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Arjan van de Ven authored
Bug fix required for the .rodata work on x86-64: when change_page_attr() and friends need to break up a 2Mb page into 4Kb pages, it always set the NX bit on the PMD, which causes the cpu to consider the entire 2Mb region to be NX regardless of the actual PTE perms. This is fine in general, with one big exception: the 2Mb page that covers the last part of the kernel .text! The fix is to not invent a new permission for the new PMD entry, but to just inherit the existing one minus the PSE bit. Signed-off-by:
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Arjan van de Ven authored
x86 specific parts to make the .rodata section read only Signed-off-by:
Adrian Bunk <bunk@stusta.de> Cc: Andi Kleen <ak@muc.de> Signed-off-by:
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Arjan van de Ven authored
Generic prep-work for marking the .rodata section readonly: * Align the rodata section at 4Kb boundary * call the mark_rodata_ro() function when available Signed-off-by:
Jesper Juhl <jesper.juhl@gmail.com> Signed-off-by:
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David Howells authored
Make i386's find_first_bit() use an unsigned integer as a counter to avoid getting warnings when -Wsign-compare is given. Signed-Off-By:
David Howells <dhowells@redhat.com> Signed-off-by:
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Zachary Amsden authored
Remove the "temporary debugging check" which has managed to live for quite some time, and is clearly unneeded. The mm can never be live at this point, so clearly checking the LDT in the mm->context is redundant as well. Signed-off-by:
Zachary Amsden <zach@vmware.com> Cc: "Seth, Rohit" <rohit.seth@intel.com> Cc: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by:
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Zachary Amsden authored
APM BIOS code has a protective wrapper that runs it only on CPU zero. Thus, no need to set APM BIOS segments in the GDT for other CPUs. Signed-off-by:
"Seth, Rohit" <rohit.seth@intel.com> Cc: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by:
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Zachary Amsden authored
Stop deleting NT bit from EFLAGS. See arch/i386/kernel/head.S line 223, which does something even better. Signed-off-by:
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Zachary Amsden authored
PnP BIOS data, code, and 32-bit entry segments all have fixed limits as well; set them in the GDT rather than adding more code. It would be nice to add these fixups to the boot GDT rather than setting the GDT for each CPU; perhaps I can wiggle this in later, but getting it in before the subsys init looks tricky. Also, make some progress on deprecating the ugly Q_SET_SEL macros. Signed-off-by:
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Zachary Amsden authored
The one remaining caller of set_limit, the PnP BIOS code, calls into the PnP BIOS, passing kernel parameters in and out. These parameteres may be passed from arbitrary kernel virtual memory, so they deserve strict protection to stop a bad BIOS from smashing beyond the object size. Unfortunately, the use of set_limit was badly botching this by setting the limit in terms of pages, when it really should have byte granularity. When doing this, I discovered my BIOS had the buggy code during the "get system device node" call: mov ax, es:[bx] Which is harmless, but has a trivial workaround. Signed-off-by:
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Zachary Amsden authored
Old accessors to fetch LDT descriptors are unused and outdated and in the wrong header file. Signed-off-by:
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Zachary Amsden authored
Since APM BIOS segment limits are now fixed, set them in head.S GDT and don't use the complicated _set_limit() macro expansion. Signed-off-by:
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Zachary Amsden authored
APM BIOSes have many bugs regarding proper representation of the appropriate segment limits for calling the BIOS. By default, APM_RELAX_SEGMENTS is always turned on to support running the APM BIOS on these buggy machines. Keeping 64k limits poses very little danger to the kernel, because the pages where the APM BIOS is located will always be in low physical memory BIOS areas, which should already be marked reserved, and only buggy BIOSes would possibly overstep the segment bounds with writes to data anyway. Since forcing stricter limits breaks many machines and is not default behavior, it seems reasonable to deprecate the older code which may cause APM BIOS to fault. If you really have a badly enough broken APM BIOS that you have to turn off APM_RELAX_SEGMENTS, seems like the best recourse here would be to disable the APM BIOS and / or not compile it into your kernel to begin with, and / or add your system to the known bad list. The reason I want to deprecate this code is there is underlying brokenness with the set_limit macros, and getting rid of many of the call sites rather than rewriting them seems to be the simplest and most correct course of action. Signed-off-by:
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Zachary Amsden authored
Move PnP BIOS segment definitions into segment.h; the segments are reserved here, so they might as well be defined here as well. Note I didn't do this for APM BIOS, as Macintosh and other systems use those values to emulate APM in some scary way I don't want to understand. Signed-off-by:
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Zachary Amsden authored
So some 486 processors do have CR4 register. Allow them to present it in register dumps by using the old fault technique rather than testing processor family. Thanks to Maciej for noticing this. Signed-off-by:
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Jan Beulich authored
Other than apparently commonly assumed, the bound instruction does not require the corresponding IDT entry to have DPL 3. Acked-by:
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Jan Beulich authored
Move some code unrelated to any dealing with hardware bugs from i386's bugs.h to a more logical place. Signed-off-by:
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