- 10 Aug, 2007 38 commits
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Trilok Soni authored
From: Carlos Eduardo Aguiar <carlos.aguiar@indt.org.br> Remove unnecessary N800 PM board specific file - Remove unnecessary arch/arm/mach-omap2/board-n800-pm.c file, according with Trilok's early patch [1], that moves board-n800-pm.c code to board-n800.c [1] http://git.kernel.org/?p=linux/kernel/git/tmlind/linux-omap-2.6.git;a=commitdiff;h=0d6d581ffec0296f429a777187945943f2127e8fSigned-off-by:
Trilok Soni <soni.trilok@gmail.com> Signed-off-by:
Carlos Eduardo Aguiar <carlos.aguiar@indt.org.br> Remove unnecessary N800 PM board specific file Remove unnecessary arch/arm/mach-omap2/board-n800-pm.c file, according with Trilok's early patch, that moves board-n800-pm.c code to board-n800.c Signed-off-by:
Tony Lindgren <tony@atomide.com>
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Sakari Ailus authored
Put back references to lcd_apollon.o, lcd_2430sdp.o and lcd_mipid.o that were lost in merge to drivers/video/omap/Makefile. Signed-off-by:
Sakari Ailus <sakari.ailus@nokia.com> Signed-off-by:
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Paul Walmsley authored
omap2_followparent_recalc() just calls followparent_recalc(), so, get rid of omap2_followparent_recalc(). Signed-off-by:
Paul Walmsley <paul@pwsan.com> Signed-off-by:
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Paul Walmsley authored
mdm_osc_ck has a preinitialized rate and is marked as RATE_FIXED, but rather than using omap2_propagate_rate() as its recalc function, which accounts for RATE_FIXED clocks, it uses omap2_followparent_recalc(), which sets the rate to the parent clock's rate. After reviewing the 2430 TRM, fix this inconsistency by removing the fixed rate declarations (TRM says that this clock is 'typically' 26MHz). Signed-off-by:
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Paul Walmsley authored
The rates of some clocks are equal to their parents' rates, divided by some fixed integer. This contrasts with the existing 'followparent' clocks, which follow their parents' rates strictly; and the existing 'clksel' clocks, which follow their parents' rates divided by a runtime-selectable divisor. Add code to implement these clocks without resorting to specifying a fixed rate. Signed-off-by:
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Paul Walmsley authored
dpll_ck is not a clksel clock, and so it does not really fit well into omap2_clksel_recalc(). Split off its recalc code into its own function, omap2_dpll_recalc(). Signed-off-by:
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Paul Walmsley authored
Convert most of the magic numbers remaining in mach-omap2/clock.c to symbolic constants. Signed-off-by:
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Paul Walmsley authored
Convert omap2_get_clksel to use void __iomem *. Add omap2_divisor_to_clksel(), to convert clock divisors into appropriate register bit field values. Use non-shifted register bit field masks in clksel code, rather than masks that have been preshifted down to bit 0 -- this simplifies existing code and facilitates the use of symbolic constants from the recent PRCM cleanup. Also add code to properly handle divisors for sys_clkout2 on OMAP2420. Previously this clock's divisor settings were ignored. Signed-off-by:
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Paul Walmsley authored
Clean up omap2_clk_set_parent() by bailing out early if the clock is not parent-selectable. Signed-off-by:
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Paul Walmsley authored
If the clock framework can't figure out how to enable a clock, return -EINVAL to indicate that the clock cannot be enabled. Previously the code returned 0, which indicated success. Also fix the "clock.c: Enable for dpll_ck without enable code" boot warning by marking dpll_ck as ALWAYS_ENABLED. This is not technically true, since the DPLL can be bypassed; but since we currently have no software infrastructure to control it directly, ALWAYS_ENABLED is a sufficient fiction for dpll_ck. Signed-off-by:
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Paul Walmsley authored
omap2 clock.c contains two nearly identical wait-for-clock-enable routines. Consolidate them into one omap2_wait_clock_ready() function. Signed-off-by:
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Paul Walmsley authored
The clock framework currently uses a magic value in struct clk .enable_bit to indicate that the clock's parent controls enabling and disabling the clock. There's no need to use this type of in-band special value when there's already a good means to indicate binary clock parameters: the clock flags field. This patch converts the existing PARENT_CONTROLS_CLOCK code to use a clock flag. Signed-off-by:
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Paul Walmsley authored
vlynq_fck is a clksel clock. But omap2_clk_set_parent() is missing the code to divide its parent's rate down appropriately when vlynq_fck is set to use a core_ck parent. Signed-off-by:
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Paul Walmsley authored
Several clocks are marked as present on OMAP2430, even though they are 2420-only. Drop CLOCK_IN_OMAP243X from those clocks' flags. Signed-off-by:
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Paul Walmsley authored
Convert most of the magic numbers remaining in mach-omap2/clock.h to symbolic constants. This primarily affects the src_offset/rate_offset fields. Signed-off-by:
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Paul Walmsley authored
The clock framework contains two functions, omap2_dll_force_needed() and omap2_reprogram_sdrc(), which are SDRC code, not really clock code. So, move these functions to memory.c. Signed-off-by:
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Paul Walmsley authored
dss2_fck is not a fixed-rate clock; its rate is dependent on its parent's rate. So, drop the .rate assignment and drop the RATE_FIXED clock flag. It also is a leaf clock - no clocks have it as a parent - so it can't propagate its rate anywhere. So, drop the RATE_PROPAGATES and fix the recalc function pointer accordingly. Signed-off-by:
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Paul Walmsley authored
According to the 2420 TRM rev J, SLEEP_CLK doesn't have any registers or bits associated with it, so it's outside software control. It's also a leaf clock - no software-controllable clocks use it as a parent. There's nothing we can do with it in software. So, drop it. Signed-off-by:
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Paul Walmsley authored
Drop an unnecessary variable, valid_rate, in omap2_clk_round_rate(). Signed-off-by:
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Paul Walmsley authored
Clean up some CodingStyle non-conformances in clock.c. Signed-off-by:
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Paul Walmsley authored
vlynq_fck is a clksel clock, so its rate is equal to its parent's rate, divided by whichever divisor is selected. But its definition in clock.h specifies omap2_followparent_recalc() as its rate calculation code, which sets the clock's rate to that of its parent without accounting for any divisor. Fix to use omap2_clksel_recalc() instead. omap2_clksel_recalc() is also missing the appropriate special case to divide the vlynq_fck rate down; add this in. Signed-off-by:
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Paul Walmsley authored
For clksel clocks, omap2_clk_set_rate() incorrectly divides the parent clock's rate by the actual bits of the register field, rather than the translated divisor value. This happens to work for most clksel clocks, since the register bit fields are equal to the divisor values. But for some clocks, such as sys_clkout, the code gets the resulting rate wrong. Signed-off-by:
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Paul Walmsley authored
omap2_get_crystal_rate() calculates osc_ck and sys_ck rates incorrectly. osc_ck runs at the same rate as the external clock source. Also, sys_ck's rate derives from osc_ck's rate, divided (not multiplied) by PRCM_CLKSRC_CTRL:SYSCLKDIV. Signed-off-by:
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Paul Walmsley authored
Drop the RATE_CKCTL clock flag from iva1_mpu_int_ifck, gfx_ick, ssi_l4_ick, and dss_ick. These clocks are not source-selectable, which is the practical meaning of RATE_CKCTL in the 2420 clock framework. Signed-off-by:
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Kevin Hilman authored
There is not yet any driver for the secondary LCD, so turn off the backlight on boot. Signed-off-by:
Kevin Hilman <khilman@mvista.com> Signed-off-by:
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Kevin Hilman authored
This is not used outside twl4030, make it static. Signed-off-by:
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Syed Mohammed, Khasim authored
Patch to cleanup few spellings in TWL4030 Core and export TWLGPIO APIs Signed-off-by:
Syed Mohammed Khasim <x0khasim@ti.com> Signed-off-by:
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Kevin Hilman authored
Use competions instead of manually setting scheduler state. daemonize kernel thread and set PF_NOFREEZE. Signed-off-by:
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Hiroshi DOYU authored
Table Walking Logic(TWL) is supported in omap1. Signed-off-by:
Hiroshi DOYU <Hiroshi.DOYU@nokia.com> Signed-off-by:
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Hiroshi DOYU authored
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Hiroshi DOYU authored
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Hiroshi DOYU authored
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Hiroshi DOYU authored
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Hiroshi DOYU authored
This MULTIOPEN feature should always be enabled. Signed-off-by:
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Hiroshi DOYU authored
DSPGW specific part Signed-off-by:
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Hiroshi DOYU authored
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Tony Lindgren authored
As noted by Kyungmin Park, the divisor calculation has an unnecessary increase. Signed-off-by: -
Andrzej Zaborowski authored
This is a rework of the TSC2102 driver from linux-omap-2.6 taking TSC2101 into account with the goal of using only a single driver. Signed-off-by:
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- 09 Aug, 2007 1 commit
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Tony Lindgren authored
Set tusb host max VBUS to 100mA Signed-off-by:
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- 07 Aug, 2007 1 commit
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Tony Lindgren authored
At least tusb implements set_clock(), and in that case clk_disable() gets called twice. Do not call clk_disable() if set_clock() is implemented. Signed-off-by:
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