- 08 Jul, 2009 1 commit
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Hemant Pedanekar authored
This patch takes out IO mapping macros from mach/io.h and puts them in mach/hardware.h avoiding need to include mach/io.h in various files such as serial.h, vmalloc.h etc. The main reason to avoid inclusion of mach/io.h is, when default in/out macros are overridden by machine specific functions (e.g., in case of PCI I/O), they result into linker error. An example snippet and error snapshot is listed below. Following code in mach/io.h: #define inl(p) my_inl() static inline unsigned int my_inl(unsigned int addr) { if (IS_PCI_IO(addr)) return pci_inl (); else return le32_to_cpu(__raw_readl(__typesafe_io(addr))); } leads to error: LD arch/arm/boot/compressed/vmlinux arch/arm/boot/compressed/misc.o: In function `my_inl': misc.c:(.text+0x2744): undefined reference to `pci_inl' make[2]: *** [arch/arm/boot/compressed/vmlinux] Error 1 This is because mach/io.h gets included in arch/arm/boot/compressed/misc.c through mach/serial.h but pci.c file, which defines 'pci_inl' doesn't get built into compressed vmlinux. Signed-off-by:Hemant Pedanekar <hemantp@ti.com> Signed-off-by:
Kevin Hilman <khilman@deeprootsystems.com>
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- 07 Jul, 2009 1 commit
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Hemant Pedanekar authored
This patch adds clock data for IDE and also updates pin mux mask for ATA so as to disable PCI when ATA is selected. Signed-off-by:
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- 06 Jul, 2009 38 commits
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Kevin Hilman authored
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Kevin Hilman authored
Signed-off-by: -
Kevin Hilman authored
Conflicts: drivers/mmc/host/davinci_mmc.c drivers/usb/musb/davinci.c
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Kevin Hilman authored
Conflicts: arch/arm/configs/davinci_all_defconfig arch/arm/mach-davinci/board-dm365-evm.c
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Kevin Hilman authored
Conflicts: arch/arm/mach-davinci/Kconfig drivers/input/misc/Kconfig drivers/input/misc/Makefile drivers/net/davinci_emac.c
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Kevin Hilman authored
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Kevin Hilman authored
Numbering for GPIOs on the pcf857x chips on the dm644x EVM board changed when DaVinci chips with more GPIOs were supported. Update the GPIO number used for nVBUS_DRV. Longer term, we need a better abstraction of board-specific setup in this code so we're not hard-coding board specific GPIOs into the driver, but for now this at least gets it back to working with mainline davinci core code. Signed-off-by: -
David Brownell authored
Finish merging updates for DM355 chips into musb/davinci.c now that its support is in mainline: kick in new DRVVBUS controls. Signed-off-by:
David Brownell <dbrownell@users.sourceforge.net> Signed-off-by:
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Sudhakar Rajashekhara authored
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Vipin Bhandari authored
This patch adds support for MMC/SD controller driver for all DaVinci family SoC. This patch supports davinci family SoC's DM6446, DM355, DM365 and DA830/OMAPL137. The patch has been tested on DM355 EVM. The MMCSD controller specifications for DM355 can be found at http://focus.ti.com/general/docs/litabsmultiplefilelist.tsp?literatureNumber=spruee2cSigned-off-by:
Vipin Bhandari <vipin.bhandari@ti.com> Signed-off-by:
Purshotam Kumar <purushotam@ti.com> Acked-by:
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Kevin Hilman authored
DaVinci core code has converted to the new clkdev API so clock name strings are not needed. Instead, just the a struct device' pointer is needed. Signed-off-by: -
David Brownell authored
Add basic driver for the MSP430 on the DM 365 EVM; it's used only to report commands from an IR remote. (This assumes the same remote used with other DaVinci EVM boards.) Signed-off-by:
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David Brownell authored
Make i2c-davinci cope properly with "i2cdetect": don't spew syslog spam on perfectly normal behaviors, or respond to any address other than the one reserved for the SMBus host. Signed-off-by:
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Kevin Hilman authored
DaVinci core code has converted to the new clkdev API so clock name strings are not needed. Instead, just the a 'struct device' pointer is needed. Signed-off-by: -
Kevin Hilman authored
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Chaithrika U S authored
1) Registers the platform devices for ASP on dm355, dm644x and dm646x so that the machine driver can probe to get ASP related platform data. 2) Move towards definition of the asp clocks using physical name(for dm355 and dm644x) 3) Add platform data to board specific files. Signed-off-by:
Naresh Medisetty <naresh@ti.com> Signed-off-by:
Chaithrika U S <chaithrika@ti.com> Signed-off-by:
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David Brownell authored
Support DM365 GPIOs ... primarily by handling non-banked GPIO IRQs: - Flag DM365 chips as using non-banked GPIO interrupts, using a new soc_info field. - Replace the gpio_to_irq() mapping logic. This now uses some runtime infrastructure, keyed off that new soc_info field, which doesn't handle irq_to_gpio(). - Provide a new irq_chip ... GPIO IRQs handled directly by AINTC still need edge triggering managed by the GPIO controller. DM365 chips no longer falsely report 104 GPIO IRQs as they boot. Intelligence about IRQ muxing is missing, so for the moment this only exposes the first eight DM365 GPIOs, which are never muxed. The next eight are muxed, half with Ethernet (which uses most of those pins anyway). Tested on DM355 (10 unbanked IRQs _or_ 104 banked ones) and also on DM365 (16 unbanked ones, only 8 made available). Signed-off-by:
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Sandeep Paulraj authored
Patch updates DM365 PINMUX by adding entries for Video, SPI 1 - 4, PWM 0 - 3. Signed-off-by:
Sandeep Paulraj <s-paulraj@ti.com> Signed-off-by:
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Mark A. Greer authored
Add support for the DA830/OMAP-L137 Evaluation Module (EVM) from TI. The EVM has User Interface (UI) and Audio cards that can be connected which contain various devices. Support for those devices and ones on the EVM will be added in subsequent patches. Additional generalizations for future SoCs in da8xx family done by Sudhakar Rajashekhara and Sekhar Nori. Signed-off-by:
Steve Chen <schen@mvista.com> Signed-off-by:
Mark A. Greer <mgreer@mvista.com> Cc: Sudhakar Rajashekhara <sudhakar.raj@ti.com> Cc: Sekhar Nori <nsekhar@ti.com> Signed-off-by:
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Mark A. Greer authored
The da830/omap l137 is a new SoC from TI that is similar to the davinci line. Since its so similar to davinci, put the support for the da830 in the same directory as the davinci code. There are differences, however. Some of those differences prevent support for davinci and da830 platforms to work in the same kernel binary. Those differences are: 1) Different physical address for RAM. This is relevant to Makefile.boot addresses and PHYS_OFFSET. The Makefile.boot issue isn't truly a kernel issue but it means u-boot won't work with a uImage including both architectures. The PHYS_OFFSET issue is addressed by the "Allow for runtime-determined PHYS_OFFSET" patch by Lennert Buytenhek but it hasn't been accepted yet. 2) Different uart addresses. This is only an issue for the 'addruart' assembly macro when CONFIG_DEBUG_LL is enabled. Since the code in that macro is called so early (e.g., by _error_p in kernel/head.S when the processor lookup fails), we can't determine what platform the kernel is running on at runtime to use the correct uart address. These areas have compile errors intentionally inserted to indicate to the builder they're doing something wrong. A new config variable, CONFIG_ARCH_DAVINCI_DMx, is added to distinguish between a true davinci architecture and the da830 architecture. Note that the da830 currently has an issue with writeback data cache so CONFIG_CPU_DCACHE_WRITETHROUGH should be enabled when building a da830 kernel. Additional generalizations for future SoCs in the da8xx family done by Sudhakar Rajashekhara and Sekhar Nori. Signed-off-by:
Mikhail Cherkashin <mcherkashin@ru.mvista.com> Signed-off-by:
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David Brownell authored
Add basic support for the CPLD on the DM365 EVM board: - Read SW5 to set up NAND and keypad vs (someday) OneNAND - Export MMC/SD card detect and writeprotect signals - LED support (same layout as on DM355 EVM) - Static config for video input: * external HD imager precludes MMC1, Ethernet, audio * else either tvp5146 (SD/default) or tvp7002 (HD) The video input could actually be switched around dynamically; change that if/when that's needed (and after those other video inputs have driver support). Signed-off-by: -
Sandeep Paulraj authored
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Sandeep Paulraj authored
Patch adds support for MMC/SD in the DM365 EVM. Pinmux for MMC/SD slot 1 on the DM365 EVM is also configured. Signed-off-by:
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Sandeep Paulraj authored
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Sandeep Paulraj authored
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Sandeep Paulraj authored
The patch adds Support for EMAC in the DM365 SOC and the DM365 EVM board. Signed-off-by:
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Sandeep Paulraj authored
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Sandeep Paulraj authored
This patch does the following 1) Adds entries to davinci_all_defconfig for DM365 2) Adds entries to the Makefile for DM365 3) Adds entries for DM365 in the Kconfig Signed-off-by:
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Sandeep Paulraj authored
The patch adds support for Evaluation Module (EVM) board for the dm365 SoC. Signed-off-by:
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Sandeep Paulraj authored
The patch adds base support for new TI SOC DM365, which s similar to the dm355. Signed-off-by:
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Kevin Hilman authored
watchdog info is not needed in soc_info, platform_device can be used directly in core code. Signed-off-by: -
David Brownell authored
CC arch/arm/mach-davinci/sram.o arch/arm/mach-davinci/sram.c: In function 'sram_init': arch/arm/mach-davinci/sram.c:63: warning: comparison of distinct pointer types lacks a cast Signed-off-by:
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Kevin Hilman authored
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Rajashekhara, Sudhakar authored
JTAG ID for DM644x silicon revision 2.1 has changed. An entry for the new silicon revision needs to be added to the davinci_id structure. Without this addition, EVMs with new silicon revision fail to boot the kernel. Signed-off-by:
Sudhakar Rajashekhara <sudhakar.raj@ti.com> Signed-off-by:
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David Griego authored
The davinci reset routine, davinci_watchdog_reset(), sets the TCR register instead of the TGCR register as it should to put the WDT into its "Initial State". It also writes the WDTCR register without the proper WDKEY which is pointless since the register will be write-protected. Signed-off-by:
David Griego <dgriego@mvista.com> Signed-off-by:
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Chaithrika U S authored
Adds McASP clock support for the two instances of mcasp (mcasp0,mcasp1). This patch is part of the audio support for dm646x series. Signed-off-by:
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David Brownell authored
Minor EDMA cleanup: remove unused SoC-specific #define; and when requesting the channel controller region, use the device's name (to be more useful on chips with multiple such controllers). Signed-off-by:
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Sudhakar Rajashekhara authored
Enables module clock for DM646x EDMA channel controller and transfer controller. Channel mapping logic is introduced in dm646x EDMA. This implies that there is no fixed association for a channel number to a parameter entry number. In other words, using the DMA channel mapping registers (DCHMAPn), a PaRAM entry can be mapped to any channel. While in the case of dm644x and dm355 there is a fixed mapping between the EDMA channel and Param entry number. Signed-off-by:
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