Skip to content

L
linux-davinci
Switch branch/tag
  1. 14 Aug, 2009 1 commit
    • Paul Mundt's avatar
      sh: Add register alignment helpers for shared flushers. · 43bc61d8
      Paul Mundt authored 
      This plugs in some register alignment helpers for the shared flushers,
allowing them to also be used on SH-5. The main rationale here is that
in the SH-5 case we have a variable ABI, where the pointer size may not
equal the register width. This register extension is taken care of by
the SH-5 code already today, and is otherwise unused on the SH-4 code.
This combines the two and allows us to kill off the SH-5 implementation.
Signed-off-by: default avatarPaul Mundt <lethal@linux-sh.org>
      43bc61d8
  3. 04 Aug, 2009 8 commits
  5. 29 Jul, 2009 1 commit
  7. 28 Jul, 2009 1 commit
  9. 27 Jul, 2009 3 commits
  11. 22 Jul, 2009 2 commits
    • Paul Mundt's avatar
      sh: Migrate from PG_mapped to PG_dcache_dirty. · 2277ab4a
      Paul Mundt authored 
      This inverts the delayed dcache flush a bit to be more in line with other
platforms. At the same time this also gives us the ability to do some
more optimizations and cleanup. Now that the update_mmu_cache() callsite
only tests for the bit, the implementation can gradually be split out and
made generic, rather than relying on special implementations for each of
the peculiar CPU types.

SH7705 in 32kB mode and SH-4 still need slightly different handling, but
this is something that can remain isolated in the varying page copy/clear
routines. On top of that, SH-X3 is dcache coherent, so there is no need
to bother with any of these tests in the PTEAEX version of
update_mmu_cache(), so we kill that off too.
Signed-off-by: default avatarPaul Mundt <lethal@linux-sh.org>
      2277ab4a
    • Paul Mundt's avatar
      sh: Provide _PAGE_SPECIAL for 32-bit. · c0b96cf6
      Paul Mundt authored 
      Allocate one of the unused PTE bits for _PAGE_SPECIAL directly. This is
prep work for fast gup and the zero page revival.
Signed-off-by: default avatarPaul Mundt <lethal@linux-sh.org>
      c0b96cf6
  13. 21 Jul, 2009 2 commits
  15. 20 Jul, 2009 12 commits
  17. 19 Jul, 2009 5 commits
  19. 18 Jul, 2009 4 commits
  21. 17 Jul, 2009 1 commit
    • Tim Abbott's avatar
      vmlinux.lds.h: restructure BSS linker script macros · 04e448d9
      Tim Abbott authored 
      The BSS section macros in vmlinux.lds.h currently place the .sbss
input section outside the bounds of [__bss_start, __bss_end].  On all
architectures except for microblaze that handle both .sbss and
__bss_start/__bss_end, this is wrong: the .sbss input section is
within the range [__bss_start, __bss_end].  Relatedly, the example
code at the top of the file actually has __bss_start/__bss_end defined
twice; I believe the right fix here is to define them in the
BSS_SECTION macro but not in the BSS macro.

Another problem with the current macros is that several
architectures have an ALIGN(4) or some other small number just before
__bss_stop in their linker scripts.  The BSS_SECTION macro currently
hardcodes this to 4; while it should really be an argument.  It also
ignores its sbss_align argument; fix that.

mn10300 is the only user at present of any of the macros touched by
this patch.  It looks like mn10300 actually was incorrectly converted
to use the new BSS() macro (the alignment of 4 prior to conversion was
a __bss_stop alignment, but the argument to the BSS macro is a start
alignment).  So fix this as well.

I'd like acks from Sam and David on this one.  Also CCing Paul, since
he has a patch from me which will need to be updated to use
BSS_SECTION(0, PAGE_SIZE, 4) once this gets merged.
Signed-off-by: default avatarTim Abbott <tabbott@ksplice.com>
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: David Howells <dhowells@redhat.com>
Signed-off-by: default avatarSam Ravnborg <sam@ravnborg.org>
      04e448d9