- 29 Apr, 2009 32 commits
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Robert Richter authored
The documentation about the perf-top build was outdated after perfstat has been implemented. This updates it. [ Impact: update documentation ] Signed-off-by:
Robert Richter <robert.richter@amd.com> Cc: Paul Mackerras <paulus@samba.org> Acked-by:
Peter Zijlstra <a.p.zijlstra@chello.nl> LKML-Reference: <1241002046-8832-30-git-send-email-robert.richter@amd.com> Signed-off-by:
Ingo Molnar <mingo@elte.hu>
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Robert Richter authored
The mask argument is unused and thus can be removed. [ Impact: cleanup ] Signed-off-by:
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Robert Richter authored
The function fixed_mode_idx() is used generically. Now it checks the num_counters_fixed value instead of the vendor to decide if fixed counters are present. [ Impact: generalize code ] Signed-off-by:
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Robert Richter authored
In x86 pmus the allowed counter period to programm differs. This introduces a max_period value and allows the generic implementation for all models to check the max period. [ Impact: generalize code ] Signed-off-by:
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Robert Richter authored
To check on AMD cpus if a counter overflows, the upper bit of the raw counter value must be checked. This value is already internally available in x86_perf_counter_update(). Now, the value is returned so that it can be used directly to check for overflows. [ Impact: micro-optimization ] Signed-off-by:
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Robert Richter authored
This patch implements the interrupt handler for AMD performance counters. In difference to the Intel pmu, there is no single status register and also there are no fixed counters. This makes the handler very different and it is useful to make the handler vendor specific. To check if a counter is overflowed the upper bit of the counter is checked. Only counters where the active bit is set are checked. With this patch throttling is enabled for AMD performance counters. This patch also reenables Linux performance counters on AMD cpus. [ Impact: re-enable perfcounters on AMD CPUs ] Signed-off-by:
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Robert Richter authored
Some functions are only called if the pmu was proper initialized. That initalization checks can be removed. The way to check initialization changed too. Now, the pointer to the interrupt handler is checked. If it exists the pmu is initialized. This also removes a static variable and uses struct x86_pmu as only data source for the check. [ Impact: simplify code ] Signed-off-by:
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Robert Richter authored
As for the enable function, this patch reworks the disable functions and introduces x86_pmu_disable_counter(). The internal function i/f in struct x86_pmu changed too. [ Impact: refactor and generalize code ] Signed-off-by:
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Robert Richter authored
There is vendor specific code in generic x86 code, and there is vendor specific code that could be generic. This patch introduces x86_pmu_enable_counter() for x86 generic code. Fixed counter code for Intel is moved to Intel only functions. In the end, checks and calls via function pointers were reduced to the necessary. Also, the internal function i/f changed. [ Impact: refactor and generalize code ] Signed-off-by:
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Robert Richter authored
The type of counter index is sometimes implemented as unsigned int. This patch changes this to have a consistent usage of int. [ Impact: cleanup ] Signed-off-by:
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Robert Richter authored
cpuc->active will now be used to indicate an enabled counter which implies also valid pointers of cpuc->counters[]. In contrast, cpuc->used only locks the counter, but it can be still uninitialized. [ Impact: refactor and generalize code ] Signed-off-by:
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Robert Richter authored
This is to have a consistent naming scheme with cpuc->used. [ Impact: cleanup ] Signed-off-by:
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Robert Richter authored
[ Impact: micro-optimization ] Signed-off-by:
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Robert Richter authored
This makes the use of the version variable generic. Also, some debug messages have been generalized. [ Impact: refactor and generalize code ] Signed-off-by:
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Robert Richter authored
[ Impact: refactor and generalize code ] Signed-off-by:
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Robert Richter authored
Instead of using a pointer to reference to the x86 pmu we now have one single data structure that is initialized at the beginning. This saves the pointer access when using this memory. [ Impact: micro-optimization ] Signed-off-by:
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Robert Richter authored
This patch adds an error handler and changes initialization of struct x86_pmu. No functional changes. Needed for follow-on patches. [ Impact: cleanup ] Signed-off-by:
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Robert Richter authored
[ Impact: cleanup ] Signed-off-by:
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Robert Richter authored
[ Impact: cleanup ] Signed-off-by:
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Robert Richter authored
This function is Intel only and not necessary for AMD cpus. [ Impact: simplify code ] Signed-off-by:
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Robert Richter authored
This function is Intel only and not necessary for AMD cpus. [ Impact: simplify code ] Signed-off-by:
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Robert Richter authored
This separates the perfcounter interrupt handler for AMD and Intel cpus. The AMD interrupt handler implementation is a follow-on patch. [ Impact: refactor and clean up code ] Signed-off-by:
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Robert Richter authored
This patch renames struct pmc_x86_ops into struct x86_pmu. It introduces a structure to describe an x86 model specific pmu (performance monitoring unit). It may contain ops and data. The new name of the structure fits better, is shorter, and thus better to handle. Where it was appropriate, names of function and variable have been changed too. [ Impact: cleanup ] Signed-off-by:
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Robert Richter authored
This patch renames struct hw_perf_counter_ops into struct pmu. It introduces a structure to describe a cpu specific pmu (performance monitoring unit). It may contain ops and data. The new name of the structure fits better, is shorter, and thus better to handle. Where it was appropriate, names of function and variable have been changed too. [ Impact: cleanup ] Signed-off-by:
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Robert Richter authored
Per-cpu variables needn't to be protected with cpu barriers (smp_wmb()). Protection is only needed for preemption on the same cpu (rescheduling or the nmi handler). This can be done using a compiler barrier only. [ Impact: micro-optimization ] Signed-off-by:
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Robert Richter authored
MSR reads and writes are expensive. This patch adds checks to avoid its usage where possible. [ Impact: micro-optimization on AMD CPUs ] Signed-off-by:
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Robert Richter authored
This quits hw counter initialization immediately if no cpu is detected. [ Impact: cleanup ] Signed-off-by:
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Robert Richter authored
This is only needed for CONFIG_PERF_COUNTERS enabled. [ Impact: cleanup ] Signed-off-by:
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Robert Richter authored
X86_FEATURE_ARCH_PERFMON is an Intel hardware feature that does not work on AMD CPUs. The flag is now only used in Intel specific code (especially initialization). [ Impact: refactor code ] Signed-off-by:
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Ingo Molnar authored
Merge reason: This brach was on -rc1, refresh it to almost-rc4 to pick up the latest upstream fixes. Signed-off-by: -
git://git.kernel.org/pub/scm/linux/kernel/git/anholt/drm-intelLinus Torvalds authored
* 'drm-intel-next' of git://git.kernel.org/pub/scm/linux/kernel/git/anholt/drm-intel: drm/i915: fix up error path leak in i915_cmdbuffer drm/i915: fix unpaired i915 device mutex on entervt failure. drm/i915: add support for G41 chipset drm/i915: Enable ASLE if present drm/i915: Unregister ACPI video driver when exiting drm/i915: Register ACPI video even when not modesetting drm/i915: fix transition to I915_TILING_NONE drm/i915: Don't let an oops get triggered from irq_emit without dma init. drm/i915: allow tiled front buffers on 965+
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git://git.kernel.org/pub/scm/linux/kernel/git/roland/infinibandLinus Torvalds authored
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/roland/infiniband: (21 commits) RDMA/nes: Update iw_nes version RDMA/nes: Fix error path in nes_accept() RDMA/nes: Fix hang issues for large cluster dynamic connections RDMA/nes: Increase rexmit timeout interval RDMA/nes: Check for sequence number wrap-around RDMA/nes: Do not set apbvt entry for loopback RDMA/nes: Fix unused variable compile warning when INFINIBAND_NES_DEBUG=n RDMA/nes: Fix fw_ver in /sys RDMA/nes: Set trace length to 1 inch for SFP_D RDMA/nes: Enable repause timer for port 1 RDMA/nes: Correct CDR loop filter setting for port 1 RDMA/nes: Modify thermo mitigation to flip SerDes1 ref clk to internal RDMA/nes: Fix resource issues in nes_create_cq() and nes_destroy_cq() RDMA/nes: Remove root_256()'s unused pbl_count_256 parameter mlx4_core: Fix memory leak in mlx4_enable_msi_x() IB/mthca: Fix timeout for INIT_HCA and a few other commands RDMA/cxgb3: Don't zero QP attrs when moving to IDLE RDMA/nes: Fix bugs in nes_reg_phys_mr() RDMA/nes: Fix compiler warning at nes_verbs.c:1955 IPoIB: Disable NAPI while CQ is being drained ...
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- 28 Apr, 2009 8 commits
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Geert Uytterhoeven authored
Fix this: arch/m68k/kernel/sun3-head.S: Assembler messages: arch/m68k/kernel/sun3-head.S:32: Error: Unknown operator -- statement `__head' ignored Introduced by commit 6f335cab ("m68k: convert to use __HEAD and HEAD_TEXT macros."), which started using __HEAD without adding the appropriate include. Signed-off-by:
Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by:
Linus Torvalds <torvalds@linux-foundation.org>
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git://git.kernel.dk/linux-2.6-blockLinus Torvalds authored
* 'for-linus' of git://git.kernel.dk/linux-2.6-block: bio: fix memcpy corruption in bio_copy_user_iov() hd: fix locking mg_disk: fix CONFIG_LBD=y warning mg_disk: fix locking
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git://git.kernel.org/pub/scm/linux/kernel/git/lrg/voltage-2.6Linus Torvalds authored
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/lrg/voltage-2.6: regulator: Fix default constraints for fixed voltage regulators regulator/bq24022: fix bug in is_enabled function regulator/virtual: fix strings compare predicates regulator core: fix double-free in regulator_register() error path drivers/regulator: fix when type is different from REGULATOR_VOLTAGE or REGULATOR_CURRENT unreachable code in drms_uA_update() regulator: fix header file missing kernel-doc
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Roland Dreier authored
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git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpcLinus Torvalds authored
* 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc: powerpc/ps3: Fix build error on UP powerpc/cell: Select PCI for IBM_CELL_BLADE AND CELLEB powerpc: ppc32 needs elf_read_implies_exec() powerpc/86xx: Add device_type entry to soc for ppc9a powerpc/44x: Correct memory size calculation for denali-based boards maintainers: Fix PowerPC 4xx git tree powerpc: fix for long standing bug noticed by gcc 4.4.0 Revert "powerpc: Add support for early tlbilx opcode"
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Tim Abbott authored
Commit edada399 broke the build on 64-bit powerpc because it moved the __ftr_alt_* sections of a file away from the .text section, causing link failures due to relative conditional branch targets being too far away from the branch instructions. This happens on pretty much all 64-bit powerpc configs. This change reverts commit edada399 while preserving the update from the *.refok sections to .ref.text that has happened since. Signed-off-by:
Tim Abbott <tabbott@mit.edu> Requested-by:
Paul Mackerras <paulus@samba.org> Signed-off-by:
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FUJITA Tomonori authored
st driver uses blk_rq_map_user() in order to just build a request out of page frames. In this case, map_data->offset is a non zero value and iov[0].iov_base is NULL. We need to increase nr_pages for that. Cc: stable@kernel.org Signed-off-by:
FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Signed-off-by:
Jens Axboe <jens.axboe@oracle.com>
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Tejun Heo authored
hd dance around local irq and HD_IRQ enable without achieving much. It ends up transferring data from irq handler with both local irq and HD_IRQ disabled. The only place it actually does something is while transferring the first block of a request which it does with HD_IRQ disabled but local irq enabled. Unfortunately, the dancing is horribly broken from locking POV. IRQ and timeout handlers access block queue without grabbing the queue lock and running the driver in SMP configuration crashes the whole machine pretty quickly. Remove meaningless irq enable/disable dancing and add proper locking in issue, irq and timeout paths. Signed-off-by:Tejun Heo <tj@kernel.org>
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