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  1. 23 Feb, 2007 1 commit
    • Catalin Marinas's avatar
      DSB needed after disabling masking the IRQ · 373a3499
      Catalin Marinas authored
      Starting with ARMv6, accesses to strongly ordered memory are not
      guaranteed to complete before a subsequent instruction modifying the
      interrupt mask in CPSR. This can cause potential problems with masking
      or acknowledging an IRQ at the device or interrupt controller level
      followed by a local_irq_enable or local_irq_restore (see B2.4.3 in ARM
      ARM revI). This patch adds a DSB after masking the interrupts at the
      interrupt controller level to ensure that the strongly ordered memory
      access was completed.
      Signed-off-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
      373a3499
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  14. 16 Apr, 2005 1 commit
    • Linus Torvalds's avatar
      Linux-2.6.12-rc2 · 1da177e4
      Linus Torvalds authored
      Initial git repository build. I'm not bothering with the full history,
      even though we have it. We can create a separate "historical" git
      archive of that later if we want to, and in the meantime it's about
      3.2GB when imported into git - space that would just make the early
      git days unnecessarily complicated, when we don't have a lot of good
      infrastructure for it.
      
      Let it rip!
      1da177e4