1. 23 Sep, 2009 6 commits
  2. 21 Sep, 2009 4 commits
  3. 19 Sep, 2009 1 commit
  4. 18 Sep, 2009 4 commits
  5. 17 Sep, 2009 4 commits
  6. 16 Sep, 2009 2 commits
  7. 15 Sep, 2009 4 commits
  8. 14 Sep, 2009 1 commit
  9. 13 Sep, 2009 1 commit
  10. 12 Sep, 2009 1 commit
    • Julia Lawall's avatar
      ASoC: Clean up error handling in MPC5200 DMA setup · 33d7f778
      Julia Lawall authored
      Error handling code following a kzalloc should free the allocated data.
      Error handling code following an ioremap should iounmap the allocated data.
      
      The semantic match that finds the first problem is as follows:
      (http://www.emn.fr/x-info/coccinelle/)
      
      // <smpl>
      @r exists@
      local idexpression x;
      statement S;
      expression E;
      identifier f,f1,l;
      position p1,p2;
      expression *ptr != NULL;
      @@
      
      x@p1 = \(kmalloc\|kzalloc\|kcalloc\)(...);
      ...
      if (x == NULL) S
      <... when != x
           when != if (...) { <+...x...+> }
      (
      x->f1 = E
      |
       (x->f1 == NULL || ...)
      |
       f(...,x->f1,...)
      )
      ...>
      (
       return \(0\|<+...x...+>\|ptr\);
      |
       return@p2 ...;
      )
      
      @script:python@
      p1 << r.p1;
      p2 << r.p2;
      @@
      
      print "* file: %s kmalloc %s return %s" % (p1[0].file,p1[0].line,p2[0].line)
      // </smpl>
      Signed-off-by: default avatarJulia Lawall <julia@diku.dk>
      Signed-off-by: default avatarMark Brown <broonie@opensource.wolfsonmicro.com>
      33d7f778
  11. 09 Sep, 2009 1 commit
  12. 08 Sep, 2009 2 commits
    • Mark Brown's avatar
      ASoC: Allow per-route connectedness checks for supplies · 215edda3
      Mark Brown authored
      Some chips with complex internal supply (particularly clocking)
      arragements may have multiple options for some of the supply
      connections. Since these don't affect user-visible audio routing
      the expectation would be that they would be managed automatically
      by one of the drivers.
      
      Support these users by allowing routes to have a connected function
      which is queried before the connectedness of the path is checked as
      normal. Currently this is only done for supplies, other widgets
      could be supported but are not currently since the expectation for
      them is that audio routing will be under the control of userspace.
      Signed-off-by: default avatarMark Brown <broonie@opensource.wolfsonmicro.com>
      215edda3
    • Manuel Lauss's avatar
      ASoC: au1x: PSC-AC97 bugfixes · cdc65fbe
      Manuel Lauss authored
      This patch fixes the following bugs:
      
      - only reprogram bitdepth if it has changed since last call to hw_params.
      - add locking inside ac97_read/write functions:
        When reprogramming sample depth, the ac97 unit has to be disabled,
        which should not be done in the middle of codec register accesses.
      
      - retry timed-out codec register accesses.
      
      - wait for status bits to set/clear when starting/stopping various
        functional blocks; very important after reenabling AC97 unit else
        sound may be distorted (e.g. high-pitch noise in 1kHz sine wave).
      
      - clear fifos before/after starting/stopping RX/TX.
      
      - longer timeouts waiting for PSC/AC97 ready after cold reset
        with certain codecs this can take ridiculous amounts of time.
      
      Run-tested on various Au1200 platforms with various codecs.
      Signed-off-by: default avatarManuel Lauss <manuel.lauss@gmail.com>
      Signed-off-by: default avatarMark Brown <broonie@opensource.wolfsonmicro.com>
      cdc65fbe
  13. 07 Sep, 2009 3 commits
  14. 05 Sep, 2009 1 commit
  15. 04 Sep, 2009 1 commit
  16. 02 Sep, 2009 1 commit
  17. 01 Sep, 2009 2 commits
  18. 28 Aug, 2009 1 commit
    • Jarkko Nikula's avatar
      ASoC: OMAP: Add functionality to set CLKR and FSR sources in McBSP DAI · d2c0bdaa
      Jarkko Nikula authored
      The McBSP1 port in OMAP3 processors (I believe OMAP2 too but I don't have
      specifications to check it) have additional CLKR and FSR pins for McBSP1
      receiver. Reset default is that receiver is using bit clock and frame
      sync signal from those pins but it is possible to configure to use
      also CLKX and FSX pins as well. In fact, other McBSP ports are doing that
      internally that transmitter and receiver share the CLKX and FSX.
      
      Add functionaly that machine drivers can set the CLKR and FSR sources by
      using the snd_soc_dai_set_sysclk.
      
      Thanks to "Aggarwal, Anuj" <anuj.aggarwal@ti.com> for reporting the issue.
      Signed-off-by: default avatarJarkko Nikula <jhnikula@gmail.com>
      Signed-off-by: default avatarMark Brown <broonie@opensource.wolfsonmicro.com>
      d2c0bdaa