- 16 Apr, 2005 40 commits
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Andi Kleen authored
It doesn't make sense to only do this only for AMD K8. This would support future CPUs with extended address spaces properly. For i386 and x86-64 Cc: <davej@redhat.com> Signed-off-by:
Andi Kleen <ak@suse.de> Signed-off-by:
Andrew Morton <akpm@osdl.org> Signed-off-by:
Linus Torvalds <torvalds@osdl.org>
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Andi Kleen authored
Remove excessive stack allocation in MCE code with large NR_CPUS Signed-off-by:
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Andi Kleen authored
They are rumoured to be much more reliable than the RIP in the stack frame on P4s. This is a borderline case because the code is very simple. Please note there are no plans to add support for all the MCE register MSRs. Cc: <venkatesh.pallipadi@intel.com> Cc: <racing.guo@intel.com> Signed-off-by:
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Andi Kleen authored
local_t is actually a win over atomic_t because it does not need lock prefixes. Signed-off-by:
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Andi Kleen authored
The NMI watchdog code did this incorrectly Signed-off-by:
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Andi Kleen authored
There were no reports about the previous warning for FPU exceptions in the kernel, so make it a die() now. Also improve the error messages slightly. Signed-off-by:
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Andi Kleen authored
On Intel Noconas the TSC ticks with a constant frequency. Don't scale the factor used by udelay when cpufreq changes the frequency. This generalizes an earlier patch by Intel for this. Cc: <venkatesh.pallipadi@intel.com> Signed-off-by:
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Andi Kleen authored
Remove unused macro in preempt support Signed-off-by:
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Andi Kleen authored
Could lead to a lost reschedule event when the process already rescheduled on exception exit, and needs it again while still being in the kernel. Unlikely case though. Also remove one redundant cli in another entry.S path. Signed-off-by:
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Andi Kleen authored
This fixes various issues in the return path for "paranoid" handlers (= running on a private exception stack that act like NMIs). Generalize previous hack to switch back to process stack for scheduling/signal handling purposes. Signed-off-by:
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Andi Kleen authored
This removes some unnecessary code in the assembly files. Matches i386 behaviour. In addition don't clear the work check mask after work has been done. This fixes some theoretical signal/other event losses. Signed-off-by:
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Andi Kleen authored
Minor microoptimization in syscall entry slow path Signed-off-by:
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Andi Kleen authored
Ported from i386/Linus Fix another TF corner case. Need to do the special TF handling for all signals to make debuggers happy Signed-off-by:
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Andi Kleen authored
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Andi Kleen authored
To avoid some code duplication. Signed-off-by:
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Andi Kleen authored
Ported from i386/Linus Still won't handle other TF changing instructions like IRET or LAHF. Prefix handling must be double checked... Signed-off-by:
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Andi Kleen authored
Ported from i386/Linus Be more careful with TF handling to fix some copy protection codes in Wine Signed-off-by:
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Andi Kleen authored
Ported from i386 (originally from Linus) clean up ptrace single-stepping, make PT_DTRACE exact. (This makes the naming of "DTRACE" purely historical, since on x86 it now means "single step in progress"). Signed-off-by:
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Andi Kleen authored
This allows to use them on x86-64 Signed-off-by:
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Andi Kleen authored
Use a real VMA to map the 32bit vsyscall page This interacts better with Hugh's upcomming VMA walk optimization Also removes some ugly special cases. Code roughly modelled after the ppc64 vdso version from Ben Herrenschmidt. Signed-off-by:
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akpm@osdl.org authored
I had strange NMI watchdog timeouts running sysrq-T across 9600-baud serial. Signed-off-by:
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Jason Davis authored
x86_64 genapic mechanism should be aware of machines that use physical APIC mode regardless of how many clusters/processors are detected. ACPI 3.0 FADT makes this determination very simple by providing a feature flag "force_apic_physical_destination_mode" to state whether the machine unconditionally uses physical APIC mode. Unisys' next generation x86_64 ES7000 will need to utilize this FADT feature flag in order to boot the x86_64 kernel in the correct APIC mode. This patch has been tested on both x86_64 commodity and ES7000 boxes. Signed-off-by:
Jason Davis <jason.davis@unisys.com> Acked-by:
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Andi Kleen authored
Port over a i386 kludge from rusty to x86-64 I don't think it is a full solution, but the upcomming smp bootup rewrite will solve it. This fixes BUGs at bootup on bigger x86-64 systems. Signed-off-by:
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Andi Kleen authored
Use the correct file name in BUG() Signed-off-by:
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Andi Kleen authored
Only display physical id/siblings when there are siblings or dual core. In 2.6.11 I accidentially broke it and it was always displaying these fields But for compatibility to all these /proc parsers around it is better to do it in the old way again. Noticed by Suresh Siddha Cc: <Suresh.b.siddha@intel.com> Signed-off-by:
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Roland McGrath authored
Use the i386 PT_NOTE segment in x86_64 as well. Signed-off-by:
Roland McGrath <roland@redhat.com> Signed-off-by:
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Roland McGrath authored
This patch adds an ELF note to the vDSO giving the LINUX_VERSION_CODE value. Having this in the vDSO lets the dynamic linker avoid the `uname' syscall it now always does at startup to ascertain the kernel ABI available. Signed-off-by:
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Roland McGrath authored
This moves the macro loaddebug from asm-i386/suspend.h to asm-i386/processor.h, which is the place that makes sense for it to be defined, removes the extra copy of the same macro in arch/i386/kernel/process.c, and makes arch/i386/kernel/signal.c use the macro in place of its expansion. This is a purely cosmetic cleanup for the normal i386 kernel. However, it is handy for Xen to be able to just redefine the loaddebug macro once instead of also changing the signal.c code. Signed-off-by:
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Jason Gaston authored
This patch adds the Intel ESB2 DID's to the i2c-i801.c and Kconfig files for I2C support. Signed-off-by:
Jason Gaston <Jason.d.gaston@intel.com> Cc: Greg KH <greg@kroah.com> Signed-off-by:
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Jason Gaston authored
This patch adds the Intel ESB2 DID's to the ahci.c file for AHCI mode SATA support. Signed-off-by:
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Jason Gaston authored
This patch adds the Intel ESB2 DID's to the ata_piix.c and quirks.c file for IDE mode SATA support. Signed-off-by:
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Jason Gaston authored
This patch adds the Intel ESB2 DID's to the intel8x0.c file for AC'97 audio support. Signed-off-by:
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Jason Gaston authored
This patch adds the Intel ESB2 DID's to the piix.c file for IDE PATA support. Signed-off-by:
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Jason Gaston authored
This patch adds the Intel ESB2 DID's to the irq.c and pci_ids.h files. Signed-off-by:
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Yoichi Yuasa authored
This patch removes #include <linux/audit.h>. Because it includes it two times. Signed-off-by:
Yoichi Yuasa <yuasa@hh.iij4u.or.jp> Cc: Ralf Baechle <ralf@linux-mips.org> Signed-off-by:
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Yoichi Yuasa authored
This patch updates NEC VR4100 series CPU-PCI bridge support. Signed-off-by:
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Yoichi Yuasa authored
This patch had removed obsolete VR41xx RTC function from vr41xx.h . I forgot to put this change in "update VR41xx RTC support". Signed-off-by:
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Olof Johansson authored
For prefetches of NULL (as when walking a short linked list), PPC64 will in some cases take a performance hit. The hardware needs to do the TLB walk, and said walk will always miss, which means (up to) two L2 misses as penalty. This seems to hurt overall performance, so for NULL pointers skip the prefetch alltogether. Signed-off-by:
Olof Johansson <olof@austin.ibm.com> Signed-off-by:
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Anton Blanchard authored
During some code inspection using gcc 4.0 I noticed a stack frame was being created for a number of functions that didnt require it. For example: c0000000000df944 <._spin_unlock>: c0000000000df944: fb e1 ff f0 std r31,-16(r1) c0000000000df948: f8 21 ff c1 stdu r1,-64(r1) c0000000000df94c: 7c 3f 0b 78 mr r31,r1 c0000000000df950: 7c 20 04 ac lwsync c0000000000df954: e8 21 00 00 ld r1,0(r1) c0000000000df958: 38 00 00 00 li r0,0 c0000000000df95c: 90 03 00 00 stw r0,0(r3) c0000000000df960: eb e1 ff f0 ld r31,-16(r1) c0000000000df964: 4e 80 00 20 blr It turns out we are adding -fno-omit-frame-pointer to ppc64 which is causing the above behaviour. Removing that flag results in much better code: c0000000000d5b30 <._spin_unlock>: c0000000000d5b30: 7c 20 04 ac lwsync c0000000000d5b34: 38 00 00 00 li r0,0 c0000000000d5b38: 90 03 00 00 stw r0,0(r3) c0000000000d5b3c: 4e 80 00 20 blr We dont require a frame pointer to debug on ppc64, so remove it. Signed-off-by:
Anton Blanchard <anton@samba.org> Signed-off-by:
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Benjamin Herrenschmidt authored
The code that parses the OF device tree contains an old bogus hack which was killed a long time ago on ppc32, but survived in ppc64. It was supposed to help with a problem on the f50 which is ... a 32 bits machine :) Additionally, that hack is causing problems, so let's just get rid of it. Signed-off-by:
Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by:
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