- 25 Mar, 2006 40 commits
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Andi Kleen authored
Because 256 causes overflows in some code that stores them in 8 bit fields and the x86 APIC architecture cannot handle more than 255 anyways. Signed-off-by:
Andi Kleen <ak@suse.de> Signed-off-by:
Linus Torvalds <torvalds@osdl.org>
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Chuck Ebbert authored
When x86_64 timer init messages were changed to use apic verbosity levels, two messages were missed and one got the wrong level. This causes the last word of a suppressed message to print on a line by itself. Fix that so either the entire message prints or none of it does. Signed-off-by:
Chuck Ebbert <76306.1226@compuserve.com> Signed-off-by:
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Andi Kleen authored
Only log data in microcode driver when something is changed Otherwise it was far too noisy on large systems. Also remove the printk when it is unloaded. Cc: tigran@veritas.com Signed-off-by:
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Arjan van de Ven authored
This patch puts the infrastructure in place to allow for a reordering of functions based inside the vmlinux. The general idea is that it is possible to put all "common" functions into the first 2Mb of the code, so that they are covered by one TLB entry. This as opposed to the current situation where a typical vmlinux covers about 3.5Mb (on x86-64) and thus 2 TLB entries. This is done by enabling the -ffunction-sections flag in gcc, which puts each function in its own ELF section, so that the linker can then order them in a way defined by the linker script. As per previous discussions, Linus said he wanted a "static" list for this, eg a list provided by the kernel tarbal, so that most people have the same ordering at least. A script is provided to create this list based on readprofile(1) output. The included list is provisional, and entirely biased on my own testbox and me running a few kernel compiles and some other things. I think that to get to a better list we need to invite people to submit their own profiles, and somehow add those all up and base the final list on that. I'm willing to do that effort if this is ends up being the prefered approach. Such an effort probably needs to be repeated like once a year or so to adopt to the changing nature of the kernel. Made it a CONFIG with default n because it increases link times dramatically. Signed-off-by:
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Andi Kleen authored
I tested it on a couple of chipsets and it worked everywhere so it should be ok as default for now. So far I haven't done the great purge of the useless old check_timer code yet though. Can be overwritten with enable_8254_timer in the worst case Signed-off-by:
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Andi Kleen authored
There is a fallback logic, so it's better to not use the OOM killer in the allocations. Signed-off-by:
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Andi Kleen authored
Floppy can fall back to smaller buffers, so don't do OOM killing. Signed-off-by:
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Andi Kleen authored
Was disabled due to an old bug, long gone. Signed-off-by:
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Andi Kleen authored
Only white space changes, code should be identical Signed-off-by:
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Andi Kleen authored
ACPIv2 has an official but optional way to get a date >2100. Use it. But all the platforms I tested didn't seem to support it. But anyways the x86-64 kernel should be ready for the 22nd century now. Actually i shouldn't care about this because I will be dead by then @) Signed-off-by:
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Arjan van de Ven authored
This patch puts the code from head.S in a special .bootstrap.text section. I'm working on a patch to reorder the functions in the kernel (I'll post that later), but for x86-64 at least the kernel bootstrap requires that the head.S functions are on the very first page/pages of the kernel text. This is understandable since the bootstrap is complex enough already and not a problem at all, it just means they aren't allowed to be reordered. This patch puts these special functions into a separate section to document this, and to guarantee this in the light of possibly reordering the rest later. (So this patch doesn't fix a bug per se, but makes things more robust by making the order of these functions explicit) Signed-off-by:
Arjan van de Ven <arjan@linux.intel.com> Signed-off-by:
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Andi Kleen authored
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Andi Kleen authored
There are more and more cases where we need to know DMI information early to work around bugs. i386 already had early DMI scanning, but x86-64 didn't. Implement this now. This required some cleanup in the i386 code. Signed-off-by:
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Andi Kleen authored
- Move the core parser into dmi_scan.c. It can be useful for other subsystems too. - Differentiate between field doesn't exist and field is 0 or unparseable. The first case is likely an old BIOS with broken ACPI, the later is likely a slightly buggy BIOS where someone forget to edit the date. Don't blacklist in the later case. Signed-off-by:
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Dave Jones authored
s/Overwrite/Override/ Signed-off-by:
Dave Jones <davej@redhat.com> Signed-off-by:
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Andi Kleen authored
As suggested by Andi (and Alan), move the default kernel location from 1Mb to 2Mb, to align to the start of a TLB entry. Signed-off-by:
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Arjan van de Ven authored
In a micro-benchmark that stresses the pagefault path, the down_read_trylock on the mmap_sem showed up quite high on the profile. Turns out this lock is bouncing between cpus quite a bit and thus is cache-cold a lot. This patch prefetches the lock (for write) as early as possible (and before some other somewhat expensive operations). With this patch, the down_read_trylock basically fell out of the top of profile. Signed-off-by:
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Andi Kleen authored
Not for the ioctls so far because I was too lazy. Cc: bcollins@debian.org Cc: dan@dennedy.org Signed-off-by:
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Ravikiran G Thirumalai authored
phys_proc_id[] on AMD boxes is right now populated with the initial apic id, obtained by the cpuid instruction. But, the initial apic id need not be the local apic id on clustered APIC systems (see comment at x86_64/kernel/genapic_cluster.c, line 110). On vSMPowered with AMD CPUs the cpu_to_node will turn out to be incorrect (as apicid_to_node[] is indexed by the initial apic id rather than the local apic id). On vSMPowered boxes with Intel CPUs this is working correctly as phys_proc_id[] is initialized correctly in detect_ht(). This fixes AMD boot path according to specification, to use the correct routines for local apic id and socket ids. We use hard_smp_processor_id() to read the local apic id, and phys_pkg_id() to determine socket id for phys_proc_id[] Patch tested on Tyan multicore boxes as well as vSMPowered boxes. Signed-off-by:
Ravikiran Thirumalai <kiran@scalex86.org> Signed-off-by:
Shai Fultheim <shai@scalex86.org> Signed-off-by:
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Jan Beulich authored
- adjust limits of GDT/IDT pseudo-descriptors (some were off by one) - move empty_zero_page into .bss.page_aligned - move cpu_gdt_table into .data.page_aligned - move idt_table into .bss - align inital_code and init_rsp - eliminate pointless (re-)declaration of idt_table in traps.c Signed-off-by:
Jan Beulich <jbeulich@novell.com> Signed-off-by:
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Andi Kleen authored
It needs num_physpages, so initialize it early. It's later overwritten again. Signed-off-by:
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Roberto Nibali authored
Attached is a small code style cleanup patch that resulted from my skimming through the arch/x86_64/kernel/traps.c code to figure out what went haywire. Signed-off-by:
Roberto Nibali <ratz@drugphish.ch> Signed-off-by:
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Henrik Kretzschmar authored
[description by AK] Made a cut'n'paste error when adding the entry for the ALI M1695 AGP bridge and added a second entry for the 1689 Cc: Dave Jones <davej@redhat.com> Signed-off-by:
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Andi Kleen authored
gcc should handle this anyways, and it causes problems when sprintf is turned into strcpy by gcc behind our backs and the C fallback version of strcpy is actually defining __builtin_strcpy Then drop -ffreestanding from the main Makefile because it isn't needed anymore and implies -fno-builtin, which is wrong now. (it was only added for x86-64, so dropping it should be safe) Noticed by Roman Zippel Cc: Roman Zippel <zippel@linux-m68k.org> Signed-off-by:
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Andi Kleen authored
We've always had the problem that arguments only did a prefix match, which resulted e.g. in noapic and noapictimer getting confused. Fix the early argument parsing code to always check that arguments are whole words (except for those that take additional arguments of course) I factored out the checking code for that while also makes the code easier to maintain. Signed-off-by:
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Jan Beulich authored
Appearantly a left-over... Signed-off-by:
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Jan Beulich authored
While the modular aspect of the respective i386 patch doesn't apply to x86-64 (as the top level page directory entry is shared between modules and the base kernel), handlers registered with register_die_notifier() are still under similar constraints for touching ioremap()ed or vmalloc()ed memory. The likelihood of this problem becoming visible is of course significantly lower, as the assigned virtual addresses would have to cross a 2**39 byte boundary. This is because the callback gets invoked (a) in the page fault path before the top level page table propagation gets carried out (hence a fault to propagate the top level page table entry/entries mapping to module's code/data would nest infinitly) and (b) in the NMI path, where nested faults must absolutely not happen, since otherwise the IRET from the nested fault re-enables NMIs, potentially resulting in nested NMI occurences. Signed-off-by:
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Andi Kleen authored
The code waits for the GART to clear the TLB flush bit. Use cpu_relax in this time to allow hypervisors to yield the CPU in this time. Signed-off-by:
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Andi Kleen authored
Makes some debugging easier. Signed-off-by:
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Andi Kleen authored
The PM timer path through main_timer_handler doesn't need the delay variable because it figures it out in a different way. Don't try to read it from the PIT. With stopped PIT timer it is even useless. Signed-off-by:
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Ashok Raj authored
Minor cleanup to lend better for physical CPU hotplug. Earlier way of using num_processors as index doesnt fit if CPUs come and go. This makes the code little bit better to read, and helps physical hotplug use the same functions as boot. Reserving CPU0 for BSP is too late to be done in smp_prepare_boot_cpu(). Since logical assignments from MADT is already done via setup_arch()->acpi_boot_init()->parse lapic Signed-off-by:
Ashok Raj <ashok.raj@intel.com> Signed-off-by:
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Jan Beulich authored
Touching of the floating point state in a kernel debugger must be NMI-safe, specifically math_state_restore() must be able to deal with being called out of an NMI context. In order to do that reliably, the context switch code must take care to not leave a window open where the current task's TS_USEDFPU flag and CR0.TS could get out of sync. Signed-off-by:
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Jan Beulich authored
For consistency and to have only a single place of definition, replace set_debug() uses with set_debugreg(), and eliminate the definition of thj former. Signed-off-by:
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Jan Beulich authored
While AMD formally permits multi-byte execution breakpoints, Intel disallows 8-byte as much as 2- or 4-byte ones. Signed-off-by:
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Jan Beulich authored
Fix one place where the previous change of cpu_pda from being an array to being a macro was not properly carried out. Signed-off-by:
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Andi Kleen authored
It conflicts with the struct node in node.h Actually the x86-64 version was there first, but .. Suggested by Jan Beulich Cc: jbeulich@novell.com Signed-off-by:
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Andi Kleen authored
8MB is not really very random, use 1GB (or more with larger page sizes) instead. Also use the low bits of the random generator output now instead of throwing them away. Only enabled on x86-64 right now. Other architectures need to add a suitable STACK_RND_MASK Cc: mingo@elte.hu Signed-off-by:
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Andi Kleen authored
The upcomming gcc 4.2 got a new option -mtune=generic to tune code for both common AMD and Intel CPUs. Use this option when available for generic kernels. On x86-64 it is used with CONFIG_GENERIC_CPU. On i386 it is enabled with CONFIG_X86_GENERIC. It won't affect the base line CPU support in any ways and also not the minimum supported CPU. Signed-off-by:
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Jan Beulich authored
Memory >39bits has a different PUD. Cc: "Tolentino, Matthew E" <matthew.e.tolentino@intel.com> Signed-off-by:
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Andi Kleen authored
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