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  1. 27 Jan, 2010 1 commit
    • David VomLehn's avatar
      MIPS: PowerTV: Fix support for timer interrupts with > 64 external IRQs · 010c108d
      David VomLehn authored
      The MIPS processor is limited to 64 external interrupt sources. Using a
      greater number without IRQ sharing requires reading platform-specific
      registers. On such platforms, reading the IntCtl register to determine
      which interrupt corresponds to a timer interrupt will not work.
      
      On MIPSR2 systems there is a solution - the TI bit in the Cause register,
      specifically indicates that a timer interrupt has occured. This patch uses
      that bit to detect interrupts for MIPSR2 processors, which may be expected
      to work regardless of how the timer interrupt may be routed in the hardware.
      
      Signed-off-by: David VomLehn (dvomlehn@cisco.com)
      To: linux-mips@linux-mips.org
      Patchwork: http://patchwork.linux-mips.org/patch/804/Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
      010c108d
  2. 17 Dec, 2009 1 commit
  3. 24 Jun, 2009 1 commit
  4. 28 Apr, 2009 1 commit
    • Yinghai Lu's avatar
      irq: change ->set_affinity() to return status · d5dedd45
      Yinghai Lu authored
      according to Ingo, change set_affinity() in irq_chip should return int,
      because that way we can handle failure cases in a much cleaner way, in
      the genirq layer.
      
      v2: fix two typos
      
      [ Impact: extend API ]
      Signed-off-by: default avatarYinghai Lu <yinghai@kernel.org>
      Cc: Andrew Morton <akpm@linux-foundation.org>
      Cc: Suresh Siddha <suresh.b.siddha@intel.com>
      Cc: "Eric W. Biederman" <ebiederm@xmission.com>
      Cc: Rusty Russell <rusty@rustcorp.com.au>
      Cc: linux-arch@vger.kernel.org
      LKML-Reference: <49F654E9.4070809@kernel.org>
      Signed-off-by: default avatarIngo Molnar <mingo@elte.hu>
      d5dedd45
  5. 12 Jan, 2009 1 commit
  6. 13 Dec, 2008 1 commit
  7. 11 Oct, 2008 1 commit
  8. 11 Oct, 2007 1 commit
  9. 24 Sep, 2007 1 commit
  10. 12 Jul, 2007 1 commit
    • Kevin D. Kissell's avatar
      [MIPS] SMTC: Interrupt mask backstop hack · 0db34215
      Kevin D. Kissell authored
      To support multiple TC microthreads acting as "CPUs" within a VPE,
      VPE-wide interrupt mask bits must be specially manipulated during
      interrupt handling. To support legacy drivers and interrupt controller
      management code, SMTC has a "backstop" to track and if necessary restore
      the interrupt mask. This has some performance impact on interrupt service
      overhead. Disable it only if you know what you are doing.
      Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
      0db34215
  11. 20 Jun, 2007 1 commit
  12. 06 Feb, 2007 1 commit
  13. 08 Jan, 2007 1 commit
  14. 30 Nov, 2006 2 commits
  15. 06 Nov, 2006 1 commit
  16. 11 Oct, 2006 1 commit
  17. 08 Oct, 2006 1 commit
  18. 27 Sep, 2006 1 commit
  19. 29 Jun, 2006 1 commit
  20. 26 Apr, 2006 1 commit
  21. 19 Apr, 2006 2 commits
  22. 29 Oct, 2005 1 commit
  23. 09 Sep, 2005 1 commit
  24. 16 Apr, 2005 1 commit
    • Linus Torvalds's avatar
      Linux-2.6.12-rc2 · 1da177e4
      Linus Torvalds authored
      Initial git repository build. I'm not bothering with the full history,
      even though we have it. We can create a separate "historical" git
      archive of that later if we want to, and in the meantime it's about
      3.2GB when imported into git - space that would just make the early
      git days unnecessarily complicated, when we don't have a lot of good
      infrastructure for it.
      
      Let it rip!
      1da177e4