An error occurred fetching the project authors.
- 27 Jan, 2010 1 commit
-
-
David VomLehn authored
The MIPS processor is limited to 64 external interrupt sources. Using a greater number without IRQ sharing requires reading platform-specific registers. On such platforms, reading the IntCtl register to determine which interrupt corresponds to a timer interrupt will not work. On MIPSR2 systems there is a solution - the TI bit in the Cause register, specifically indicates that a timer interrupt has occured. This patch uses that bit to detect interrupts for MIPSR2 processors, which may be expected to work regardless of how the timer interrupt may be routed in the hardware. Signed-off-by: David VomLehn (dvomlehn@cisco.com) To: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/804/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
-
- 17 Dec, 2009 1 commit
-
-
Wu Zhangjin authored
This patch add a new section for MIPS to record the block of the hardirq handling for function graph tracer(print_graph_irq) via adding the __irq_entry annotation to the the entrypoints of the hardirqs(the block with irq_enter()...irq_exit()). Thanks goes to Steven & Frederic Weisbecker for their feedbacks. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Cc: Steven Rostedt <rostedt@goodmis.org> Cc: Nicholas Mc Guire <der.herr@hofr.at> Cc: zhangfx@lemote.com Cc: Wu Zhangjin <wuzhangjin@gmail.com> Cc: Ingo Molnar <mingo@elte.hu> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Frederic Weisbecker <fweisbec@gmail.com> Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Reviewed-by: Frederic Weisbecker <fweisbec@gmail.com> Patchwork: http://patchwork.linux-mips.org/patch/676/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
-
- 24 Jun, 2009 1 commit
-
-
Ralf Baechle authored
Some of the were relying into smp.h being dragged in by another header which of course is fragile. <asm/cpu-info.h> uses smp_processor_id() only in macros and including smp.h there leads to an include loop, so don't change cpu-info.h. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
-
- 28 Apr, 2009 1 commit
-
-
Yinghai Lu authored
according to Ingo, change set_affinity() in irq_chip should return int, because that way we can handle failure cases in a much cleaner way, in the genirq layer. v2: fix two typos [ Impact: extend API ] Signed-off-by: Yinghai Lu <yinghai@kernel.org> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Suresh Siddha <suresh.b.siddha@intel.com> Cc: "Eric W. Biederman" <ebiederm@xmission.com> Cc: Rusty Russell <rusty@rustcorp.com.au> Cc: linux-arch@vger.kernel.org LKML-Reference: <49F654E9.4070809@kernel.org> Signed-off-by: Ingo Molnar <mingo@elte.hu>
-
- 12 Jan, 2009 1 commit
-
-
Mike Travis authored
Impact: cleanup, update to new cpumask API Irq_desc.affinity and irq_desc.pending_mask are now cpumask_var_t's so access to them should be using the new cpumask API. Signed-off-by: Mike Travis <travis@sgi.com>
-
- 13 Dec, 2008 1 commit
-
-
Rusty Russell authored
Impact: change existing irq_chip API Not much point with gentle transition here: the struct irq_chip's setaffinity method signature needs to change. Fortunately, not widely used code, but hits a few architectures. Note: In irq_select_affinity() I save a temporary in by mangling irq_desc[irq].affinity directly. Ingo, does this break anything? (Folded in fix from KOSAKI Motohiro) Signed-off-by: Rusty Russell <rusty@rustcorp.com.au> Signed-off-by: Mike Travis <travis@sgi.com> Reviewed-by: Grant Grundler <grundler@parisc-linux.org> Acked-by: Ingo Molnar <mingo@redhat.com> Cc: ralf@linux-mips.org Cc: grundler@parisc-linux.org Cc: jeremy@xensource.com Cc: KOSAKI Motohiro <kosaki.motohiro@jp.fujitsu.com>
-
- 11 Oct, 2008 1 commit
-
-
Ralf Baechle authored
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
-
- 11 Oct, 2007 1 commit
-
-
Kevin D. Kissell authored
Signed-off-by: Kevin D. Kissell <kevink@mips.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
-
- 24 Sep, 2007 1 commit
-
-
Ralf Baechle authored
Issue reported and original patch by Kevin Kissel, cleaner (imho) implementation by me. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
-
- 12 Jul, 2007 1 commit
-
-
Kevin D. Kissell authored
To support multiple TC microthreads acting as "CPUs" within a VPE, VPE-wide interrupt mask bits must be specially manipulated during interrupt handling. To support legacy drivers and interrupt controller management code, SMTC has a "backstop" to track and if necessary restore the interrupt mask. This has some performance impact on interrupt service overhead. Disable it only if you know what you are doing. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
-
- 20 Jun, 2007 1 commit
-
-
Ralf Baechle authored
For some platforms it's definitions may conflict. So that's the one-liner. The rest is 10 square kilometers of collateral damage fixup this include used to paper over. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
-
- 06 Feb, 2007 1 commit
-
-
Atsushi Nemoto authored
Move I8259A_IRQ_BASE from asm/i8259.h to asm/mach-generic/irq.h and make it really customizable. And remove I8259_IRQ_BASE declared on some platforms. Currently only NEC_CMBVR4133 is using custom I8259A_IRQ_BASE value. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
-
- 08 Jan, 2007 1 commit
-
-
Atsushi Nemoto authored
Pass "irq" to __DO_IRQ_SMTC_HOOK() macro. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
-
- 30 Nov, 2006 2 commits
-
-
Atsushi Nemoto authored
Now we have both function and macro version of do_IRQ() and the former is used only by DEC and non-preemptive kernel. This patch makes everyone use the macro version and removes the function version. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
-
Atsushi Nemoto authored
Further incorporation of generic irq framework. Replacing __do_IRQ() by proper flow handler would make the irq handling path a bit simpler and faster. * use generic_handle_irq() instead of __do_IRQ(). * use handle_level_irq for obvious level-type irq chips. * use handle_percpu_irq for irqs marked as IRQ_PER_CPU. * setup .eoi routine for irq chips possibly used with handle_percpu_irq. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
-
- 06 Nov, 2006 1 commit
-
-
Ralf Baechle authored
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
-
- 11 Oct, 2006 1 commit
-
-
Atsushi Nemoto authored
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
-
- 08 Oct, 2006 1 commit
-
-
Ralf Baechle authored
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
-
- 27 Sep, 2006 1 commit
-
-
Ralf Baechle authored
CONFIG_IRQ_PER_CPU now controls the IRQ_PER_CPU stuff. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
-
- 29 Jun, 2006 1 commit
-
-
Ralf Baechle authored
Without SMTC on non-Malta will blow up. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
-
- 26 Apr, 2006 1 commit
-
-
David Woodhouse authored
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
-
- 19 Apr, 2006 2 commits
-
-
Ralf Baechle authored
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
-
Ralf Baechle authored
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
-
- 29 Oct, 2005 1 commit
-
-
Ralf Baechle authored
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
-
- 09 Sep, 2005 1 commit
-
-
Kenji Kaneshige authored
The function prototype for handle_IRQ_event() in a few architctures is not needed because they use GENERIC_HARDIRQ. Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
-
- 16 Apr, 2005 1 commit
-
-
Linus Torvalds authored
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
-