MUSB: tusb patches 2/2 -- whitespace etc

Whitespace, indentation, and line length fixes.
Constify the gadget ep0 method table.

drivers/usb/musb/davinci.c

@@ -345,8 +345,7 @@ int __devinit musb_platform_init(struct musb *musb)
 	/* NOTE:  irqs are in mixed mode, not bypass to pure-musb */
 	pr_debug("DaVinci OTG revision %08x phy %03x control %02x\n",
 		revision,
-		 musb_readl((void *__iomem) IO_ADDRESS(
-				 USBPHY_CTL_PADDR), 0x00),
+		__raw_readl((void *__iomem) IO_ADDRESS(USBPHY_CTL_PADDR)),
 		musb_readb(tibase, DAVINCI_USB_CTRL_REG));
 
 	musb->isr = davinci_interrupt;

drivers/usb/musb/g_ep0.c

@@ -814,8 +814,8 @@ static void *musb_g_ep0_alloc_buffer(struct usb_ep *ep, unsigned bytes,
 	return kmalloc(bytes, gfp_flags);
 }
 
-static void musb_g_ep0_free_buffer(struct usb_ep *ep, void *address, dma_addr_t dma,
-			  unsigned bytes)
+static void musb_g_ep0_free_buffer(struct usb_ep *ep, void *address,
+			dma_addr_t dma, unsigned bytes)
 {
 	kfree(address);
 }
@@ -955,7 +955,7 @@ cleanup:
 	return status;
 }
 
-struct usb_ep_ops musb_g_ep0_ops = {
+const struct usb_ep_ops musb_g_ep0_ops = {
 	.enable		= musb_g_ep0_enable,
 	.disable	= musb_g_ep0_disable,
 	.alloc_request	= musb_alloc_request,

drivers/usb/musb/musb_gadget.c

@@ -304,10 +304,10 @@ static void txstate(struct musb *pThis, struct musb_request *req)
 						// against programming guide
 				}
 				else
-					wCsrVal |= (MGC_M_TXCSR_AUTOSET |
-						    MGC_M_TXCSR_DMAENAB |
-						    MGC_M_TXCSR_DMAMODE |
-						    MGC_M_TXCSR_MODE);
+					wCsrVal |= (MGC_M_TXCSR_AUTOSET
+							| MGC_M_TXCSR_DMAENAB
+							| MGC_M_TXCSR_DMAMODE
+							| MGC_M_TXCSR_MODE);
 
 				wCsrVal &= ~MGC_M_TXCSR_P_UNDERRUN;
 				MGC_WriteCsr16(pBase, MGC_O_HDRC_TXCSR, bEnd,
@@ -694,9 +694,8 @@ static void rxstate(struct musb *pThis, struct musb_request *req)
 			}
 #endif
 
-			musb_read_fifo(pEnd->hw_ep, wFifoCount,
-				   (u8 *) (pRequest->buf +
-					   pRequest->actual));
+			musb_read_fifo(pEnd->hw_ep, wFifoCount, (u8 *)
+					(pRequest->buf + pRequest->actual));
 			pRequest->actual += wFifoCount;
 
 			/* REVISIT if we left anything in the fifo, flush
@@ -778,9 +777,9 @@ void musb_g_rx(struct musb *pThis, u8 bEnd)
 	}
 
 	if (dma && (wCsrVal & MGC_M_RXCSR_DMAENAB)) {
-		wCsrVal &= ~(MGC_M_RXCSR_AUTOCLEAR |
-			     MGC_M_RXCSR_DMAENAB |
-			     MGC_M_RXCSR_DMAMODE);
+		wCsrVal &= ~(MGC_M_RXCSR_AUTOCLEAR
+				| MGC_M_RXCSR_DMAENAB
+				| MGC_M_RXCSR_DMAMODE);
 		MGC_WriteCsr16(pBase, MGC_O_HDRC_RXCSR, bEnd,
 			MGC_M_RXCSR_P_WZC_BITS | wCsrVal);
 
@@ -793,8 +792,9 @@ void musb_g_rx(struct musb *pThis, u8 bEnd)
 
 #if defined(CONFIG_USB_INVENTRA_DMA) || defined(CONFIG_USB_TUSB_OMAP_DMA)
 		/* Autoclear doesn't clear RxPktRdy for short packets */
-		if ((dma->bDesiredMode == 0) ||
-		    (dma->dwActualLength & (pEnd->wPacketSize - 1))) {
+		if ((dma->bDesiredMode == 0)
+				|| (dma->dwActualLength
+					& (pEnd->wPacketSize - 1))) {
 			/* ack the read! */
 			wCsrVal &= ~MGC_M_RXCSR_RXPKTRDY;
 			MGC_WriteCsr16(pBase, MGC_O_HDRC_RXCSR, bEnd, wCsrVal);
@@ -1602,11 +1602,13 @@ static inline void __devinit musb_g_init_endpoints(struct musb *pThis)
 			count++;
 		} else {
 			if (hw_ep->wMaxPacketSizeTx) {
-				init_peripheral_ep(pThis, &hw_ep->ep_in, bEnd, 1);
+				init_peripheral_ep(pThis, &hw_ep->ep_in,
+							bEnd, 1);
 				count++;
 			}
 			if (hw_ep->wMaxPacketSizeRx) {
-				init_peripheral_ep(pThis, &hw_ep->ep_out, bEnd, 0);
+				init_peripheral_ep(pThis, &hw_ep->ep_out,
+							bEnd, 0);
 				count++;
 			}
 		}

drivers/usb/musb/musb_gadget.h

@@ -94,7 +94,7 @@ static inline struct usb_request *next_request(struct musb_ep *ep)
 extern void musb_g_tx(struct musb *pThis, u8 bEnd);
 extern void musb_g_rx(struct musb *pThis, u8 bEnd);
 
-extern struct usb_ep_ops musb_g_ep0_ops;
+extern const struct usb_ep_ops musb_g_ep0_ops;
 
 extern int musb_gadget_setup(struct musb *);
 extern void musb_gadget_cleanup(struct musb *);

drivers/usb/musb/musb_host.c

@@ -757,16 +757,13 @@ static void musb_ep_program(struct musb *pThis, u8 bEnd,
 		/* target addr and (for multipoint) hub addr/port */
 		if (pThis->bIsMultipoint) {
 			musb_writeb(pBase,
-				   MGC_BUSCTL_OFFSET(bEnd,
-						     MGC_O_HDRC_TXFUNCADDR),
+				MGC_BUSCTL_OFFSET(bEnd, MGC_O_HDRC_TXFUNCADDR),
 				qh->addr_reg);
 			musb_writeb(pBase,
-				   MGC_BUSCTL_OFFSET(bEnd,
-						     MGC_O_HDRC_TXHUBADDR),
+				MGC_BUSCTL_OFFSET(bEnd, MGC_O_HDRC_TXHUBADDR),
 				qh->h_addr_reg);
 			musb_writeb(pBase,
-				   MGC_BUSCTL_OFFSET(bEnd,
-						     MGC_O_HDRC_TXHUBPORT),
+				MGC_BUSCTL_OFFSET(bEnd, MGC_O_HDRC_TXHUBPORT),
 				qh->h_port_reg);
 		} else
 			musb_writeb(pBase, MGC_O_HDRC_FADDR, qh->addr_reg);
@@ -777,8 +774,8 @@ static void musb_ep_program(struct musb *pThis, u8 bEnd,
 						qh->type_reg);
 			if (can_bulk_split(pThis, qh->type))
 				MGC_WriteCsr16(pBase, MGC_O_HDRC_TXMAXP, bEnd,
-					       wPacketSize |
-					       ((pEnd->wMaxPacketSizeTx /
+					wPacketSize
+					| ((pEnd->wMaxPacketSizeTx /
 						wPacketSize) - 1) << 11);
 			else
 				MGC_WriteCsr16(pBase, MGC_O_HDRC_TXMAXP, bEnd,
@@ -804,9 +801,9 @@ static void musb_ep_program(struct musb *pThis, u8 bEnd,
 
 			/* clear previous state */
 			wCsr = MGC_ReadCsr16(pBase, MGC_O_HDRC_TXCSR, bEnd);
-			wCsr &= ~(MGC_M_TXCSR_AUTOSET |
-				  MGC_M_TXCSR_DMAMODE |
-				  MGC_M_TXCSR_DMAENAB);
+			wCsr &= ~(MGC_M_TXCSR_AUTOSET
+				| MGC_M_TXCSR_DMAMODE
+				| MGC_M_TXCSR_DMAENAB);
                         wCsr |= MGC_M_TXCSR_MODE;
 			MGC_WriteCsr16(pBase, MGC_O_HDRC_TXCSR, bEnd,
 				wCsr | MGC_M_TXCSR_MODE);
@@ -820,14 +817,14 @@ static void musb_ep_program(struct musb *pThis, u8 bEnd,
 
 
 			if (pDmaChannel->bDesiredMode == 0) {
-				wCsr &= ~(MGC_M_TXCSR_AUTOSET |
-					  MGC_M_TXCSR_DMAMODE);
+				wCsr &= ~(MGC_M_TXCSR_AUTOSET
+					| MGC_M_TXCSR_DMAMODE);
 				wCsr |= (MGC_M_TXCSR_DMAENAB);
 					// against programming guide
 			} else
-				wCsr |= (MGC_M_TXCSR_AUTOSET |
-					 MGC_M_TXCSR_DMAENAB |
-					 MGC_M_TXCSR_DMAMODE);
+				wCsr |= (MGC_M_TXCSR_AUTOSET
+					| MGC_M_TXCSR_DMAENAB
+					| MGC_M_TXCSR_DMAMODE);
 
 			MGC_WriteCsr16(pBase, MGC_O_HDRC_TXCSR, bEnd, wCsr);
 
@@ -891,15 +888,15 @@ static void musb_ep_program(struct musb *pThis, u8 bEnd,
 			qh->segsize = wLoadCount;
 			musb_write_fifo(pEnd, wLoadCount, pBuffer);
 			wCsr = MGC_ReadCsr16(pBase, MGC_O_HDRC_TXCSR, bEnd);
-			wCsr &=
-			    ~(MGC_M_TXCSR_DMAENAB | MGC_M_TXCSR_DMAMODE |
-			      MGC_M_TXCSR_AUTOSET);
+			wCsr &= ~(MGC_M_TXCSR_DMAENAB
+				| MGC_M_TXCSR_DMAMODE
+				| MGC_M_TXCSR_AUTOSET);
 			/* write CSR */
 			wCsr |= MGC_M_TXCSR_MODE;
 
 			if (bEnd)
-				MGC_WriteCsr16(pBase, MGC_O_HDRC_TXCSR, bEnd,
-					       wCsr);
+				MGC_WriteCsr16(pBase, MGC_O_HDRC_TXCSR,
+						bEnd, wCsr);
 
 		}
 
@@ -984,14 +981,14 @@ static u8 musb_h_ep0_continue(struct musb *pThis,
 	u16 wFifoCount = 0;
 	struct musb_hw_ep	*pEnd = pThis->control_ep;
 	struct musb_qh		*qh = pEnd->in_qh;
-	struct usb_ctrlrequest *pRequest =
-	    (struct usb_ctrlrequest *)pUrb->setup_packet;
+	struct usb_ctrlrequest	*pRequest;
 
+	pRequest = (struct usb_ctrlrequest *) pUrb->setup_packet;
 	if (MGC_END0_IN == pThis->bEnd0Stage) {
 		/* we are receiving from peripheral */
 		pFifoDest = pUrb->transfer_buffer + pUrb->actual_length;
-		wFifoCount = min(wCount, ((u16)
-			 (pUrb->transfer_buffer_length - pUrb->actual_length)));
+		wFifoCount = min(wCount, ((u16) (pUrb->transfer_buffer_length
+					- pUrb->actual_length)));
 		if (wFifoCount < wCount)
 			pUrb->status = -EOVERFLOW;
 
@@ -1030,15 +1027,13 @@ static u8 musb_h_ep0_continue(struct musb *pThis,
 		} else if (pRequest->wLength
 				&& (MGC_END0_START == pThis->bEnd0Stage)) {
 			pThis->bEnd0Stage = MGC_END0_OUT;
-			pFifoDest = (u8 *) (pUrb->transfer_buffer +
-				    pUrb->actual_length);
-			wFifoCount =
-			    min(qh->maxpacket,
-				((u16)
-				 (pUrb->transfer_buffer_length -
-				  pUrb->actual_length)));
-			DBG(3, "Sending %d bytes to %p\n", wFifoCount,
-			    pFifoDest);
+			pFifoDest = (u8 *) (pUrb->transfer_buffer
+					+ pUrb->actual_length);
+			wFifoCount = min(qh->maxpacket, ((u16)
+					(pUrb->transfer_buffer_length
+					- pUrb->actual_length)));
+			DBG(3, "Sending %d bytes to %p\n",
+					wFifoCount, pFifoDest);
 			musb_write_fifo(pEnd, wFifoCount, pFifoDest);
 
 			qh->segsize = wFifoCount;
@@ -1152,13 +1147,14 @@ irqreturn_t musb_h_ep0_irq(struct musb *pThis)
 		/* call common logic and prepare response */
 		if (musb_h_ep0_continue(pThis, wCount, pUrb)) {
 			/* more packets required */
-			wCsrVal = (MGC_END0_IN == pThis->bEnd0Stage) ?
-			    MGC_M_CSR0_H_REQPKT : MGC_M_CSR0_TXPKTRDY;
+			wCsrVal = (MGC_END0_IN == pThis->bEnd0Stage)
+				?  MGC_M_CSR0_H_REQPKT : MGC_M_CSR0_TXPKTRDY;
 		} else {
 			/* data transfer complete; perform status phase */
-			wCsrVal = MGC_M_CSR0_H_STATUSPKT |
-			    (usb_pipeout(pUrb->pipe) ? MGC_M_CSR0_H_REQPKT :
-			     MGC_M_CSR0_TXPKTRDY);
+			wCsrVal = MGC_M_CSR0_H_STATUSPKT
+				| (usb_pipeout(pUrb->pipe)
+					? MGC_M_CSR0_H_REQPKT
+					: MGC_M_CSR0_TXPKTRDY);
 			/* flag status stage */
 			pThis->bEnd0Stage = MGC_END0_STATUS;
 
@@ -1188,7 +1184,8 @@ done:
 	DMA Isr (transfer complete) -> TxAvail()
 		- Stop DMA (~DmaEnab)	(<--- Alert ... currently happens
 					only in musb_cleanup_urb)
-	     - TxPktRdy has to be set in mode 0 or for short packets in mode 1.
+		- TxPktRdy has to be set in mode 0 or for
+			short packets in mode 1.
 */
 
 #endif
@@ -1457,8 +1454,8 @@ void musb_host_rx(struct musb *pThis, u8 bEnd)
 
 	nPipe = pUrb->pipe;
 
-	DBG(5, "<== hw %d rxcsr %04x, urb actual %d (+dma %zd)\n", bEnd,
-	    wRxCsrVal, pUrb->actual_length,
+	DBG(5, "<== hw %d rxcsr %04x, urb actual %d (+dma %zd)\n",
+		bEnd, wRxCsrVal, pUrb->actual_length,
 		dma ? dma->dwActualLength : 0);
 
 	/* check for errors, concurrent stall & unlink is not really
@@ -1560,10 +1557,10 @@ void musb_host_rx(struct musb *pThis, u8 bEnd)
 		bDone = (pUrb->actual_length >= pUrb->transfer_buffer_length)
 			|| (dma->dwActualLength & (qh->maxpacket - 1));
 
-		wVal &= ~(MGC_M_RXCSR_DMAENAB |
-			  MGC_M_RXCSR_H_AUTOREQ |
-			  MGC_M_RXCSR_AUTOCLEAR |
-			  MGC_M_RXCSR_RXPKTRDY);
+		wVal &= ~(MGC_M_RXCSR_DMAENAB
+			| MGC_M_RXCSR_H_AUTOREQ
+			| MGC_M_RXCSR_AUTOCLEAR
+			| MGC_M_RXCSR_RXPKTRDY);
 
 		MGC_WriteCsr16(pBase, MGC_O_HDRC_RXCSR, bEnd, wVal);
 		MGC_WriteCsr16(pBase, MGC_O_HDRC_RXCSR, bEnd, wVal);
@@ -1651,14 +1648,11 @@ void musb_host_rx(struct musb *pThis, u8 bEnd)
 			wVal = MGC_ReadCsr16(pBase, MGC_O_HDRC_RXCSR, bEnd);
 			wVal &= ~MGC_M_RXCSR_H_REQPKT;
 
-			if (dma->bDesiredMode == 0) {
+			if (dma->bDesiredMode == 0)
 				wVal &= ~MGC_M_RXCSR_H_AUTOREQ;
-				wVal |= (MGC_M_RXCSR_AUTOCLEAR |
-					 MGC_M_RXCSR_DMAENAB);
-			} else
-				wVal |= (MGC_M_RXCSR_H_AUTOREQ |
-					 MGC_M_RXCSR_AUTOCLEAR |
-					 MGC_M_RXCSR_DMAENAB);
+			else
+				wVal |= MGC_M_RXCSR_H_AUTOREQ;
+			wVal |= MGC_M_RXCSR_AUTOCLEAR | MGC_M_RXCSR_DMAENAB;
 
 			MGC_WriteCsr16(pBase, MGC_O_HDRC_RXCSR, bEnd,
 				MGC_M_RXCSR_H_WZC_BITS | wVal);

drivers/usb/musb/musb_procfs.c

@@ -306,7 +306,8 @@ dump_end_info(struct musb *pThis, u8 bEnd, char *aBuffer, unsigned max)
 					char		tmp[16];
 
 					base = pThis->ctrl_base;
-					ram = base + DAVINCI_RXCPPI_STATERAM_OFFSET(cppi);
+					ram = DAVINCI_RXCPPI_STATERAM_OFFSET(
+							cppi) + base;
 					snprintf(tmp, sizeof tmp, "%d left, ",
 						musb_readl(base,
 						DAVINCI_RXCPPI_BUFCNT0_REG
@@ -387,7 +388,8 @@ dump_end_info(struct musb *pThis, u8 bEnd, char *aBuffer, unsigned max)
 					void __iomem	*ram;
 
 					base = pThis->ctrl_base;
-					ram = base + DAVINCI_TXCPPI_STATERAM_OFFSET(cppi);
+					ram = DAVINCI_RXCPPI_STATERAM_OFFSET(
+							cppi) + base;
 					code = snprintf(buf, max,
 						"    tx dma%d: "
 						"%08x %08x, %08x %08x; "
@@ -614,36 +616,32 @@ static int musb_proc_write(struct file *file, const char __user *buffer,
 	switch (cmd) {
 	case 'C':
 		if (pBase) {
-			bReg =
-			    musb_readb(pBase,
-				      MGC_O_HDRC_POWER) | MGC_M_POWER_SOFTCONN;
+			bReg = musb_readb(pBase, MGC_O_HDRC_POWER)
+					| MGC_M_POWER_SOFTCONN;
 			musb_writeb(pBase, MGC_O_HDRC_POWER, bReg);
 		}
 		break;
 
 	case 'c':
 		if (pBase) {
-			bReg =
-			    musb_readb(pBase,
-				      MGC_O_HDRC_POWER) & ~MGC_M_POWER_SOFTCONN;
+			bReg = musb_readb(pBase, MGC_O_HDRC_POWER)
+					& ~MGC_M_POWER_SOFTCONN;
 			musb_writeb(pBase, MGC_O_HDRC_POWER, bReg);
 		}
 		break;
 
 	case 'I':
 		if (pBase) {
-			bReg =
-			    musb_readb(pBase,
-				      MGC_O_HDRC_POWER) | MGC_M_POWER_HSENAB;
+			bReg = musb_readb(pBase, MGC_O_HDRC_POWER)
+					| MGC_M_POWER_HSENAB;
 			musb_writeb(pBase, MGC_O_HDRC_POWER, bReg);
 		}
 		break;
 
 	case 'i':
 		if (pBase) {
-			bReg =
-			    musb_readb(pBase,
-				      MGC_O_HDRC_POWER) & ~MGC_M_POWER_HSENAB;
+			bReg = musb_readb(pBase, MGC_O_HDRC_POWER)
+					& ~MGC_M_POWER_HSENAB;
 			musb_writeb(pBase, MGC_O_HDRC_POWER, bReg);
 		}
 		break;
@@ -677,8 +675,8 @@ static int musb_proc_write(struct file *file, const char __user *buffer,
 	case 'D':{
 			if (count > 1) {
 				char digits[8], *p = digits;
-				int i = 0, level = 0, sign = 1, len =
-				    min(count - 1, (unsigned long)8);
+				int i = 0, level = 0, sign = 1;
+				int len = min(count - 1, (unsigned long)8);
 
 				copy_from_user(&digits, &buffer[1], len);
 

drivers/usb/musb/otg.c

@@ -364,7 +364,8 @@ void MGC_OtgMachineInputsChanged(struct otg_machine *pMachine,
 				otg_state_changed(pMachine->musb,
 						OTG_STATE_A_WAIT_BCON);
 				mod_timer(&pMachine->Timer, jiffies
-					+ msecs_to_jiffies(MGC_OTG_T_A_WAIT_BCON));
+					+ msecs_to_jiffies(
+						MGC_OTG_T_A_WAIT_BCON));
 			}
 		}
 		break;

drivers/usb/musb/plat_uds.c

@@ -166,7 +166,6 @@ MODULE_PARM_DESC(debug, "initial debug message level");
 
 const char musb_driver_name[] = "musb_hdrc";
 
-/* this module is always GPL, the gadget might not... */
 MODULE_DESCRIPTION(DRIVER_INFO);
 MODULE_AUTHOR(DRIVER_AUTHOR);
 MODULE_LICENSE("GPL");
@@ -1368,8 +1367,8 @@ void musb_dma_completion(struct musb *musb, u8 bLocalEnd, u8 bTransmit)
 
 #ifdef CONFIG_SYSFS
 
-static ssize_t musb_mode_show(struct device *dev,
-				  struct device_attribute *attr, char *buf)
+static ssize_t
+musb_mode_show(struct device *dev, struct device_attribute *attr, char *buf)
 {
 	struct musb *musb = dev_to_musb(dev);
 	unsigned long flags;
@@ -1393,8 +1392,8 @@ static ssize_t musb_mode_show(struct device *dev,
 }
 static DEVICE_ATTR(mode, S_IRUGO, musb_mode_show, NULL);
 
-static ssize_t musb_cable_show(struct device *dev,
-			       struct device_attribute *attr, char *buf)
+static ssize_t
+musb_cable_show(struct device *dev, struct device_attribute *attr, char *buf)
 {
 	struct musb *musb = dev_to_musb(dev);
 	char *v1= "", *v2 = "?";

drivers/usb/musb/tusb6010.c

@@ -284,17 +284,16 @@ irqreturn_t tusb_interrupt(int irq, void *__hci, struct pt_regs *r)
 	}
 
 	/* VBUS state change */
-	if ((int_src & TUSB_INT_SRC_VBUS_SENSE_CHNG) ||
-	    (int_src & TUSB_INT_SRC_USB_IP_VBUS_ERR))
-	{
+	if ((int_src & TUSB_INT_SRC_VBUS_SENSE_CHNG)
+			|| (int_src & TUSB_INT_SRC_USB_IP_VBUS_ERR)) {
 		musb->status |= MUSB_VBUS_STATUS_CHG;
 		schedule_work(&musb->irq_work);
 
 #if 0
 		DBG(3, "tusb: VBUS changed. VBUS state %d\n",
 			(otg_stat & TUSB_DEV_OTG_STAT_VBUS_SENSE) ? 1 : 0);
-		if (!(otg_stat & TUSB_DEV_OTG_STAT_VBUS_SENSE) &&
-		    !(otg_stat & TUSB_DEV_OTG_STAT_ID_STATUS)) {
+		if (!(otg_stat & TUSB_DEV_OTG_STAT_VBUS_SENSE)
+				&& !(otg_stat & TUSB_DEV_OTG_STAT_ID_STATUS)) {
 			/* VBUS went off and ID pin is down */
 			DBG(3, "tusb: No VBUS, starting session\n");
 			/* Start session again, VBUS will be enabled */
@@ -307,8 +306,9 @@ irqreturn_t tusb_interrupt(int irq, void *__hci, struct pt_regs *r)
 	/* ID pin change */
 	if (int_src & TUSB_INT_SRC_ID_STATUS_CHNG) {
 		DBG(3, "tusb: ID pin changed. State is %d\n",
-		    (musb_readl(base, TUSB_DEV_OTG_STAT) &
-		     TUSB_DEV_OTG_STAT_ID_STATUS) ? 1 : 0);
+			(musb_readl(base, TUSB_DEV_OTG_STAT)
+				& TUSB_DEV_OTG_STAT_ID_STATUS)
+			? 1 : 0);
 	}
 
 	/* OTG timer expiration */
@@ -394,8 +394,7 @@ void musb_platform_enable(struct musb * musb)
 	musb_writel(base, TUSB_GPIO_INT_CLEAR, 0x1ff);
 
 	/* Acknowledge pending interrupt(s) */
-	musb_writel(base, TUSB_INT_SRC_CLEAR,
-		    ~TUSB_INT_MASK_RESERVED_BITS);
+	musb_writel(base, TUSB_INT_SRC_CLEAR, ~TUSB_INT_MASK_RESERVED_BITS);
 
 #if 0
 	/* Set OTG timer for about one second */

drivers/usb/musb/tusb6010_omap.c

@@ -187,8 +187,8 @@ static void tusb_omap_dma_cb(int lch, u16 ch_status, void *data)
 	 * REVISIT: This same problem may occur with other MUSB dma as well.
 	 * Easy to test with g_ether by pinging the MUSB board with ping -s54.
 	 */
-	if ((chdat->transfer_len < chdat->packet_sz) ||
-	    (chdat->transfer_len % chdat->packet_sz != 0)) {
+	if ((chdat->transfer_len < chdat->packet_sz)
+			|| (chdat->transfer_len % chdat->packet_sz != 0)) {
 		u16	csr;
 
 		if (chdat->tx) {
@@ -283,10 +283,10 @@ static int tusb_omap_dma_program(struct dma_channel *channel, u16 packet_sz,
 		ch, dma_addr, transfer_len, packet_sz, rndis_mode);
 
 	/* Since we're recycling dma areas, we need to clean or invalidate */
-	if (chdat->tx) {
+	if (chdat->tx)
 		consistent_sync(phys_to_virt(dma_addr), len,
 				DMA_TO_DEVICE);
-	} else
+	else
 		consistent_sync(phys_to_virt(dma_addr), len,
 				DMA_FROM_DEVICE);
 
@@ -296,7 +296,7 @@ static int tusb_omap_dma_program(struct dma_channel *channel, u16 packet_sz,
 	if (chdat->tx) {
 		dma_params.data_type	= OMAP_DMA_DATA_TYPE_S32;
 		dma_params.elem_count	= 8;		/* 8x32-bit burst */
-		dma_params.frame_count	= transfer_len / 32; /* Burst sz frame */
+		dma_params.frame_count	= transfer_len / 32; /* Burst sz */
 
 		dma_params.src_amode	= OMAP_DMA_AMODE_POST_INC;
 		dma_params.src_start	= (unsigned long)dma_addr;
@@ -317,7 +317,7 @@ static int tusb_omap_dma_program(struct dma_channel *channel, u16 packet_sz,
 	} else {
 		dma_params.data_type	= OMAP_DMA_DATA_TYPE_S32;
 		dma_params.elem_count	= 8;		/* 8x32-bit burst */
-		dma_params.frame_count	= transfer_len / 32; /* Burst sz frame */
+		dma_params.frame_count	= transfer_len / 32; /* Burst sz */
 
 		dma_params.src_amode	= OMAP_DMA_AMODE_DOUBLE_IDX;
 		dma_params.src_start	= (unsigned long)fifo;
@@ -548,8 +548,7 @@ tusb_omap_dma_allocate(struct dma_controller *c,
 			goto free_dmareq;
 
 		ret = omap_request_dma(chdat->sync_dev, dev_name,
-				       tusb_omap_dma_cb,
-				       channel, &chdat->ch);
+				tusb_omap_dma_cb, channel, &chdat->ch);
 		if (ret != 0)
 			goto free_dmareq;
 	} else if (tusb_dma->ch == -1) {
@@ -558,8 +557,7 @@ tusb_omap_dma_allocate(struct dma_controller *c,
 
 		/* Callback data gets set later in the shared dmareq case */
 		ret = omap_request_dma(tusb_dma->sync_dev, "TUSB shared",
-				       tusb_omap_dma_cb,
-				       NULL, &tusb_dma->ch);
+				tusb_omap_dma_cb, NULL, &tusb_dma->ch);
 		if (ret != 0)
 			goto free_dmareq;
 
@@ -665,9 +663,9 @@ tusb_omap_dma_init(struct musb *musb, void __iomem *base)
 	musb_writel(musb->ctrl_base, TUSB_DMA_EP_MAP, 0);
 
 	musb_writel(tusb_base, TUSB_DMA_REQ_CONF,
-		    TUSB_DMA_REQ_CONF_BURST_SIZE(2) |
-		    TUSB_DMA_REQ_CONF_DMA_REQ_EN(0x3f) |
-		    TUSB_DMA_REQ_CONF_DMA_REQ_ASSER(2));
+		TUSB_DMA_REQ_CONF_BURST_SIZE(2)
+		| TUSB_DMA_REQ_CONF_DMA_REQ_EN(0x3f)
+		| TUSB_DMA_REQ_CONF_DMA_REQ_ASSER(2));
 
 	tusb_dma = kzalloc(sizeof(struct tusb_omap_dma), GFP_KERNEL);
 	if (!tusb_dma)