MUSB: tusb patches 2/2 -- whitespace etc

Whitespace, indentation, and line length fixes.
Constify the gadget ep0 method table.

drivers/usb/musb/cppi_dma.c

@@ -978,9 +978,9 @@ static int cppi_rx_scan(struct cppi *cppi, unsigned ch)
 
 		DBG(5, "C/RXBD %08x: nxt %08x buf %08x "
 			"off.len %08x opt.len %08x (%d)\n",
-			 bd->dma, bd->hNext, bd->buffPtr,
-			 bd->bOffBLen, bd->hOptions,
-			 rx->actualLen);
+			bd->dma, bd->hNext, bd->buffPtr,
+			bd->bOffBLen, bd->hOptions,
+			rx->actualLen);
 
 		/* actual packet received length */
 		if ((bd->hOptions & CPPI_SOP_SET) && !completed)

drivers/usb/musb/davinci.c

@@ -321,9 +321,9 @@ int __devinit musb_platform_init(struct musb *musb)
 		return -ENODEV;
 #endif
 
-	 /* returns zero if e.g. not clocked */
-	 revision = musb_readl(tibase, DAVINCI_USB_VERSION_REG);
-	 if (revision == 0)
+	/* returns zero if e.g. not clocked */
+	revision = musb_readl(tibase, DAVINCI_USB_VERSION_REG);
+	if (revision == 0)
 		return -ENODEV;
 
 	/* note that transceiver issues make us want to charge
@@ -344,10 +344,9 @@ int __devinit musb_platform_init(struct musb *musb)
 
 	/* NOTE:  irqs are in mixed mode, not bypass to pure-musb */
 	pr_debug("DaVinci OTG revision %08x phy %03x control %02x\n",
-		 revision,
-		 musb_readl((void *__iomem) IO_ADDRESS(
-				 USBPHY_CTL_PADDR), 0x00),
-		 musb_readb(tibase, DAVINCI_USB_CTRL_REG));
+		revision,
+		__raw_readl((void *__iomem) IO_ADDRESS(USBPHY_CTL_PADDR)),
+		musb_readb(tibase, DAVINCI_USB_CTRL_REG));
 
 	musb->isr = davinci_interrupt;
 	return 0;

drivers/usb/musb/g_ep0.c

@@ -88,11 +88,11 @@ static int service_tx_status_request(
 #ifdef CONFIG_USB_MUSB_OTG
 		if (pThis->g.is_otg) {
 			bResult[0] |= pThis->g.b_hnp_enable
-			    << USB_DEVICE_B_HNP_ENABLE;
+				<< USB_DEVICE_B_HNP_ENABLE;
 			bResult[0] |= pThis->g.a_alt_hnp_support
-			    << USB_DEVICE_A_ALT_HNP_SUPPORT;
+				<< USB_DEVICE_A_ALT_HNP_SUPPORT;
 			bResult[0] |= pThis->g.a_hnp_support
-			    << USB_DEVICE_A_HNP_SUPPORT;
+				<< USB_DEVICE_A_HNP_SUPPORT;
 		}
 #endif
 		break;
@@ -170,7 +170,7 @@ static int service_tx_status_request(
  */
 static int
 service_in_request(struct musb *pThis,
-		   const struct usb_ctrlrequest *pControlRequest)
+		const struct usb_ctrlrequest *pControlRequest)
 {
 	int handled = 0;	/* not handled */
 
@@ -534,11 +534,11 @@ musb_read_setup(struct musb *pThis, struct usb_ctrlrequest *req)
 	 * order, but now USB packets always stay in USB byte order.
 	 */
 	DBG(3, "SETUP req%02x.%02x v%04x i%04x l%d\n",
-		 req->bRequestType,
-		 req->bRequest,
-		 le16_to_cpu(req->wValue),
-		 le16_to_cpu(req->wIndex),
-		 le16_to_cpu(req->wLength));
+		req->bRequestType,
+		req->bRequest,
+		le16_to_cpu(req->wValue),
+		le16_to_cpu(req->wIndex),
+		le16_to_cpu(req->wLength));
 
 	/* clean up any leftover transfers */
 	r = next_ep0_request(pThis);
@@ -570,7 +570,7 @@ musb_read_setup(struct musb *pThis, struct usb_ctrlrequest *req)
 
 static int
 forward_to_driver(struct musb *musb,
-		  const struct usb_ctrlrequest *pControlRequest)
+		const struct usb_ctrlrequest *pControlRequest)
 __releases(musb->Lock)
 __acquires(musb->Lock)
 {
@@ -609,7 +609,7 @@ irqreturn_t musb_g_ep0_irq(struct musb *pThis)
 	/* I sent a stall.. need to acknowledge it now.. */
 	if (wCsrVal & MGC_M_CSR0_P_SENTSTALL) {
 		musb_writew(regs, MGC_O_HDRC_CSR0,
-			       wCsrVal & ~MGC_M_CSR0_P_SENTSTALL);
+				wCsrVal & ~MGC_M_CSR0_P_SENTSTALL);
 		retval = IRQ_HANDLED;
 		pThis->ep0_state = MGC_END0_STAGE_SETUP;
 		wCsrVal = musb_readw(regs, MGC_O_HDRC_CSR0);
@@ -667,7 +667,7 @@ irqreturn_t musb_g_ep0_irq(struct musb *pThis)
 				musb_load_testpacket(pThis);
 
 			musb_writeb(pBase, MGC_O_HDRC_TESTMODE,
-				   pThis->bTestModeValue);
+					pThis->bTestModeValue);
 		}
 		/* FALLTHROUGH */
 
@@ -705,7 +705,7 @@ irqreturn_t musb_g_ep0_irq(struct musb *pThis)
 						musb_driver_name);
 				power = musb_readb(pBase, MGC_O_HDRC_POWER);
 				pThis->g.speed = (power & MGC_M_POWER_HSMODE)
-				    ? USB_SPEED_HIGH : USB_SPEED_FULL;
+					? USB_SPEED_HIGH : USB_SPEED_FULL;
 
 			}
 
@@ -808,14 +808,14 @@ static int musb_g_ep0_disable(struct usb_ep *e)
 }
 
 static void *musb_g_ep0_alloc_buffer(struct usb_ep *ep, unsigned bytes,
-			    dma_addr_t * dma, gfp_t gfp_flags)
+			dma_addr_t * dma, gfp_t gfp_flags)
 {
 	*dma = DMA_ADDR_INVALID;
 	return kmalloc(bytes, gfp_flags);
 }
 
-static void musb_g_ep0_free_buffer(struct usb_ep *ep, void *address, dma_addr_t dma,
-			  unsigned bytes)
+static void musb_g_ep0_free_buffer(struct usb_ep *ep, void *address,
+			dma_addr_t dma, unsigned bytes)
 {
 	kfree(address);
 }
@@ -883,7 +883,7 @@ musb_g_ep0_queue(struct usb_ep *e, struct usb_request *r, gfp_t gfp_flags)
 		else {
 			musb->ep0_state = MGC_END0_STAGE_STATUSIN;
 			musb_writew(regs, MGC_O_HDRC_CSR0,
-				       musb->ackpend | MGC_M_CSR0_P_DATAEND);
+					musb->ackpend | MGC_M_CSR0_P_DATAEND);
 			musb->ackpend = 0;
 			musb_g_ep0_giveback(ep->pThis, r);
 		}
@@ -955,7 +955,7 @@ cleanup:
 	return status;
 }
 
-struct usb_ep_ops musb_g_ep0_ops = {
+const struct usb_ep_ops musb_g_ep0_ops = {
 	.enable		= musb_g_ep0_enable,
 	.disable	= musb_g_ep0_disable,
 	.alloc_request	= musb_alloc_request,

drivers/usb/musb/musb_gadget.c

@@ -202,10 +202,10 @@ static inline int max_ep_writesize(struct musb *pThis, struct musb_ep *ep)
 			-> if queue is non-empty, txstate().
 
 	- Request is queued by the gadget driver.
-	       -> if queue was previously empty, txstate()
+		-> if queue was previously empty, txstate()
 
 	txstate()
-	       -> start
+		-> start
 		  /\	-> setup DMA
 		  |     (data is transferred to the FIFO, then sent out when
 		  |	IN token(s) are recd from Host.
@@ -253,7 +253,7 @@ static void txstate(struct musb *pThis, struct musb_request *req)
 
 	pRequest = &req->request;
 	wFifoCount = min(max_ep_writesize(pThis, pEnd),
-			 (int)(pRequest->length - pRequest->actual));
+			(int)(pRequest->length - pRequest->actual));
 
 	if (wCsrVal & MGC_M_TXCSR_TXPKTRDY) {
 		DBG(5, "%s old packet still ready , txcsr %03x\n",
@@ -285,7 +285,7 @@ static void txstate(struct musb *pThis, struct musb_request *req)
 
 			/* setup DMA, then program endpoint CSR */
 			request_size = min(pRequest->length,
-						  pEnd->dma->dwMaxLength);
+						pEnd->dma->dwMaxLength);
 			if (request_size <= pEnd->wPacketSize)
 				pEnd->dma->bDesiredMode = 0;
 			else
@@ -298,20 +298,20 @@ static void txstate(struct musb *pThis, struct musb_request *req)
 			if (use_dma) {
 				if (pEnd->dma->bDesiredMode == 0) {
 					wCsrVal &= ~(MGC_M_TXCSR_AUTOSET |
-						     MGC_M_TXCSR_DMAMODE);
+							MGC_M_TXCSR_DMAMODE);
 					wCsrVal |= (MGC_M_TXCSR_DMAENAB |
-						    MGC_M_TXCSR_MODE);
+							MGC_M_TXCSR_MODE);
 						// against programming guide
 				}
 				else
-					wCsrVal |= (MGC_M_TXCSR_AUTOSET |
-						    MGC_M_TXCSR_DMAENAB |
-						    MGC_M_TXCSR_DMAMODE |
-						    MGC_M_TXCSR_MODE);
+					wCsrVal |= (MGC_M_TXCSR_AUTOSET
+							| MGC_M_TXCSR_DMAENAB
+							| MGC_M_TXCSR_DMAMODE
+							| MGC_M_TXCSR_MODE);
 
 				wCsrVal &= ~MGC_M_TXCSR_P_UNDERRUN;
 				MGC_WriteCsr16(pBase, MGC_O_HDRC_TXCSR, bEnd,
-					       wCsrVal);
+						wCsrVal);
 			}
 		}
 
@@ -362,7 +362,7 @@ static void txstate(struct musb *pThis, struct musb_request *req)
 
 	if (!use_dma) {
 		musb_write_fifo(pEnd->hw_ep, wFifoCount,
-				 (u8 *) (pRequest->buf + pRequest->actual));
+				(u8 *) (pRequest->buf + pRequest->actual));
 		pRequest->actual += wFifoCount;
 		wCsrVal |= MGC_M_TXCSR_TXPKTRDY;
 		wCsrVal &= ~MGC_M_TXCSR_P_UNDERRUN;
@@ -481,7 +481,7 @@ void musb_g_tx(struct musb *pThis, u8 bEnd)
 
 					DBG(4, "sending zero pkt\n");
 					MGC_WriteCsr16(pBase, MGC_O_HDRC_TXCSR,
-						       bEnd,
+							bEnd,
 							MGC_M_TXCSR_MODE
 							| MGC_M_TXCSR_TXPKTRDY);
 				}
@@ -525,7 +525,7 @@ void musb_g_tx(struct musb *pThis, u8 bEnd)
 	- Only mode 0 is used.
 
 	- Request is queued by the gadget class driver.
-	        -> if queue was previously empty, rxstate()
+		-> if queue was previously empty, rxstate()
 
 	- Host sends OUT token which causes an endpoint interrupt
 	  /\      -> RxReady
@@ -640,13 +640,13 @@ static void rxstate(struct musb *pThis, struct musb_request *req)
 					wCsrVal | MGC_M_RXCSR_DMAMODE);
 #endif
 				MGC_WriteCsr16(pBase, MGC_O_HDRC_RXCSR, bEnd,
-					       wCsrVal);
+						wCsrVal);
 
 				if (pRequest->actual < pRequest->length) {
 					int transfer_size = 0;
 #ifdef USE_MODE1
 					transfer_size = min(pRequest->length,
-							 channel->dwMaxLength);
+							channel->dwMaxLength);
 #else
 					transfer_size = wCount;
 #endif
@@ -694,9 +694,8 @@ static void rxstate(struct musb *pThis, struct musb_request *req)
 			}
 #endif
 
-			musb_read_fifo(pEnd->hw_ep, wFifoCount,
-				   (u8 *) (pRequest->buf +
-					   pRequest->actual));
+			musb_read_fifo(pEnd->hw_ep, wFifoCount, (u8 *)
+					(pRequest->buf + pRequest->actual));
 			pRequest->actual += wFifoCount;
 
 			/* REVISIT if we left anything in the fifo, flush
@@ -778,9 +777,9 @@ void musb_g_rx(struct musb *pThis, u8 bEnd)
 	}
 
 	if (dma && (wCsrVal & MGC_M_RXCSR_DMAENAB)) {
-		wCsrVal &= ~(MGC_M_RXCSR_AUTOCLEAR |
-			     MGC_M_RXCSR_DMAENAB |
-			     MGC_M_RXCSR_DMAMODE);
+		wCsrVal &= ~(MGC_M_RXCSR_AUTOCLEAR
+				| MGC_M_RXCSR_DMAENAB
+				| MGC_M_RXCSR_DMAMODE);
 		MGC_WriteCsr16(pBase, MGC_O_HDRC_RXCSR, bEnd,
 			MGC_M_RXCSR_P_WZC_BITS | wCsrVal);
 
@@ -793,8 +792,9 @@ void musb_g_rx(struct musb *pThis, u8 bEnd)
 
 #if defined(CONFIG_USB_INVENTRA_DMA) || defined(CONFIG_USB_TUSB_OMAP_DMA)
 		/* Autoclear doesn't clear RxPktRdy for short packets */
-		if ((dma->bDesiredMode == 0) ||
-		    (dma->dwActualLength & (pEnd->wPacketSize - 1))) {
+		if ((dma->bDesiredMode == 0)
+				|| (dma->dwActualLength
+					& (pEnd->wPacketSize - 1))) {
 			/* ack the read! */
 			wCsrVal &= ~MGC_M_RXCSR_RXPKTRDY;
 			MGC_WriteCsr16(pBase, MGC_O_HDRC_RXCSR, bEnd, wCsrVal);
@@ -835,7 +835,7 @@ done:
 /* ------------------------------------------------------------ */
 
 static int musb_gadget_enable(struct usb_ep *ep,
-			       const struct usb_endpoint_descriptor *desc)
+			const struct usb_endpoint_descriptor *desc)
 {
 	unsigned long flags;
 	struct musb_ep	*pEnd;
@@ -957,13 +957,13 @@ static int musb_gadget_enable(struct usb_ep *ep,
 	pr_debug("%s periph: enabled %s for %s %s, %smaxpacket %d\n",
 			musb_driver_name, pEnd->end_point.name,
 			({ char *s; switch (pEnd->type) {
-			 case USB_ENDPOINT_XFER_BULK:	s = "bulk"; break;
-			 case USB_ENDPOINT_XFER_INT:	s = "int"; break;
-			 default:			s = "iso"; break;
-			 }; s; }),
-			 pEnd->is_in ? "IN" : "OUT",
-			 pEnd->dma ? "dma, " : "",
-			 pEnd->wPacketSize);
+			case USB_ENDPOINT_XFER_BULK:	s = "bulk"; break;
+			case USB_ENDPOINT_XFER_INT:	s = "int"; break;
+			default:			s = "iso"; break;
+			}; s; }),
+			pEnd->is_in ? "IN" : "OUT",
+			pEnd->dma ? "dma, " : "",
+			pEnd->wPacketSize);
 
 	pThis->status |= MUSB_VBUS_STATUS_CHG;
 	schedule_work(&pThis->irq_work);
@@ -1056,7 +1056,7 @@ void musb_free_request(struct usb_ep *ep, struct usb_request *req)
  * respect to calls with irqs disabled:  alloc is safe, free is not.
  */
 static void *musb_gadget_alloc_buffer(struct usb_ep *ep, unsigned bytes,
-			    dma_addr_t * dma, gfp_t gfp_flags)
+			dma_addr_t * dma, gfp_t gfp_flags)
 {
 	struct musb_ep *musb_ep = to_musb_ep(ep);
 
@@ -1127,7 +1127,7 @@ static void musb_ep_restart(struct musb *pThis, struct musb_request *req)
 }
 
 static int musb_gadget_queue(struct usb_ep *ep, struct usb_request *req,
-			   gfp_t gfp_flags)
+			gfp_t gfp_flags)
 {
 	struct musb_ep		*pEnd;
 	struct musb_request	*pRequest;
@@ -1477,7 +1477,7 @@ static void musb_pullup(struct musb *musb, int is_on)
 	/* FIXME if on, HdrcStart; if off, HdrcStop */
 
 	DBG(3, "gadget %s D+ pullup %s\n",
-	    musb->pGadgetDriver->function, is_on ? "on" : "off");
+		musb->pGadgetDriver->function, is_on ? "on" : "off");
 	musb_writeb(musb->pRegs, MGC_O_HDRC_POWER, power);
 }
 
@@ -1602,11 +1602,13 @@ static inline void __devinit musb_g_init_endpoints(struct musb *pThis)
 			count++;
 		} else {
 			if (hw_ep->wMaxPacketSizeTx) {
-				init_peripheral_ep(pThis, &hw_ep->ep_in, bEnd, 1);
+				init_peripheral_ep(pThis, &hw_ep->ep_in,
+							bEnd, 1);
 				count++;
 			}
 			if (hw_ep->wMaxPacketSizeRx) {
-				init_peripheral_ep(pThis, &hw_ep->ep_out, bEnd, 0);
+				init_peripheral_ep(pThis, &hw_ep->ep_out,
+							bEnd, 0);
 				count++;
 			}
 		}
@@ -1715,7 +1717,7 @@ int usb_gadget_register_driver(struct usb_gadget_driver *driver)
 		retval = driver->bind(&pThis->g);
 	if (retval != 0) {
 		DBG(3, "bind to driver %s failed --> %d\n",
-		    driver->driver.name, retval);
+			driver->driver.name, retval);
 		pThis->pGadgetDriver = NULL;
 		pThis->g.dev.driver = NULL;
 	}
@@ -1952,7 +1954,7 @@ __acquires(pThis->Lock)
 
 	/* report disconnect, if we didn't already (flushing EP state) */
 	if (pThis->g.speed != USB_SPEED_UNKNOWN)
-		 musb_g_disconnect(pThis);
+		musb_g_disconnect(pThis);
 
 	/* what speed did we negotiate? */
 	power = musb_readb(pBase, MGC_O_HDRC_POWER);

drivers/usb/musb/musb_gadget.h

@@ -94,7 +94,7 @@ static inline struct usb_request *next_request(struct musb_ep *ep)
 extern void musb_g_tx(struct musb *pThis, u8 bEnd);
 extern void musb_g_rx(struct musb *pThis, u8 bEnd);
 
-extern struct usb_ep_ops musb_g_ep0_ops;
+extern const struct usb_ep_ops musb_g_ep0_ops;
 
 extern int musb_gadget_setup(struct musb *);
 extern void musb_gadget_cleanup(struct musb *);

drivers/usb/musb/musb_procfs.c

@@ -84,16 +84,16 @@ static int dump_qh(struct musb_qh *qh, char *buf, unsigned max)
 	count = snprintf(buf, max, "    qh %p dev%d ep%d%s max%d\n",
 			qh, qh->dev->devnum, qh->epnum,
 			({ char *s; switch (qh->type) {
-			 case USB_ENDPOINT_XFER_BULK:
+			case USB_ENDPOINT_XFER_BULK:
 				s = "-bulk"; break;
-			 case USB_ENDPOINT_XFER_INT:
+			case USB_ENDPOINT_XFER_INT:
 				s = "-int"; break;
-			 case USB_ENDPOINT_XFER_CONTROL:
+			case USB_ENDPOINT_XFER_CONTROL:
 				s = ""; break;
-			 default:
+			default:
 				s = "iso"; break;
-			 }; s; }),
-			 qh->maxpacket);
+			}; s; }),
+			qh->maxpacket);
 	buf += count;
 	max -= count;
 
@@ -306,7 +306,8 @@ dump_end_info(struct musb *pThis, u8 bEnd, char *aBuffer, unsigned max)
 					char		tmp[16];
 
 					base = pThis->ctrl_base;
-					ram = base + DAVINCI_RXCPPI_STATERAM_OFFSET(cppi);
+					ram = DAVINCI_RXCPPI_STATERAM_OFFSET(
+							cppi) + base;
 					snprintf(tmp, sizeof tmp, "%d left, ",
 						musb_readl(base,
 						DAVINCI_RXCPPI_BUFCNT0_REG
@@ -387,7 +388,8 @@ dump_end_info(struct musb *pThis, u8 bEnd, char *aBuffer, unsigned max)
 					void __iomem	*ram;
 
 					base = pThis->ctrl_base;
-					ram = base + DAVINCI_TXCPPI_STATERAM_OFFSET(cppi);
+					ram = DAVINCI_RXCPPI_STATERAM_OFFSET(
+							cppi) + base;
 					code = snprintf(buf, max,
 						"    tx dma%d: "
 						"%08x %08x, %08x %08x; "
@@ -601,7 +603,7 @@ static int dump_header_stats(struct musb *pThis, char *buffer)
  * D<num> set/query the debug level
  */
 static int musb_proc_write(struct file *file, const char __user *buffer,
-			 unsigned long count, void *data)
+			unsigned long count, void *data)
 {
 	char cmd;
 	u8 bReg;
@@ -614,36 +616,32 @@ static int musb_proc_write(struct file *file, const char __user *buffer,
 	switch (cmd) {
 	case 'C':
 		if (pBase) {
-			bReg =
-			    musb_readb(pBase,
-				      MGC_O_HDRC_POWER) | MGC_M_POWER_SOFTCONN;
+			bReg = musb_readb(pBase, MGC_O_HDRC_POWER)
+					| MGC_M_POWER_SOFTCONN;
 			musb_writeb(pBase, MGC_O_HDRC_POWER, bReg);
 		}
 		break;
 
 	case 'c':
 		if (pBase) {
-			bReg =
-			    musb_readb(pBase,
-				      MGC_O_HDRC_POWER) & ~MGC_M_POWER_SOFTCONN;
+			bReg = musb_readb(pBase, MGC_O_HDRC_POWER)
+					& ~MGC_M_POWER_SOFTCONN;
 			musb_writeb(pBase, MGC_O_HDRC_POWER, bReg);
 		}
 		break;
 
 	case 'I':
 		if (pBase) {
-			bReg =
-			    musb_readb(pBase,
-				      MGC_O_HDRC_POWER) | MGC_M_POWER_HSENAB;
+			bReg = musb_readb(pBase, MGC_O_HDRC_POWER)
+					| MGC_M_POWER_HSENAB;
 			musb_writeb(pBase, MGC_O_HDRC_POWER, bReg);
 		}
 		break;
 
 	case 'i':
 		if (pBase) {
-			bReg =
-			    musb_readb(pBase,
-				      MGC_O_HDRC_POWER) & ~MGC_M_POWER_HSENAB;
+			bReg = musb_readb(pBase, MGC_O_HDRC_POWER)
+					& ~MGC_M_POWER_HSENAB;
 			musb_writeb(pBase, MGC_O_HDRC_POWER, bReg);
 		}
 		break;
@@ -677,8 +675,8 @@ static int musb_proc_write(struct file *file, const char __user *buffer,
 	case 'D':{
 			if (count > 1) {
 				char digits[8], *p = digits;
-				int i = 0, level = 0, sign = 1, len =
-				    min(count - 1, (unsigned long)8);
+				int i = 0, level = 0, sign = 1;
+				int len = min(count - 1, (unsigned long)8);
 
 				copy_from_user(&digits, &buffer[1], len);
 
@@ -781,7 +779,7 @@ musb_debug_create(char *name, struct musb *data)
 		return NULL;
 
 	data->pProcEntry = pde = create_proc_entry(name,
-					     S_IFREG | S_IRUGO | S_IWUSR, NULL);
+					S_IFREG | S_IRUGO | S_IWUSR, NULL);
 	if (pde) {
 		pde->data = data;
 		// pde->owner = THIS_MODULE;

drivers/usb/musb/otg.c

@@ -37,7 +37,7 @@
  *        + EVM gamma boards have troublesome C133, preventing
  *          conformant timings for A_WAIT_VFALL transitions
  *        + ID-pin based role initialization and VBUS switching
- *	    seems partly functional ... seems to bypass this code.
+ *          seems partly functional ... seems to bypass this code.
  *        + haven't tried HNP or SRP.
  *
  *   - needs updating along the lines of <linux/usb_otg.h>
@@ -237,7 +237,7 @@ void MGC_OtgMachineDestroy(struct otg_machine *pMachine)
 
 /* caller has irqlocked musb */
 void MGC_OtgMachineInputsChanged(struct otg_machine *pMachine,
-				 const MGC_OtgMachineInputs * pInputs)
+				const MGC_OtgMachineInputs * pInputs)
 {
 
 	DBG(2, "<== bState %d(%d)%s%s%s%s%s%s\n",
@@ -364,7 +364,8 @@ void MGC_OtgMachineInputsChanged(struct otg_machine *pMachine,
 				otg_state_changed(pMachine->musb,
 						OTG_STATE_A_WAIT_BCON);
 				mod_timer(&pMachine->Timer, jiffies
-					+ msecs_to_jiffies(MGC_OTG_T_A_WAIT_BCON));
+					+ msecs_to_jiffies(
+						MGC_OTG_T_A_WAIT_BCON));
 			}
 		}
 		break;

drivers/usb/musb/plat_uds.c

@@ -70,13 +70,13 @@
  *      * Interrupt and isochronous will dynamically allocate endpoint
  *        hardware, but (a) there's no record keeping for bandwidth;
  *        (b) in the common case that few endpoints are available, there
- *	  is no mechanism to reuse endpoints to talk to multiple devices.
+ *        is no mechanism to reuse endpoints to talk to multiple devices.
  *
- *	  RESULT:  At one extreme, bandwidth can be overcommitted in
- *	  some hardware configurations, no faults will be reported.
- *	  At the other extreme, the bandwidth capabilities which do
- *	  exist tend to be severely undercommitted.  You can't yet hook
- *	  up both a keyboard and a mouse to an external USB hub.
+ *        RESULT:  At one extreme, bandwidth can be overcommitted in
+ *        some hardware configurations, no faults will be reported.
+ *        At the other extreme, the bandwidth capabilities which do
+ *        exist tend to be severely undercommitted.  You can't yet hook
+ *        up both a keyboard and a mouse to an external USB hub.
  *
  *      * Host side doesn't understand that hardware endpoints have two
  *        directions, so it uses only half the resources available on
@@ -84,10 +84,10 @@
  *
  *		+++	PARTIALLY RESOLVED	+++
  *
- *	  RESULT:  On DaVinci (and TUSB 6010), only one external device may
- *	  use periodic transfers, other than the hub used to connect it.
- *	  (And if it were to understand, there would still be limitations
- *	  because of the lack of periodic endpoint scheduling.)
+ *        RESULT:  On DaVinci (and TUSB 6010), only one external device may
+ *        use periodic transfers, other than the hub used to connect it.
+ *        (And if it were to understand, there would still be limitations
+ *        because of the lack of periodic endpoint scheduling.)
  *
  *  - Host-side doesn't use the HCD framework, even the older version in
  *    the 2.6.10 kernel, which doesn't provide per-endpoint URB queues.
@@ -149,7 +149,7 @@ unsigned debug = MUSB_DEBUG;
 module_param(debug, uint, 0);
 MODULE_PARM_DESC(debug, "initial debug message level");
 
-#define MUSB_VERSION_SUFFIX	 "/dbg"
+#define MUSB_VERSION_SUFFIX	"/dbg"
 #endif
 
 #define DRIVER_AUTHOR "Mentor Graphics Corp. and Texas Instruments"
@@ -158,7 +158,7 @@ MODULE_PARM_DESC(debug, "initial debug message level");
 #define MUSB_VERSION_BASE "2.2a/db-0.5.1"
 
 #ifndef MUSB_VERSION_SUFFIX
-#define MUSB_VERSION_SUFFIX	 ""
+#define MUSB_VERSION_SUFFIX	""
 #endif
 #define MUSB_VERSION	MUSB_VERSION_BASE MUSB_VERSION_SUFFIX
 
@@ -166,7 +166,6 @@ MODULE_PARM_DESC(debug, "initial debug message level");
 
 const char musb_driver_name[] = "musb_hdrc";
 
-/* this module is always GPL, the gadget might not... */
 MODULE_DESCRIPTION(DRIVER_INFO);
 MODULE_AUTHOR(DRIVER_AUTHOR);
 MODULE_LICENSE("GPL");
@@ -191,7 +190,7 @@ static inline struct musb *dev_to_musb(struct device *dev)
 }
 
 static void otg_input_changed(struct musb * pThis, u8 devctl, u8 reset,
-			 u8 connection, u8 suspend)
+			u8 connection, u8 suspend)
 {
 #ifdef CONFIG_USB_MUSB_OTG
 	struct otg_machine	*otgm = &pThis->OtgMachine;
@@ -368,7 +367,7 @@ void musb_load_testpacket(struct musb *musb)
 		| MGC_M_INTR_RESET )
 
 static irqreturn_t musb_stage0_irq(struct musb * pThis, u8 bIntrUSB,
-				    u8 devctl, u8 power)
+				u8 devctl, u8 power)
 {
 	irqreturn_t handled = IRQ_NONE;
 #ifdef CONFIG_USB_MUSB_HDRC_HCD
@@ -376,7 +375,7 @@ static irqreturn_t musb_stage0_irq(struct musb * pThis, u8 bIntrUSB,
 #endif
 
 	DBG(3, "<== Power=%02x, DevCtl=%02x, bIntrUSB=0x%x\n", power, devctl,
-	    bIntrUSB);
+		bIntrUSB);
 
 	/* in host mode when a device resume me (from power save)
 	 * in device mode when the host resume me; it shold not change
@@ -392,7 +391,7 @@ static irqreturn_t musb_stage0_irq(struct musb * pThis, u8 bIntrUSB,
 			MUSB_HST_MODE(pThis);	/* unnecessary */
 			power &= ~MGC_M_POWER_SUSPENDM;
 			musb_writeb(pBase, MGC_O_HDRC_POWER,
-				   power | MGC_M_POWER_RESUME);
+				power | MGC_M_POWER_RESUME);
 
 			/* should now be A_SUSPEND */
 			pThis->xceiv.state = OTG_STATE_A_HOST;
@@ -523,8 +522,8 @@ static irqreturn_t musb_stage0_irq(struct musb * pThis, u8 bIntrUSB,
 
 			/* reading state from Power register doesn't work */
 			otg_input_changed(pThis, devctl, TRUE, FALSE,
-						 (power & MGC_M_POWER_SUSPENDM)
-						 ? TRUE : FALSE);
+						(power & MGC_M_POWER_SUSPENDM)
+						? TRUE : FALSE);
 		}
 
 		handled = IRQ_HANDLED;
@@ -545,7 +544,7 @@ static irqreturn_t musb_stage0_irq(struct musb * pThis, u8 bIntrUSB,
  * @param power
  */
 static irqreturn_t musb_stage2_irq(struct musb * pThis, u8 bIntrUSB,
-				    u8 devctl, u8 power)
+				u8 devctl, u8 power)
 {
 	irqreturn_t handled = IRQ_NONE;
 
@@ -649,7 +648,7 @@ void musb_start(struct musb * pThis)
 
 	/* enable high-speed/low-power and start session */
 	musb_writeb(pBase, MGC_O_HDRC_POWER,
-		   MGC_M_POWER_SOFTCONN | MGC_M_POWER_HSENAB);
+		MGC_M_POWER_SOFTCONN | MGC_M_POWER_HSENAB);
 
 	switch (pThis->board_mode) {
 	case MUSB_HOST:
@@ -659,7 +658,7 @@ void musb_start(struct musb * pThis)
 	case MUSB_PERIPHERAL:
 		state = musb_readb(pBase, MGC_O_HDRC_DEVCTL);
 		musb_writeb(pBase, MGC_O_HDRC_DEVCTL,
-			   state & ~MGC_M_DEVCTL_SESSION);
+			state & ~MGC_M_DEVCTL_SESSION);
 		break;
 	}
 }
@@ -1119,7 +1118,7 @@ static int __devinit musb_core_init(u16 wType, struct musb *pThis)
 	wRelMajor = (wRelease >> 10) & 0x1f;
 	wRelMinor = wRelease & 0x3ff;
 	snprintf(aRevision, 32, "%d.%d%s", wRelMajor,
-		 wRelMinor, (wRelease & 0x8000) ? "RC" : "");
+		wRelMinor, (wRelease & 0x8000) ? "RC" : "");
 	printk(KERN_DEBUG "%s: %sHDRC RTL version %s %s\n",
 			musb_driver_name, type, aRevision, aDate);
 
@@ -1368,8 +1367,8 @@ void musb_dma_completion(struct musb *musb, u8 bLocalEnd, u8 bTransmit)
 
 #ifdef CONFIG_SYSFS
 
-static ssize_t musb_mode_show(struct device *dev,
-				  struct device_attribute *attr, char *buf)
+static ssize_t
+musb_mode_show(struct device *dev, struct device_attribute *attr, char *buf)
 {
 	struct musb *musb = dev_to_musb(dev);
 	unsigned long flags;
@@ -1393,8 +1392,8 @@ static ssize_t musb_mode_show(struct device *dev,
 }
 static DEVICE_ATTR(mode, S_IRUGO, musb_mode_show, NULL);
 
-static ssize_t musb_cable_show(struct device *dev,
-			       struct device_attribute *attr, char *buf)
+static ssize_t
+musb_cable_show(struct device *dev, struct device_attribute *attr, char *buf)
 {
 	struct musb *musb = dev_to_musb(dev);
 	char *v1= "", *v2 = "?";
@@ -1635,8 +1634,8 @@ musb_init_controller(struct device *dev, int nIrq, void __iomem *ctrl)
 
 	/* setup musb parts of the core (especially endpoints) */
 	status = musb_core_init(plat->multipoint
-			   ? MUSB_CONTROLLER_MHDRC
-			   : MUSB_CONTROLLER_HDRC, pThis);
+			? MUSB_CONTROLLER_MHDRC
+			: MUSB_CONTROLLER_HDRC, pThis);
 	if (status < 0)
 		goto fail2;
 
@@ -1871,17 +1870,17 @@ static int __init musb_init(void)
 
 	pr_info("%s: version " MUSB_VERSION ", "
 #ifdef CONFIG_USB_INVENTRA_FIFO
-	       "pio"
+		"pio"
 #elif defined(CONFIG_USB_TI_CPPI_DMA)
-	       "cppi-dma"
+		"cppi-dma"
 #elif defined(CONFIG_USB_INVENTRA_DMA)
-	       "musb-dma"
+		"musb-dma"
 #elif defined(CONFIG_USB_TUSB_OMAP_DMA)
-	       "tusb-omap-dma"
+		"tusb-omap-dma"
 #else
-	       "?dma?"
+		"?dma?"
 #endif
-	       ", "
+		", "
 #ifdef CONFIG_USB_MUSB_OTG
 		"otg (peripheral+host)"
 #elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
@@ -1889,8 +1888,8 @@ static int __init musb_init(void)
 #elif defined(CONFIG_USB_MUSB_HDRC_HCD)
 		"host"
 #endif
-	       ", debug=%d\n",
-	       musb_driver_name, debug);
+		", debug=%d\n",
+		musb_driver_name, debug);
 	return platform_driver_register(&musb_driver);
 }
 

drivers/usb/musb/tusb6010.c

@@ -47,10 +47,10 @@ void musb_write_fifo(struct musb_hw_ep *hw_ep, u16 len, const u8 *buf)
 
 	if (epnum)
 		musb_writel(ep_conf, TUSB_EP_TX_OFFSET,
-			    TUSB_EP_CONFIG_XFR_SIZE(len));
+			TUSB_EP_CONFIG_XFR_SIZE(len));
 	else
 		musb_writel(ep_conf, 0, TUSB_EP0_CONFIG_DIR_TX |
-			    TUSB_EP0_CONFIG_XFR_SIZE(len));
+			TUSB_EP0_CONFIG_XFR_SIZE(len));
 
 	/* Write 32-bit blocks from buffer to FIFO
 	 * REVISIT: Optimize for burst ... writesl/writesw
@@ -101,7 +101,7 @@ void musb_read_fifo(struct musb_hw_ep *hw_ep, u16 len, u8 *buf)
 
 	if (epnum)
 		musb_writel(ep_conf, TUSB_EP_RX_OFFSET,
-			    TUSB_EP_CONFIG_XFR_SIZE(len));
+			TUSB_EP_CONFIG_XFR_SIZE(len));
 	else
 		musb_writel(ep_conf, 0, TUSB_EP0_CONFIG_XFR_SIZE(len));
 
@@ -251,7 +251,7 @@ irqreturn_t tusb_interrupt(int irq, void *__hci, struct pt_regs *r)
 	otg_stat = musb_readl(base, TUSB_DEV_OTG_STAT);
 
 	DBG(3, "TUSB interrupt dma: %08x int: %08x otg: %08x\n",
-	    dma_src, int_src, otg_stat);
+		dma_src, int_src, otg_stat);
 
 	musb->int_usb = 0;
 	musb->int_rx = 0;
@@ -284,17 +284,16 @@ irqreturn_t tusb_interrupt(int irq, void *__hci, struct pt_regs *r)
 	}
 
 	/* VBUS state change */
-	if ((int_src & TUSB_INT_SRC_VBUS_SENSE_CHNG) ||
-	    (int_src & TUSB_INT_SRC_USB_IP_VBUS_ERR))
-	{
+	if ((int_src & TUSB_INT_SRC_VBUS_SENSE_CHNG)
+			|| (int_src & TUSB_INT_SRC_USB_IP_VBUS_ERR)) {
 		musb->status |= MUSB_VBUS_STATUS_CHG;
 		schedule_work(&musb->irq_work);
 
 #if 0
 		DBG(3, "tusb: VBUS changed. VBUS state %d\n",
-		    (otg_stat & TUSB_DEV_OTG_STAT_VBUS_SENSE) ? 1 : 0);
-		if (!(otg_stat & TUSB_DEV_OTG_STAT_VBUS_SENSE) &&
-		    !(otg_stat & TUSB_DEV_OTG_STAT_ID_STATUS)) {
+			(otg_stat & TUSB_DEV_OTG_STAT_VBUS_SENSE) ? 1 : 0);
+		if (!(otg_stat & TUSB_DEV_OTG_STAT_VBUS_SENSE)
+				&& !(otg_stat & TUSB_DEV_OTG_STAT_ID_STATUS)) {
 			/* VBUS went off and ID pin is down */
 			DBG(3, "tusb: No VBUS, starting session\n");
 			/* Start session again, VBUS will be enabled */
@@ -307,16 +306,17 @@ irqreturn_t tusb_interrupt(int irq, void *__hci, struct pt_regs *r)
 	/* ID pin change */
 	if (int_src & TUSB_INT_SRC_ID_STATUS_CHNG) {
 		DBG(3, "tusb: ID pin changed. State is %d\n",
-		    (musb_readl(base, TUSB_DEV_OTG_STAT) &
-		     TUSB_DEV_OTG_STAT_ID_STATUS) ? 1 : 0);
+			(musb_readl(base, TUSB_DEV_OTG_STAT)
+				& TUSB_DEV_OTG_STAT_ID_STATUS)
+			? 1 : 0);
 	}
 
 	/* OTG timer expiration */
 	if (int_src & TUSB_INT_SRC_OTG_TIMEOUT) {
 		DBG(3, "tusb: OTG timer expired\n");
 		musb_writel(base, TUSB_DEV_OTG_TIMER,
-			    musb_readl(base, TUSB_DEV_OTG_TIMER) |
-			    TUSB_DEV_OTG_TIMER_ENABLE);
+			musb_readl(base, TUSB_DEV_OTG_TIMER) |
+			TUSB_DEV_OTG_TIMER_ENABLE);
 	}
 
 	/* TX dma callback must be handled here, RX dma callback is
@@ -360,7 +360,7 @@ irqreturn_t tusb_interrupt(int irq, void *__hci, struct pt_regs *r)
 	/* Acknowledge TUSB interrupts. Clear only non-reserved bits */
 	if (int_src)
 		musb_writel(base, TUSB_INT_SRC_CLEAR,
-			    int_src & ~TUSB_INT_MASK_RESERVED_BITS);
+			int_src & ~TUSB_INT_MASK_RESERVED_BITS);
 
 	spin_unlock_irqrestore(&musb->Lock, flags);
 
@@ -394,8 +394,7 @@ void musb_platform_enable(struct musb * musb)
 	musb_writel(base, TUSB_GPIO_INT_CLEAR, 0x1ff);
 
 	/* Acknowledge pending interrupt(s) */
-	musb_writel(base, TUSB_INT_SRC_CLEAR,
-		    ~TUSB_INT_MASK_RESERVED_BITS);
+	musb_writel(base, TUSB_INT_SRC_CLEAR, ~TUSB_INT_MASK_RESERVED_BITS);
 
 #if 0
 	/* Set OTG timer for about one second */
@@ -407,7 +406,7 @@ void musb_platform_enable(struct musb * musb)
 	/* Only 0 clock cycles for minimum interrupt de-assertion time and
 	 * interrupt polarity active low seems to work reliably here */
 	musb_writel(base, TUSB_INT_CTRL_CONF,
-		    TUSB_INT_CTRL_CONF_INT_RELCYC(0));
+			TUSB_INT_CTRL_CONF_INT_RELCYC(0));
 
 	set_irq_type(musb->nIrq, IRQ_TYPE_LEVEL_LOW);
 
@@ -505,7 +504,7 @@ static int tusb_start(struct musb *musb)
 	ret = tusb_print_revision(musb);
 	if (ret < 2) {
 		printk(KERN_ERR "tusb: Unsupported TUSB6010 revision %i\n",
-		       ret);
+				ret);
 		goto err;
 	}
 
@@ -515,7 +514,7 @@ static int tusb_start(struct musb *musb)
 
 	/* Select PHY free running 60MHz as a system clock */
 	musb_writel(base, TUSB_PRCM_CONF, //FIXME: CPEN should not be needed!
-		    TUSB_PRCM_CONF_SFW_CPEN | TUSB_PRCM_CONF_SYS_CLKSEL(1));
+			TUSB_PRCM_CONF_SFW_CPEN | TUSB_PRCM_CONF_SYS_CLKSEL(1));
 
 	/* VBus valid timer 1us, disable DFT/Debug and VLYNQ clocks for
 	 * power saving, enable VBus detect and session end comparators,

drivers/usb/musb/tusb6010_omap.c

@@ -101,7 +101,7 @@ static inline int tusb_omap_use_shared_dmareq(struct tusb_omap_dma_ch *chdat)
 	u32		reg = musb_readl(chdat->tusb_base, TUSB_DMA_EP_MAP);
 	if (reg != 0) {
 		DBG(1, "ep%i dmareq0 is busy for ep%i\n",
-		    chdat->epnum, reg & 0xf);
+			chdat->epnum, reg & 0xf);
 		return -EAGAIN;
 	}
 
@@ -121,7 +121,7 @@ static inline void tusb_omap_free_shared_dmareq(struct tusb_omap_dma_ch *chdat)
 
 	if ((reg & 0xf) != chdat->epnum) {
 		printk(KERN_ERR "ep%i trying to release dmareq0 for ep%i\n",
-		       chdat->epnum, reg & 0xf);
+			chdat->epnum, reg & 0xf);
 		return;
 	}
 	musb_writel(chdat->tusb_base, TUSB_DMA_EP_MAP, 0);
@@ -159,8 +159,8 @@ static void tusb_omap_dma_cb(int lch, u16 ch_status, void *data)
 		printk(KERN_ERR "TUSB DMA error status: %i\n", ch_status);
 
 	DBG(3, "ep%i %s dma callback ch: %i status: %x\n",
-	    chdat->epnum, chdat->tx ? "tx" : "rx",
-	    ch, ch_status);
+		chdat->epnum, chdat->tx ? "tx" : "rx",
+		ch, ch_status);
 
 	if (chdat->tx)
 		transferred = musb_readl(ep_conf, TUSB_EP_TX_OFFSET);
@@ -187,8 +187,8 @@ static void tusb_omap_dma_cb(int lch, u16 ch_status, void *data)
 	 * REVISIT: This same problem may occur with other MUSB dma as well.
 	 * Easy to test with g_ether by pinging the MUSB board with ping -s54.
 	 */
-	if ((chdat->transfer_len < chdat->packet_sz) ||
-	    (chdat->transfer_len % chdat->packet_sz != 0)) {
+	if ((chdat->transfer_len < chdat->packet_sz)
+			|| (chdat->transfer_len % chdat->packet_sz != 0)) {
 		u16	csr;
 
 		if (chdat->tx) {
@@ -232,8 +232,8 @@ static int tusb_omap_dma_program(struct dma_channel *channel, u16 packet_sz,
 		transfer_len = len / 32;
 		transfer_len *= 32;
 		DBG(3, "ep%i short %s dma: %lu/%lu %lu remainder\n",
-		    chdat->epnum, chdat->tx ? "tx" : "rx",
-		    transfer_len, len, len - transfer_len);
+			chdat->epnum, chdat->tx ? "tx" : "rx",
+			transfer_len, len, len - transfer_len);
 	} else
 		transfer_len = len;
 #else
@@ -247,7 +247,7 @@ static int tusb_omap_dma_program(struct dma_channel *channel, u16 packet_sz,
 
 	if (dma_addr & 0x1) {
 		DBG(3, "unaligned dma address for ep%i %s: %08x\n",
-		    chdat->epnum, chdat->tx ? "tx" : "rx", dma_addr);
+			chdat->epnum, chdat->tx ? "tx" : "rx", dma_addr);
 		return FALSE;
 	}
 
@@ -279,14 +279,14 @@ static int tusb_omap_dma_program(struct dma_channel *channel, u16 packet_sz,
 	channel->bStatus = MGC_DMA_STATUS_BUSY;
 
 	DBG(1, "ep%i %s dma ch%i dma: %08x len: %u packet_sz: %i rndis: %d\n",
-	    chdat->epnum, chdat->tx ? "tx" : "rx",
-	    ch, dma_addr, transfer_len, packet_sz, rndis_mode);
+		chdat->epnum, chdat->tx ? "tx" : "rx",
+		ch, dma_addr, transfer_len, packet_sz, rndis_mode);
 
 	/* Since we're recycling dma areas, we need to clean or invalidate */
-	if (chdat->tx) {
+	if (chdat->tx)
 		consistent_sync(phys_to_virt(dma_addr), len,
 				DMA_TO_DEVICE);
-	} else
+	else
 		consistent_sync(phys_to_virt(dma_addr), len,
 				DMA_FROM_DEVICE);
 
@@ -296,7 +296,7 @@ static int tusb_omap_dma_program(struct dma_channel *channel, u16 packet_sz,
 	if (chdat->tx) {
 		dma_params.data_type	= OMAP_DMA_DATA_TYPE_S32;
 		dma_params.elem_count	= 8;		/* 8x32-bit burst */
-		dma_params.frame_count	= transfer_len / 32; /* Burst sz frame */
+		dma_params.frame_count	= transfer_len / 32; /* Burst sz */
 
 		dma_params.src_amode	= OMAP_DMA_AMODE_POST_INC;
 		dma_params.src_start	= (unsigned long)dma_addr;
@@ -306,7 +306,7 @@ static int tusb_omap_dma_program(struct dma_channel *channel, u16 packet_sz,
 		dma_params.dst_amode	= OMAP_DMA_AMODE_DOUBLE_IDX;
 		dma_params.dst_start	= (unsigned long)fifo;
 		dma_params.dst_ei	= 1;
-		dma_params.dst_fi	= -31;		/* Loop 32 byte window */
+		dma_params.dst_fi	= -31;	/* Loop 32 byte window */
 
 		dma_params.trigger	= sync_dev;
 		dma_params.sync_mode	= OMAP_DMA_SYNC_FRAME;
@@ -317,12 +317,12 @@ static int tusb_omap_dma_program(struct dma_channel *channel, u16 packet_sz,
 	} else {
 		dma_params.data_type	= OMAP_DMA_DATA_TYPE_S32;
 		dma_params.elem_count	= 8;		/* 8x32-bit burst */
-		dma_params.frame_count	= transfer_len / 32; /* Burst sz frame */
+		dma_params.frame_count	= transfer_len / 32; /* Burst sz */
 
 		dma_params.src_amode	= OMAP_DMA_AMODE_DOUBLE_IDX;
 		dma_params.src_start	= (unsigned long)fifo;
 		dma_params.src_ei	= 1;
-		dma_params.src_fi	= -31;		/* Loop 32 byte window */
+		dma_params.src_fi	= -31;	/* Loop 32 byte window */
 
 		dma_params.dst_amode	= OMAP_DMA_AMODE_POST_INC;
 		dma_params.dst_start	= (unsigned long)dma_addr;
@@ -340,7 +340,7 @@ static int tusb_omap_dma_program(struct dma_channel *channel, u16 packet_sz,
 	/* Use 16x16 transfer if addresses not 32-bit aligned */
 	if ((dma_params.src_start & 0x2) || (dma_params.dst_start & 0x2)) {
 		DBG(1, "using 16x16 async dma from 0x%08lx to 0x%08lx\n",
-		    dma_params.src_start, dma_params.dst_start);
+			dma_params.src_start, dma_params.dst_start);
 		dma_params.data_type = OMAP_DMA_DATA_TYPE_S16;
 		dma_params.elem_count = 16;		/* 16x16-bit burst */
 
@@ -353,8 +353,8 @@ static int tusb_omap_dma_program(struct dma_channel *channel, u16 packet_sz,
 			dma_params.src_start =(unsigned long) fifo;
 	} else {
 		DBG(1, "ep%i %s using 16x32 sync dma from 0x%08lx to 0x%08lx\n",
-		       chdat->epnum, chdat->tx ? "tx" : "rx",
-		       dma_params.src_start, dma_params.dst_start);
+			chdat->epnum, chdat->tx ? "tx" : "rx",
+			dma_params.src_start, dma_params.dst_start);
 	}
 
 	omap_set_dma_params(ch, &dma_params);
@@ -378,7 +378,7 @@ static int tusb_omap_dma_program(struct dma_channel *channel, u16 packet_sz,
 		csr |= MGC_M_RXCSR_DMAENAB;
 		csr &= ~(MGC_M_RXCSR_AUTOCLEAR | MGC_M_RXCSR_DMAMODE);
 		musb_writew(hw_ep->regs, MGC_O_HDRC_RXCSR,
-			       csr | MGC_M_RXCSR_P_WZC_BITS);
+			csr | MGC_M_RXCSR_P_WZC_BITS);
 	}
 
 	/*
@@ -391,14 +391,14 @@ static int tusb_omap_dma_program(struct dma_channel *channel, u16 packet_sz,
 		musb_writel(ep_conf, TUSB_EP_MAX_PACKET_SIZE_OFFSET, packet_sz);
 
 		musb_writel(ep_conf, TUSB_EP_TX_OFFSET,
-			    TUSB_EP_CONFIG_XFR_SIZE(transfer_len));
+			TUSB_EP_CONFIG_XFR_SIZE(transfer_len));
 	} else {
 		/* Receive packet_sz packets at a time */
 		musb_writel(ep_conf, TUSB_EP_MAX_PACKET_SIZE_OFFSET,
-			    packet_sz << 16);
+			packet_sz << 16);
 
 		musb_writel(ep_conf, TUSB_EP_RX_OFFSET,
-			    TUSB_EP_CONFIG_XFR_SIZE(transfer_len));
+			TUSB_EP_CONFIG_XFR_SIZE(transfer_len));
 	}
 
 	return TRUE;
@@ -548,8 +548,7 @@ tusb_omap_dma_allocate(struct dma_controller *c,
 			goto free_dmareq;
 
 		ret = omap_request_dma(chdat->sync_dev, dev_name,
-				       tusb_omap_dma_cb,
-				       channel, &chdat->ch);
+				tusb_omap_dma_cb, channel, &chdat->ch);
 		if (ret != 0)
 			goto free_dmareq;
 	} else if (tusb_dma->ch == -1) {
@@ -558,8 +557,7 @@ tusb_omap_dma_allocate(struct dma_controller *c,
 
 		/* Callback data gets set later in the shared dmareq case */
 		ret = omap_request_dma(tusb_dma->sync_dev, "TUSB shared",
-				       tusb_omap_dma_cb,
-				       NULL, &tusb_dma->ch);
+				tusb_omap_dma_cb, NULL, &tusb_dma->ch);
 		if (ret != 0)
 			goto free_dmareq;
 
@@ -568,12 +566,12 @@ tusb_omap_dma_allocate(struct dma_controller *c,
 	}
 
 	DBG(1, "ep%i %s dma: %s dma%i dmareq%i sync%i\n",
-	    chdat->epnum,
-	    chdat->tx ? "tx" : "rx",
-	    chdat->ch >=0 ? "dedicated" : "shared",
-	    chdat->ch >= 0 ? chdat->ch : tusb_dma->ch,
-	    chdat->dmareq >= 0 ? chdat->dmareq : tusb_dma->dmareq,
-	    chdat->sync_dev >= 0 ? chdat->sync_dev : tusb_dma->sync_dev);
+		chdat->epnum,
+		chdat->tx ? "tx" : "rx",
+		chdat->ch >=0 ? "dedicated" : "shared",
+		chdat->ch >= 0 ? chdat->ch : tusb_dma->ch,
+		chdat->dmareq >= 0 ? chdat->dmareq : tusb_dma->dmareq,
+		chdat->sync_dev >= 0 ? chdat->sync_dev : tusb_dma->sync_dev);
 
 	return channel;
 
@@ -665,9 +663,9 @@ tusb_omap_dma_init(struct musb *musb, void __iomem *base)
 	musb_writel(musb->ctrl_base, TUSB_DMA_EP_MAP, 0);
 
 	musb_writel(tusb_base, TUSB_DMA_REQ_CONF,
-		    TUSB_DMA_REQ_CONF_BURST_SIZE(2) |
-		    TUSB_DMA_REQ_CONF_DMA_REQ_EN(0x3f) |
-		    TUSB_DMA_REQ_CONF_DMA_REQ_ASSER(2));
+		TUSB_DMA_REQ_CONF_BURST_SIZE(2)
+		| TUSB_DMA_REQ_CONF_DMA_REQ_EN(0x3f)
+		| TUSB_DMA_REQ_CONF_DMA_REQ_ASSER(2));
 
 	tusb_dma = kzalloc(sizeof(struct tusb_omap_dma), GFP_KERNEL);
 	if (!tusb_dma)

drivers/usb/musb/virthub.c

@@ -132,7 +132,7 @@ void musb_root_disconnect(struct musb *musb)
 		| USB_PORT_STAT_LOW_SPEED
 		| USB_PORT_STAT_HIGH_SPEED
 		| USB_PORT_STAT_TEST
-		 );
+		);
 	musb->port1_status |= USB_PORT_STAT_C_CONNECTION << 16;
 	usb_hcd_poll_rh_status(musb_to_hcd(musb));