Commit f60b03b4 authored by Felipe Balbi's avatar Felipe Balbi Committed by Kevin Hilman

arch: davinci: pass emif control base via resource

Later patch will come to use it in davinci_nand.c and get
rid of a define there. In DM355, the base is different, so
better to apply this patch before adding support for DM355
nand chip.
Signed-off-by: default avatarFelipe Balbi <felipe.balbi@nokia.com>
parent b1e984d0
...@@ -44,6 +44,7 @@ ...@@ -44,6 +44,7 @@
#define DAVINCI_CFC_ATA_BASE 0x01C66000 #define DAVINCI_CFC_ATA_BASE 0x01C66000
#define DAVINCI_ASYNC_EMIF_CONTROL_BASE 0x01e00000
#define DAVINCI_ASYNC_EMIF_DATA_CE0_BASE 0x02000000 #define DAVINCI_ASYNC_EMIF_DATA_CE0_BASE 0x02000000
#define DAVINCI_ASYNC_EMIF_DATA_CE1_BASE 0x04000000 #define DAVINCI_ASYNC_EMIF_DATA_CE1_BASE 0x04000000
#define DAVINCI_ASYNC_EMIF_DATA_CE2_BASE 0x06000000 #define DAVINCI_ASYNC_EMIF_DATA_CE2_BASE 0x06000000
...@@ -122,10 +123,16 @@ static struct flash_platform_data davinci_evm_nandflash_data = { ...@@ -122,10 +123,16 @@ static struct flash_platform_data davinci_evm_nandflash_data = {
.nr_parts = ARRAY_SIZE(davinci_evm_nandflash_partition), .nr_parts = ARRAY_SIZE(davinci_evm_nandflash_partition),
}; };
static struct resource davinci_evm_nandflash_resource = { static struct resource davinci_evm_nandflash_resource[] = {
.start = DAVINCI_ASYNC_EMIF_DATA_CE0_BASE, {
.end = DAVINCI_ASYNC_EMIF_DATA_CE0_BASE + SZ_16M - 1, .start = DAVINCI_ASYNC_EMIF_DATA_CE0_BASE,
.flags = IORESOURCE_MEM, .end = DAVINCI_ASYNC_EMIF_DATA_CE0_BASE + SZ_16M - 1,
.flags = IORESOURCE_MEM,
}, {
.start = DAVINCI_ASYNC_EMIF_CONTROL_BASE,
.end = DAVINCI_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
.flags = IORESOURCE_MEM,
},
}; };
static struct platform_device davinci_evm_nandflash_device = { static struct platform_device davinci_evm_nandflash_device = {
...@@ -134,8 +141,8 @@ static struct platform_device davinci_evm_nandflash_device = { ...@@ -134,8 +141,8 @@ static struct platform_device davinci_evm_nandflash_device = {
.dev = { .dev = {
.platform_data = &davinci_evm_nandflash_data, .platform_data = &davinci_evm_nandflash_data,
}, },
.num_resources = 1, .num_resources = ARRAY_SIZE(davinci_evm_nandflash_resource),
.resource = &davinci_evm_nandflash_resource, .resource = davinci_evm_nandflash_resource,
}; };
static u64 davinci_fb_dma_mask = DMA_32BIT_MASK; static u64 davinci_fb_dma_mask = DMA_32BIT_MASK;
......
...@@ -54,6 +54,7 @@ ...@@ -54,6 +54,7 @@
#include <mach/serial.h> #include <mach/serial.h>
#include <mach/psc.h> #include <mach/psc.h>
#define DAVINCI_ASYNC_EMIF_CONTROL_BASE 0x01e00000
#define DAVINCI_ASYNC_EMIF_DATA_CE0_BASE 0x02000000 #define DAVINCI_ASYNC_EMIF_DATA_CE0_BASE 0x02000000
struct mtd_partition davinci_sffsdr_nandflash_partition[] = { struct mtd_partition davinci_sffsdr_nandflash_partition[] = {
...@@ -82,10 +83,16 @@ static struct flash_platform_data davinci_sffsdr_nandflash_data = { ...@@ -82,10 +83,16 @@ static struct flash_platform_data davinci_sffsdr_nandflash_data = {
.nr_parts = ARRAY_SIZE(davinci_sffsdr_nandflash_partition), .nr_parts = ARRAY_SIZE(davinci_sffsdr_nandflash_partition),
}; };
static struct resource davinci_sffsdr_nandflash_resource = { static struct resource davinci_sffsdr_nandflash_resource[] = {
.start = DAVINCI_ASYNC_EMIF_DATA_CE0_BASE, {
.end = DAVINCI_ASYNC_EMIF_DATA_CE0_BASE + SZ_16M - 1, .start = DAVINCI_ASYNC_EMIF_DATA_CE0_BASE,
.flags = IORESOURCE_MEM, .end = DAVINCI_ASYNC_EMIF_DATA_CE0_BASE + SZ_16M - 1,
.flags = IORESOURCE_MEM,
}, {
.start = DAVINCI_ASYNC_EMIF_CONTROL_BASE,
.end = DAVINCI_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
.flags = IORESOURCE_MEM,
},
}; };
static struct platform_device davinci_sffsdr_nandflash_device = { static struct platform_device davinci_sffsdr_nandflash_device = {
...@@ -94,8 +101,8 @@ static struct platform_device davinci_sffsdr_nandflash_device = { ...@@ -94,8 +101,8 @@ static struct platform_device davinci_sffsdr_nandflash_device = {
.dev = { .dev = {
.platform_data = &davinci_sffsdr_nandflash_data, .platform_data = &davinci_sffsdr_nandflash_data,
}, },
.num_resources = 1, .num_resources = ARRAY_SIZE(davinci_sffsdr_nandflash_resource),
.resource = &davinci_sffsdr_nandflash_resource, .resource = davinci_sffsdr_nandflash_resource,
}; };
/* Get Ethernet address from kernel boot params */ /* Get Ethernet address from kernel boot params */
......
...@@ -52,9 +52,6 @@ ...@@ -52,9 +52,6 @@
#include <asm/mach/flash.h> #include <asm/mach/flash.h>
/* FIXME: this should be passed in using platform_data */
#define DAVINCI_ASYNC_EMIF_CNTRL_BASE (0x01E00000)
#ifdef CONFIG_NAND_FLASH_HW_ECC #ifdef CONFIG_NAND_FLASH_HW_ECC
#define DAVINCI_NAND_ECC_MODE NAND_ECC_HW3_512 #define DAVINCI_NAND_ECC_MODE NAND_ECC_HW3_512
#else #else
...@@ -65,6 +62,7 @@ ...@@ -65,6 +62,7 @@
static struct clk *nand_clock; static struct clk *nand_clock;
static void __iomem *nand_vaddr; static void __iomem *nand_vaddr;
static void __iomem *emif_base;
/* /*
* MTD structure for DaVinici board * MTD structure for DaVinici board
...@@ -95,12 +93,12 @@ static struct nand_bbt_descr davinci_memorybased_large = { ...@@ -95,12 +93,12 @@ static struct nand_bbt_descr davinci_memorybased_large = {
inline unsigned int davinci_nand_readl(int offset) inline unsigned int davinci_nand_readl(int offset)
{ {
return davinci_readl(DAVINCI_ASYNC_EMIF_CNTRL_BASE + offset); return __raw_readl(emif_base + offset);
} }
inline void davinci_nand_writel(unsigned long value, int offset) inline void davinci_nand_writel(unsigned long value, int offset)
{ {
davinci_writel(value, DAVINCI_ASYNC_EMIF_CNTRL_BASE + offset); __raw_writel(value, emif_base + offset);
} }
/* /*
...@@ -479,6 +477,7 @@ int __devinit nand_davinci_probe(struct platform_device *pdev) ...@@ -479,6 +477,7 @@ int __devinit nand_davinci_probe(struct platform_device *pdev)
{ {
struct flash_platform_data *pdata = pdev->dev.platform_data; struct flash_platform_data *pdata = pdev->dev.platform_data;
struct resource *res = pdev->resource; struct resource *res = pdev->resource;
struct resource *res2 = platform_get_resource(pdev, IORESOURCE_MEM, 1);
struct nand_chip *chip; struct nand_chip *chip;
struct device *dev = NULL; struct device *dev = NULL;
u32 nand_rev_code; u32 nand_rev_code;
...@@ -524,7 +523,8 @@ int __devinit nand_davinci_probe(struct platform_device *pdev) ...@@ -524,7 +523,8 @@ int __devinit nand_davinci_probe(struct platform_device *pdev)
(nand_rev_code >> 8) & 0xff, nand_rev_code & 0xff); (nand_rev_code >> 8) & 0xff, nand_rev_code & 0xff);
nand_vaddr = ioremap(res->start, res->end - res->start); nand_vaddr = ioremap(res->start, res->end - res->start);
if (nand_vaddr == NULL) { emif_base = ioremap(res2->start, res2->end - res2->start);
if (nand_vaddr == NULL || emif_base == NULL) {
printk(KERN_ERR "DaVinci NAND: ioremap failed.\n"); printk(KERN_ERR "DaVinci NAND: ioremap failed.\n");
clk_disable(nand_clock); clk_disable(nand_clock);
kfree(nand_davinci_mtd); kfree(nand_davinci_mtd);
...@@ -602,6 +602,9 @@ static int nand_davinci_remove(struct platform_device *pdev) ...@@ -602,6 +602,9 @@ static int nand_davinci_remove(struct platform_device *pdev)
if (nand_vaddr) if (nand_vaddr)
iounmap(nand_vaddr); iounmap(nand_vaddr);
if (emif_base)
iounmap(emif_base);
/* Release resources, unregister device */ /* Release resources, unregister device */
nand_release(nand_davinci_mtd); nand_release(nand_davinci_mtd);
......
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