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Commit f606ddf4 authored by Adrian Bunk's avatar Adrian Bunk Committed by Linus Torvalds
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remove the v850 port 

Trying to compile the v850 port brings many compile errors, one of them exists
since at least kernel 2.6.19.

There also seems to be noone willing to bring this port back into a usable
state.

This patch therefore removes the v850 port.

If anyone ever decides to revive the v850 port the code will still be
available from older kernels, and it wouldn't be impossible for the port to
reenter the kernel if it would become actively maintained again.
Signed-off-by: default avatarAdrian Bunk <bunk@kernel.org>
Acked-by: default avatarGreg Ungerer <gerg@uclinux.org>
Signed-off-by: default avatarAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: default avatarLinus Torvalds <torvalds@linux-foundation.org>
parent 99764fa4
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MAINTAINERS
View file @ f606ddf4
......@@ -4131,9 +4131,6 @@ W: http://www.uclinux.org/
L: uclinux-dev@uclinux.org (subscribers-only)
S: Maintained
UCLINUX FOR NEC V850
P: Miles Bader
UCLINUX FOR RENESAS H8/300
P: Yoshinori Sato
M: ysato@users.sourceforge.jp
......
arch/v850/Kconfig deleted 100644 → 0
View file @ 99764fa4
#############################################################################
#
# For a description of the syntax of this configuration file,
# see Documentation/kbuild/kconfig-language.txt.
#
#############################################################################
mainmenu "uClinux/v850 (w/o MMU) Kernel Configuration"
config MMU
bool
default n
config ZONE_DMA
bool
default y
config RWSEM_GENERIC_SPINLOCK
bool
default y
config RWSEM_XCHGADD_ALGORITHM
bool
default n
config GENERIC_FIND_NEXT_BIT
bool
default y
config GENERIC_HWEIGHT
bool
default y
config GENERIC_CALIBRATE_DELAY
bool
default y
config GENERIC_HARDIRQS
bool
default y
config GENERIC_IRQ_PROBE
bool
default y
config GENERIC_TIME
bool
default y
config TIME_LOW_RES
bool
default y
config ARCH_HAS_ILOG2_U32
bool
default n
config ARCH_HAS_ILOG2_U64
bool
default n
config ARCH_SUPPORTS_AOUT
def_bool y
# Turn off some random 386 crap that can affect device config
config ISA
bool
default n
config ISAPNP
bool
default n
config EISA
bool
default n
config MCA
bool
default n
#############################################################################
#### v850-specific config
# Define the architecture
config V850
bool
default y
select HAVE_IDE
menu "Processor type and features"
choice
prompt "Platform"
default GDB
config V850E_SIM
bool "GDB"
config RTE_CB_MA1
bool "RTE-V850E/MA1-CB"
config RTE_CB_NB85E
bool "RTE-V850E/NB85E-CB"
config RTE_CB_ME2
bool "RTE-V850E/ME2-CB"
config V850E_AS85EP1
bool "AS85EP1"
config V850E2_SIM85E2C
bool "sim85e2c"
config V850E2_SIM85E2S
bool "sim85e2s"
config V850E2_FPGA85E2C
bool "NA85E2C-FPGA"
config V850E2_ANNA
bool "Anna"
endchoice
#### V850E processor-specific config
# All CPUs currently supported use the v850e architecture
config V850E
bool
default y
# The RTE-V850E/MA1-CB is the only type of V850E/MA1 platform we
# currently support
config V850E_MA1
bool
depends on RTE_CB_MA1
default y
# Similarly for the RTE-V850E/NB85E-CB - V850E/TEG
config V850E_TEG
bool
depends on RTE_CB_NB85E
default y
# ... and the RTE-V850E/ME2-CB - V850E/ME2
config V850E_ME2
bool
depends on RTE_CB_ME2
default y
#### sim85e2-specific config
config V850E2_SIM85E2
bool
depends on V850E2_SIM85E2C || V850E2_SIM85E2S
default y
#### V850E2 processor-specific config
# V850E2 processors
config V850E2
bool
depends on V850E2_SIM85E2 || V850E2_FPGA85E2C || V850E2_ANNA
default y
#### RTE-CB platform-specific config
# Boards in the RTE-x-CB series
config RTE_CB
bool
depends on RTE_CB_MA1 || RTE_CB_NB85E || RTE_CB_ME2
default y
config RTE_CB_MULTI
bool
# RTE_CB_NB85E can either have multi ROM support or not, but
# other platforms (currently only RTE_CB_MA1) require it.
prompt "Multi monitor ROM support" if RTE_CB_NB85E
depends on RTE_CB_MA1 || RTE_CB_NB85E
default y
config RTE_CB_MULTI_DBTRAP
bool "Pass illegal insn trap / dbtrap to kernel"
depends on RTE_CB_MULTI
default n
config RTE_CB_MA1_KSRAM
bool "Kernel in SRAM (limits size of kernel)"
depends on RTE_CB_MA1 && RTE_CB_MULTI
default n
config RTE_MB_A_PCI
bool "Mother-A PCI support"
depends on RTE_CB
default y
# The GBUS is used to talk to the RTE-MOTHER-A board
config RTE_GBUS_INT
bool
depends on RTE_MB_A_PCI
default y
# The only PCI bus we support is on the RTE-MOTHER-A board
config PCI
bool
default RTE_MB_A_PCI
#### Some feature-specific configs
# Everything except for the GDB simulator uses the same interrupt controller
config V850E_INTC
bool
default !V850E_SIM
# Everything except for the various simulators uses the "Timer D" unit
config V850E_TIMER_D
bool
default !V850E_SIM && !V850E2_SIM85E2
# Cache control used on some v850e1 processors
config V850E_CACHE
bool
default V850E_TEG || V850E_ME2
# Cache control used on v850e2 processors; I think this should
# actually apply to more, but currently only the SIM85E2S uses it
config V850E2_CACHE
bool
default V850E2_SIM85E2S
config NO_CACHE
bool
default !V850E_CACHE && !V850E2_CACHE
# HZ depends on the platform
config HZ
int
default 24 if V850E_SIM || V850E2_SIM85E2
default 122 if V850E2_FPGA85E2C
default 100
#### Misc config
config ROM_KERNEL
bool "Kernel in ROM"
depends on V850E2_ANNA || V850E_AS85EP1 || RTE_CB_ME2
# Some platforms pre-zero memory, in which case the kernel doesn't need to
config ZERO_BSS
bool
depends on !V850E2_SIM85E2C
default y
# The crappy-ass zone allocator requires that the start of allocatable
# memory be aligned to the largest possible allocation.
config FORCE_MAX_ZONEORDER
int
default 8 if V850E2_SIM85E2C || V850E2_FPGA85E2C
config V850E_HIGHRES_TIMER
bool "High resolution timer support"
depends on V850E_TIMER_D
config TIME_BOOTUP
bool "Time bootup"
depends on V850E_HIGHRES_TIMER
config RESET_GUARD
bool "Reset Guard"
source "mm/Kconfig"
endmenu
#############################################################################
source init/Kconfig
#############################################################################
menu "Bus options (PCI, PCMCIA, EISA, MCA, ISA)"
# config PCI
# bool "PCI support"
# help
# Support for PCI bus.
source "drivers/pci/Kconfig"
source "drivers/pcmcia/Kconfig"
source "drivers/pci/hotplug/Kconfig"
endmenu
menu "Executable file formats"
source "fs/Kconfig.binfmt"
endmenu
source "net/Kconfig"
#############################################################################
source "drivers/base/Kconfig"
source drivers/mtd/Kconfig
source drivers/parport/Kconfig
#source drivers/pnp/Kconfig
source drivers/block/Kconfig
#############################################################################
menu "Disk device support"
source "drivers/ide/Kconfig"
source "drivers/scsi/Kconfig"
endmenu
#############################################################################
source "drivers/md/Kconfig"
source "drivers/message/fusion/Kconfig"
source "drivers/ieee1394/Kconfig"
source "drivers/message/i2o/Kconfig"
source "drivers/net/Kconfig"
source "drivers/isdn/Kconfig"
#source "drivers/telephony/Kconfig"
#
# input before char - char/joystick depends on it. As does USB.
#
source "drivers/input/Kconfig"
source "drivers/char/Kconfig"
#source drivers/misc/Config.in
source "drivers/media/Kconfig"
source "fs/Kconfig"
source "drivers/video/Kconfig"
source "sound/Kconfig"
source "drivers/usb/Kconfig"
source "arch/v850/Kconfig.debug"
source "security/Kconfig"
source "crypto/Kconfig"
source "lib/Kconfig"
#############################################################################
arch/v850/Kconfig.debug deleted 100644 → 0
View file @ 99764fa4
menu "Kernel hacking"
source "lib/Kconfig.debug"
config NO_KERNEL_MSG
bool "Suppress Kernel BUG Messages"
help
Do not output any debug BUG messages within the kernel.
endmenu
arch/v850/Makefile deleted 100644 → 0
View file @ 99764fa4
#
# arch/v850/Makefile
#
# Copyright (C) 2001,02,03,05 NEC Corporation
# Copyright (C) 2001,02,03,05 Miles Bader <miles@gnu.org>
#
# This file is included by the global makefile so that you can add your own
# architecture-specific flags and dependencies. Remember to do have actions
# for "archclean" and "archdep" for cleaning up and making dependencies for
# this architecture
#
# This file is subject to the terms and conditions of the GNU General Public
# License. See the file "COPYING" in the main directory of this archive
# for more details.
#
arch_dir = arch/v850
KBUILD_CFLAGS += -mv850e
# r16 is a fixed pointer to the current task
KBUILD_CFLAGS += -ffixed-r16 -mno-prolog-function
KBUILD_CFLAGS += -fno-builtin
KBUILD_CFLAGS += -D__linux__ -DUTS_SYSNAME=\"uClinux\"
# By default, build a kernel that runs on the gdb v850 simulator.
KBUILD_DEFCONFIG := sim_defconfig
# This prevents the linker from consolidating the .gnu.linkonce.this_module
# section into .text (which the v850 default linker script for -r does for
# some reason)
LDFLAGS_MODULE += --unique=.gnu.linkonce.this_module
OBJCOPY_FLAGS_BLOB := -I binary -O elf32-little -B v850e
head-y := $(arch_dir)/kernel/head.o $(arch_dir)/kernel/init_task.o
core-y += $(arch_dir)/kernel/
libs-y += $(arch_dir)/lib/
# Deal with the initial contents of the root device
ifdef ROOT_FS_IMAGE
core-y += root_fs_image.o
# Because the kernel build-system erases all explicit .o build rules, we
# have to use an intermediate target to fool it into building for us.
# This results in it being built anew each time, but that's alright.
root_fs_image.o: root_fs_image_force
root_fs_image_force: $(ROOT_FS_IMAGE)
$(OBJCOPY) $(OBJCOPY_FLAGS_BLOB) --rename-section .data=.root,alloc,load,readonly,data,contents $< root_fs_image.o
endif
CLEAN_FILES += root_fs_image.o
arch/v850/README deleted 100644 → 0
View file @ 99764fa4
This port to the NEC V850E processor supports the following platforms:
"sim"
The gdb v850e simulator (CONFIG_V850E_SIM).
"rte-ma1-cb"
The Midas labs RTE-V850E/MA1-CB and RTE-V850E/NB85E-CB evaluation
boards (CONFIG_RTE_CB_MA1 and CONFIG_RTE_CB_NB85E). This support
has only been tested when running with the Multi-debugger monitor
ROM (for the Green Hills Multi debugger). The optional NEC
Solution Gear RTE-MOTHER-A motherboard is also supported, which
allows PCI boards to be used (CONFIG_RTE_MB_A_PCI).
"rte-me2-cb"
The Midas labs RTE-V850E/ME2-CB evaluation board (CONFIG_RTE_CB_ME2).
This has only been tested using a kernel downloaded via an ICE
connection using the Multi debugger. Support for the RTE-MOTHER-A is
present, but hasn't been tested (unlike the other Midas labs cpu
boards, the RTE-V850E/ME2-CB includes an ethernet adaptor).
"as85ep1"
The NEC AS85EP1 V850E evaluation chip/board (CONFIG_V850E_AS85EP1).
"anna"
The NEC `Anna' (board/chip) implementation of the V850E2 processor
(CONFIG_V850E2_ANNA).
"sim85e2c", "sim85e2s"
The sim85e2c and sim85e2s simulators, which are verilog simulations
of the V850E2 NA85E2C/NA85E2S cpu cores (CONFIG_V850E2_SIM85E2C and
CONFIG_V850E2_SIM85E2S).
"fpga85e2c"
A FPGA implementation of the V850E2 NA85E2C cpu core
(CONFIG_V850E2_FPGA85E2C).
To get a default kernel configuration for a particular platform, you can
use a <platform>_defconfig make target (e.g., "make rte-me2-cb_defconfig");
to see which default configurations are possible, look in the directory
"arch/v850/configs".
Porting to anything with a V850E/MA1 or MA2 processor should be simple.
See the file <asm-v850/machdep.h> and the files it includes for an example of
how to add platform/chip-specific support.
arch/v850/configs/rte-ma1-cb_defconfig deleted 100644 → 0
View file @ 99764fa4
This diff is collapsed.
arch/v850/configs/rte-me2-cb_defconfig deleted 100644 → 0
View file @ 99764fa4
#
# Automatically generated make config: don't edit
# Linux kernel version: 2.6.13-uc0
# Fri Sep 2 13:47:50 2005
#
# CONFIG_MMU is not set
# CONFIG_UID16 is not set
CONFIG_RWSEM_GENERIC_SPINLOCK=y
# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
CONFIG_GENERIC_CALIBRATE_DELAY=y
# CONFIG_ISA is not set
# CONFIG_ISAPNP is not set
# CONFIG_EISA is not set
# CONFIG_MCA is not set
CONFIG_V850=y
#
# Processor type and features
#
# CONFIG_V850E_SIM is not set
# CONFIG_RTE_CB_MA1 is not set
# CONFIG_RTE_CB_NB85E is not set
CONFIG_RTE_CB_ME2=y
# CONFIG_V850E_AS85EP1 is not set
# CONFIG_V850E2_SIM85E2C is not set
# CONFIG_V850E2_SIM85E2S is not set
# CONFIG_V850E2_FPGA85E2C is not set
# CONFIG_V850E2_ANNA is not set
CONFIG_V850E=y
CONFIG_V850E_ME2=y
CONFIG_RTE_CB=y
# CONFIG_RTE_MB_A_PCI is not set
# CONFIG_PCI is not set
CONFIG_V850E_INTC=y
CONFIG_V850E_TIMER_D=y
CONFIG_V850E_CACHE=y
# CONFIG_V850E2_CACHE is not set
# CONFIG_NO_CACHE is not set
# CONFIG_ROM_KERNEL is not set
CONFIG_ZERO_BSS=y
# CONFIG_V850E_HIGHRES_TIMER is not set
# CONFIG_RESET_GUARD is not set
CONFIG_LARGE_ALLOCS=y
CONFIG_FLATMEM=y
CONFIG_FLAT_NODE_MEM_MAP=y
#
# Code maturity level options
#
# CONFIG_EXPERIMENTAL is not set
CONFIG_CLEAN_COMPILE=y
CONFIG_BROKEN_ON_SMP=y
CONFIG_INIT_ENV_ARG_LIMIT=32
#
# General setup
#
CONFIG_LOCALVERSION=""
# CONFIG_BSD_PROCESS_ACCT is not set
# CONFIG_SYSCTL is not set
# CONFIG_HOTPLUG is not set
# CONFIG_IKCONFIG is not set
CONFIG_EMBEDDED=y
# CONFIG_KALLSYMS is not set
CONFIG_PRINTK=y
CONFIG_BUG=y
# CONFIG_BASE_FULL is not set
# CONFIG_FUTEX is not set
# CONFIG_EPOLL is not set
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_CC_ALIGN_FUNCTIONS=0
CONFIG_CC_ALIGN_LABELS=0
CONFIG_CC_ALIGN_LOOPS=0
CONFIG_CC_ALIGN_JUMPS=0
CONFIG_BASE_SMALL=1
#
# Loadable module support
#
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
CONFIG_OBSOLETE_MODPARM=y
# CONFIG_MODULE_SRCVERSION_ALL is not set
CONFIG_KMOD=y
#
# Bus options (PCI, PCMCIA, EISA, MCA, ISA)
#
#
# PCCARD (PCMCIA/CardBus) support
#
# CONFIG_PCCARD is not set
#
# PCI Hotplug Support
#
#
# Executable file formats
#
CONFIG_BINFMT_FLAT=y
# CONFIG_BINFMT_ZFLAT is not set
# CONFIG_BINFMT_SHARED_FLAT is not set
# CONFIG_BINFMT_MISC is not set
#
# Networking
#
# CONFIG_NET is not set
#
# Generic Driver Options
#
CONFIG_STANDALONE=y
CONFIG_PREVENT_FIRMWARE_BUILD=y
# CONFIG_FW_LOADER is not set
# CONFIG_DEBUG_DRIVER is not set
#
# Memory Technology Devices (MTD)
#
CONFIG_MTD=y
# CONFIG_MTD_DEBUG is not set
# CONFIG_MTD_CONCAT is not set
# CONFIG_MTD_PARTITIONS is not set
#
# User Modules And Translation Layers
#
# CONFIG_MTD_CHAR is not set
CONFIG_MTD_BLOCK=y
# CONFIG_FTL is not set
# CONFIG_NFTL is not set
# CONFIG_INFTL is not set
#
# RAM/ROM/Flash chip drivers
#
# CONFIG_MTD_CFI is not set
# CONFIG_MTD_JEDECPROBE is not set
CONFIG_MTD_MAP_BANK_WIDTH_1=y
CONFIG_MTD_MAP_BANK_WIDTH_2=y
CONFIG_MTD_MAP_BANK_WIDTH_4=y
# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
CONFIG_MTD_CFI_I1=y
CONFIG_MTD_CFI_I2=y
# CONFIG_MTD_CFI_I4 is not set
# CONFIG_MTD_CFI_I8 is not set
# CONFIG_MTD_RAM is not set
# CONFIG_MTD_ROM is not set
# CONFIG_MTD_ABSENT is not set
#
# Mapping drivers for chip access
#
# CONFIG_MTD_COMPLEX_MAPPINGS is not set
# CONFIG_MTD_PLATRAM is not set
#
# Self-contained MTD device drivers
#
CONFIG_MTD_SLRAM=y
# CONFIG_MTD_PHRAM is not set
# CONFIG_MTD_MTDRAM is not set
# CONFIG_MTD_BLKMTD is not set
#
# Disk-On-Chip Device Drivers
#
# CONFIG_MTD_DOC2000 is not set
# CONFIG_MTD_DOC2001 is not set
# CONFIG_MTD_DOC2001PLUS is not set
#
# NAND Flash Device Drivers
#
# CONFIG_MTD_NAND is not set
#
# Parallel port support
#
# CONFIG_PARPORT is not set
#
# Block devices
#
# CONFIG_BLK_DEV_FD is not set
# CONFIG_BLK_DEV_COW_COMMON is not set
# CONFIG_BLK_DEV_LOOP is not set
# CONFIG_BLK_DEV_RAM is not set
CONFIG_BLK_DEV_RAM_COUNT=16
CONFIG_INITRAMFS_SOURCE=""
# CONFIG_CDROM_PKTCDVD is not set
#
# IO Schedulers
#
CONFIG_IOSCHED_NOOP=y
# CONFIG_IOSCHED_AS is not set
# CONFIG_IOSCHED_DEADLINE is not set
# CONFIG_IOSCHED_CFQ is not set
#
# Disk device support
#
#
# ATA/ATAPI/MFM/RLL support
#
# CONFIG_IDE is not set
#
# SCSI device support
#
# CONFIG_SCSI is not set
#
# Multi-device support (RAID and LVM)
#
# CONFIG_MD is not set
#
# Fusion MPT device support
#
# CONFIG_FUSION is not set
#
# IEEE 1394 (FireWire) support
#
#
# I2O device support
#
#
# Network device support
#
# CONFIG_NETPOLL is not set
# CONFIG_NET_POLL_CONTROLLER is not set
#
# ISDN subsystem
#
#
# Input device support
#
CONFIG_INPUT=y
#
# Userland interfaces
#
# CONFIG_INPUT_MOUSEDEV is not set
# CONFIG_INPUT_JOYDEV is not set
# CONFIG_INPUT_TSDEV is not set
# CONFIG_INPUT_EVDEV is not set
# CONFIG_INPUT_EVBUG is not set
#
# Input Device Drivers
#
# CONFIG_INPUT_KEYBOARD is not set
# CONFIG_INPUT_MOUSE is not set
# CONFIG_INPUT_JOYSTICK is not set
# CONFIG_INPUT_TOUCHSCREEN is not set
# CONFIG_INPUT_MISC is not set
#
# Hardware I/O ports
#
CONFIG_SERIO=y
# CONFIG_SERIO_I8042 is not set
# CONFIG_SERIO_SERPORT is not set
# CONFIG_SERIO_LIBPS2 is not set
# CONFIG_SERIO_RAW is not set
# CONFIG_GAMEPORT is not set
#
# Character devices
#
# CONFIG_VT is not set
# CONFIG_SERIAL_NONSTANDARD is not set
#
# Serial drivers
#
CONFIG_SERIAL_8250=y
CONFIG_SERIAL_8250_CONSOLE=y
CONFIG_SERIAL_8250_NR_UARTS=1
# CONFIG_SERIAL_8250_EXTENDED is not set
#
# Non-8250 serial port support
#
# CONFIG_V850E_UART is not set
CONFIG_SERIAL_CORE=y
CONFIG_SERIAL_CORE_CONSOLE=y
# CONFIG_UNIX98_PTYS is not set
# CONFIG_LEGACY_PTYS is not set
#
# IPMI
#
# CONFIG_IPMI_HANDLER is not set
#
# Watchdog Cards
#
# CONFIG_WATCHDOG is not set
# CONFIG_RTC is not set
# CONFIG_GEN_RTC is not set
# CONFIG_DTLK is not set
# CONFIG_R3964 is not set
#
# Ftape, the floppy tape device driver
#
# CONFIG_RAW_DRIVER is not set
#
# TPM devices
#
#
# Multimedia devices
#
# CONFIG_VIDEO_DEV is not set
#
# Digital Video Broadcasting Devices
#
#
# File systems
#
# CONFIG_EXT2_FS is not set
# CONFIG_EXT3_FS is not set
# CONFIG_JBD is not set
# CONFIG_REISERFS_FS is not set
# CONFIG_JFS_FS is not set
# CONFIG_FS_POSIX_ACL is not set
#
# XFS support
#
# CONFIG_XFS_FS is not set
# CONFIG_MINIX_FS is not set
CONFIG_ROMFS_FS=y
# CONFIG_MAGIC_ROM_PTR is not set
CONFIG_INOTIFY=y
# CONFIG_QUOTA is not set
CONFIG_DNOTIFY=y
# CONFIG_AUTOFS_FS is not set
# CONFIG_AUTOFS4_FS is not set
#
# CD-ROM/DVD Filesystems
#
# CONFIG_ISO9660_FS is not set
# CONFIG_UDF_FS is not set
#
# DOS/FAT/NT Filesystems
#
# CONFIG_MSDOS_FS is not set
# CONFIG_VFAT_FS is not set
# CONFIG_NTFS_FS is not set
#
# Pseudo filesystems
#
CONFIG_PROC_FS=y
CONFIG_SYSFS=y
# CONFIG_TMPFS is not set
# CONFIG_HUGETLB_PAGE is not set
CONFIG_RAMFS=y
#
# Miscellaneous filesystems
#
# CONFIG_HFSPLUS_FS is not set
# CONFIG_JFFS_FS is not set
# CONFIG_JFFS2_FS is not set
# CONFIG_CRAMFS is not set
# CONFIG_VXFS_FS is not set
# CONFIG_HPFS_FS is not set
# CONFIG_QNX4FS_FS is not set
# CONFIG_SYSV_FS is not set
# CONFIG_UFS_FS is not set
#
# Partition Types
#
# CONFIG_PARTITION_ADVANCED is not set
CONFIG_MSDOS_PARTITION=y
#
# Native Language Support
#
# CONFIG_NLS is not set
#
# Graphics support
#
# CONFIG_FB is not set
#
# Sound
#
# CONFIG_SOUND is not set
#
# USB support
#
# CONFIG_USB_ARCH_HAS_HCD is not set
# CONFIG_USB_ARCH_HAS_OHCI is not set
#
# USB Gadget Support
#
# CONFIG_USB_GADGET is not set
#
# Kernel hacking
#
# CONFIG_PRINTK_TIME is not set
CONFIG_DEBUG_KERNEL=y
# CONFIG_MAGIC_SYSRQ is not set
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_SCHEDSTATS is not set
# CONFIG_DEBUG_SLAB is not set
# CONFIG_DEBUG_SPINLOCK is not set
# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
# CONFIG_DEBUG_KOBJECT is not set
CONFIG_DEBUG_INFO=y
# CONFIG_DEBUG_FS is not set
# CONFIG_NO_KERNEL_MSG is not set
#
# Security options
#
# CONFIG_KEYS is not set
# CONFIG_SECURITY is not set
#
# Cryptographic options
#
# CONFIG_CRYPTO is not set
#
# Hardware crypto devices
#
#
# Library routines
#
# CONFIG_CRC_CCITT is not set
# CONFIG_CRC32 is not set
# CONFIG_LIBCRC32C is not set
arch/v850/configs/sim_defconfig deleted 100644 → 0
View file @ 99764fa4
#
# Automatically generated make config: don't edit
# Linux kernel version: 2.6.13-uc0
# Fri Sep 2 13:36:43 2005
#
# CONFIG_MMU is not set
# CONFIG_UID16 is not set
CONFIG_RWSEM_GENERIC_SPINLOCK=y
# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
CONFIG_GENERIC_CALIBRATE_DELAY=y
# CONFIG_ISA is not set
# CONFIG_ISAPNP is not set
# CONFIG_EISA is not set
# CONFIG_MCA is not set
CONFIG_V850=y
#
# Processor type and features
#
CONFIG_V850E_SIM=y
# CONFIG_RTE_CB_MA1 is not set
# CONFIG_RTE_CB_NB85E is not set
# CONFIG_RTE_CB_ME2 is not set
# CONFIG_V850E_AS85EP1 is not set
# CONFIG_V850E2_SIM85E2C is not set
# CONFIG_V850E2_SIM85E2S is not set
# CONFIG_V850E2_FPGA85E2C is not set
# CONFIG_V850E2_ANNA is not set
CONFIG_V850E=y
# CONFIG_PCI is not set
# CONFIG_V850E_INTC is not set
# CONFIG_V850E_TIMER_D is not set
# CONFIG_V850E_CACHE is not set
# CONFIG_V850E2_CACHE is not set
CONFIG_NO_CACHE=y
CONFIG_ZERO_BSS=y
# CONFIG_RESET_GUARD is not set
CONFIG_LARGE_ALLOCS=y
CONFIG_FLATMEM=y
CONFIG_FLAT_NODE_MEM_MAP=y
#
# Code maturity level options
#
# CONFIG_EXPERIMENTAL is not set
CONFIG_CLEAN_COMPILE=y
CONFIG_BROKEN_ON_SMP=y
CONFIG_INIT_ENV_ARG_LIMIT=32
#
# General setup
#
CONFIG_LOCALVERSION=""
# CONFIG_BSD_PROCESS_ACCT is not set
# CONFIG_SYSCTL is not set
# CONFIG_HOTPLUG is not set
# CONFIG_IKCONFIG is not set
CONFIG_EMBEDDED=y
# CONFIG_KALLSYMS is not set
CONFIG_PRINTK=y
CONFIG_BUG=y
# CONFIG_BASE_FULL is not set
# CONFIG_FUTEX is not set
# CONFIG_EPOLL is not set
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_CC_ALIGN_FUNCTIONS=0
CONFIG_CC_ALIGN_LABELS=0
CONFIG_CC_ALIGN_LOOPS=0
CONFIG_CC_ALIGN_JUMPS=0
CONFIG_BASE_SMALL=1
#
# Loadable module support
#
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
CONFIG_OBSOLETE_MODPARM=y
# CONFIG_MODULE_SRCVERSION_ALL is not set
CONFIG_KMOD=y
#
# Bus options (PCI, PCMCIA, EISA, MCA, ISA)
#
#
# PCCARD (PCMCIA/CardBus) support
#
# CONFIG_PCCARD is not set
#
# PCI Hotplug Support
#
#
# Executable file formats
#
CONFIG_BINFMT_FLAT=y
# CONFIG_BINFMT_ZFLAT is not set
# CONFIG_BINFMT_SHARED_FLAT is not set
# CONFIG_BINFMT_MISC is not set
#
# Networking
#
# CONFIG_NET is not set
#
# Generic Driver Options
#
CONFIG_STANDALONE=y
CONFIG_PREVENT_FIRMWARE_BUILD=y
# CONFIG_FW_LOADER is not set
# CONFIG_DEBUG_DRIVER is not set
#
# Memory Technology Devices (MTD)
#
CONFIG_MTD=y
# CONFIG_MTD_DEBUG is not set
# CONFIG_MTD_CONCAT is not set
# CONFIG_MTD_PARTITIONS is not set
#
# User Modules And Translation Layers
#
# CONFIG_MTD_CHAR is not set
CONFIG_MTD_BLOCK=y
# CONFIG_FTL is not set
# CONFIG_NFTL is not set
# CONFIG_INFTL is not set
#
# RAM/ROM/Flash chip drivers
#
# CONFIG_MTD_CFI is not set
# CONFIG_MTD_JEDECPROBE is not set
CONFIG_MTD_MAP_BANK_WIDTH_1=y
CONFIG_MTD_MAP_BANK_WIDTH_2=y
CONFIG_MTD_MAP_BANK_WIDTH_4=y
# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
CONFIG_MTD_CFI_I1=y
CONFIG_MTD_CFI_I2=y
# CONFIG_MTD_CFI_I4 is not set
# CONFIG_MTD_CFI_I8 is not set
# CONFIG_MTD_RAM is not set
# CONFIG_MTD_ROM is not set
# CONFIG_MTD_ABSENT is not set
#
# Mapping drivers for chip access
#
# CONFIG_MTD_COMPLEX_MAPPINGS is not set
# CONFIG_MTD_PLATRAM is not set
#
# Self-contained MTD device drivers
#
CONFIG_MTD_SLRAM=y
# CONFIG_MTD_PHRAM is not set
# CONFIG_MTD_MTDRAM is not set
# CONFIG_MTD_BLKMTD is not set
#
# Disk-On-Chip Device Drivers
#
# CONFIG_MTD_DOC2000 is not set
# CONFIG_MTD_DOC2001 is not set
# CONFIG_MTD_DOC2001PLUS is not set
#
# NAND Flash Device Drivers
#
# CONFIG_MTD_NAND is not set
#
# Parallel port support
#
# CONFIG_PARPORT is not set
#
# Block devices
#
# CONFIG_BLK_DEV_FD is not set
# CONFIG_BLK_DEV_COW_COMMON is not set
# CONFIG_BLK_DEV_LOOP is not set
# CONFIG_BLK_DEV_RAM is not set
CONFIG_BLK_DEV_RAM_COUNT=16
CONFIG_INITRAMFS_SOURCE=""
# CONFIG_CDROM_PKTCDVD is not set
#
# IO Schedulers
#
CONFIG_IOSCHED_NOOP=y
# CONFIG_IOSCHED_AS is not set
# CONFIG_IOSCHED_DEADLINE is not set
# CONFIG_IOSCHED_CFQ is not set
#
# Disk device support
#
#
# ATA/ATAPI/MFM/RLL support
#
# CONFIG_IDE is not set
#
# SCSI device support
#
# CONFIG_SCSI is not set
#
# Multi-device support (RAID and LVM)
#
# CONFIG_MD is not set
#
# Fusion MPT device support
#
# CONFIG_FUSION is not set
#
# IEEE 1394 (FireWire) support
#
#
# I2O device support
#
#
# Network device support
#
# CONFIG_NETPOLL is not set
# CONFIG_NET_POLL_CONTROLLER is not set
#
# ISDN subsystem
#
#
# Input device support
#
CONFIG_INPUT=y
#
# Userland interfaces
#
# CONFIG_INPUT_MOUSEDEV is not set
# CONFIG_INPUT_JOYDEV is not set
# CONFIG_INPUT_TSDEV is not set
# CONFIG_INPUT_EVDEV is not set
# CONFIG_INPUT_EVBUG is not set
#
# Input Device Drivers
#
# CONFIG_INPUT_KEYBOARD is not set
# CONFIG_INPUT_MOUSE is not set
# CONFIG_INPUT_JOYSTICK is not set
# CONFIG_INPUT_TOUCHSCREEN is not set
# CONFIG_INPUT_MISC is not set
#
# Hardware I/O ports
#
CONFIG_SERIO=y
# CONFIG_SERIO_I8042 is not set
# CONFIG_SERIO_SERPORT is not set
# CONFIG_SERIO_LIBPS2 is not set
# CONFIG_SERIO_RAW is not set
# CONFIG_GAMEPORT is not set
#
# Character devices
#
# CONFIG_VT is not set
# CONFIG_SERIAL_NONSTANDARD is not set
#
# Serial drivers
#
# CONFIG_SERIAL_8250 is not set
#
# Non-8250 serial port support
#
# CONFIG_UNIX98_PTYS is not set
# CONFIG_LEGACY_PTYS is not set
#
# IPMI
#
# CONFIG_IPMI_HANDLER is not set
#
# Watchdog Cards
#
# CONFIG_WATCHDOG is not set
# CONFIG_RTC is not set
# CONFIG_GEN_RTC is not set
# CONFIG_DTLK is not set
# CONFIG_R3964 is not set
#
# Ftape, the floppy tape device driver
#
# CONFIG_RAW_DRIVER is not set
#
# TPM devices
#
#
# Multimedia devices
#
# CONFIG_VIDEO_DEV is not set
#
# Digital Video Broadcasting Devices
#
#
# File systems
#
# CONFIG_EXT2_FS is not set
# CONFIG_EXT3_FS is not set
# CONFIG_JBD is not set
# CONFIG_REISERFS_FS is not set
# CONFIG_JFS_FS is not set
# CONFIG_FS_POSIX_ACL is not set
#
# XFS support
#
# CONFIG_XFS_FS is not set
# CONFIG_MINIX_FS is not set
CONFIG_ROMFS_FS=y
# CONFIG_MAGIC_ROM_PTR is not set
CONFIG_INOTIFY=y
# CONFIG_QUOTA is not set
CONFIG_DNOTIFY=y
# CONFIG_AUTOFS_FS is not set
# CONFIG_AUTOFS4_FS is not set
#
# CD-ROM/DVD Filesystems
#
# CONFIG_ISO9660_FS is not set
# CONFIG_UDF_FS is not set
#
# DOS/FAT/NT Filesystems
#
# CONFIG_MSDOS_FS is not set
# CONFIG_VFAT_FS is not set
# CONFIG_NTFS_FS is not set
#
# Pseudo filesystems
#
CONFIG_PROC_FS=y
CONFIG_SYSFS=y
# CONFIG_TMPFS is not set
# CONFIG_HUGETLB_PAGE is not set
CONFIG_RAMFS=y
#
# Miscellaneous filesystems
#
# CONFIG_HFSPLUS_FS is not set
# CONFIG_JFFS_FS is not set
# CONFIG_JFFS2_FS is not set
# CONFIG_CRAMFS is not set
# CONFIG_VXFS_FS is not set
# CONFIG_HPFS_FS is not set
# CONFIG_QNX4FS_FS is not set
# CONFIG_SYSV_FS is not set
# CONFIG_UFS_FS is not set
#
# Partition Types
#
# CONFIG_PARTITION_ADVANCED is not set
CONFIG_MSDOS_PARTITION=y
#
# Native Language Support
#
# CONFIG_NLS is not set
#
# Graphics support
#
# CONFIG_FB is not set
#
# Sound
#
# CONFIG_SOUND is not set
#
# USB support
#
# CONFIG_USB_ARCH_HAS_HCD is not set
# CONFIG_USB_ARCH_HAS_OHCI is not set
#
# USB Gadget Support
#
# CONFIG_USB_GADGET is not set
#
# Kernel hacking
#
# CONFIG_PRINTK_TIME is not set
CONFIG_DEBUG_KERNEL=y
# CONFIG_MAGIC_SYSRQ is not set
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_SCHEDSTATS is not set
# CONFIG_DEBUG_SLAB is not set
# CONFIG_DEBUG_SPINLOCK is not set
# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
# CONFIG_DEBUG_KOBJECT is not set
CONFIG_DEBUG_INFO=y
# CONFIG_DEBUG_FS is not set
# CONFIG_NO_KERNEL_MSG is not set
#
# Security options
#
# CONFIG_KEYS is not set
# CONFIG_SECURITY is not set
#
# Cryptographic options
#
# CONFIG_CRYPTO is not set
#
# Hardware crypto devices
#
#
# Library routines
#
# CONFIG_CRC_CCITT is not set
# CONFIG_CRC32 is not set
# CONFIG_LIBCRC32C is not set
arch/v850/kernel/Makefile deleted 100644 → 0
View file @ 99764fa4
#
# arch/v850/kernel/Makefile
#
# Copyright (C) 2001,02,03 NEC Electronics Corporation
# Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org>
#
# This file is subject to the terms and conditions of the GNU General Public
# License. See the file "COPYING" in the main directory of this archive
# for more details.
#
extra-y := head.o init_task.o vmlinux.lds
obj-y += intv.o entry.o process.o syscalls.o time.o setup.o \
signal.o irq.o mach.o ptrace.o bug.o
obj-$(CONFIG_MODULES) += module.o v850_ksyms.o
# chip-specific code
obj-$(CONFIG_V850E_MA1) += ma.o
obj-$(CONFIG_V850E_ME2) += me2.o
obj-$(CONFIG_V850E_TEG) += teg.o
obj-$(CONFIG_V850E_AS85EP1) += as85ep1.o
obj-$(CONFIG_V850E2_ANNA) += anna.o
# platform-specific code
obj-$(CONFIG_V850E_SIM) += sim.o simcons.o
obj-$(CONFIG_V850E2_SIM85E2) += sim85e2.o memcons.o
obj-$(CONFIG_V850E2_FPGA85E2C) += fpga85e2c.o memcons.o
obj-$(CONFIG_RTE_CB) += rte_cb.o rte_cb_leds.o
obj-$(CONFIG_RTE_CB_MA1) += rte_ma1_cb.o
obj-$(CONFIG_RTE_CB_ME2) += rte_me2_cb.o
obj-$(CONFIG_RTE_CB_NB85E) += rte_nb85e_cb.o
obj-$(CONFIG_RTE_CB_MULTI) += rte_cb_multi.o
obj-$(CONFIG_RTE_MB_A_PCI) += rte_mb_a_pci.o
obj-$(CONFIG_RTE_GBUS_INT) += gbus_int.o
# feature-specific code
obj-$(CONFIG_V850E_INTC) += v850e_intc.o
obj-$(CONFIG_V850E_TIMER_D) += v850e_timer_d.o v850e_utils.o
obj-$(CONFIG_V850E_CACHE) += v850e_cache.o
obj-$(CONFIG_V850E2_CACHE) += v850e2_cache.o
obj-$(CONFIG_V850E_HIGHRES_TIMER) += highres_timer.o
obj-$(CONFIG_PROC_FS) += procfs.o
arch/v850/kernel/anna-rom.ld deleted 100644 → 0
View file @ 99764fa4
/* Linker script for the Midas labs Anna V850E2 evaluation board
(CONFIG_V850E2_ANNA), with kernel in ROM (CONFIG_ROM_KERNEL). */
MEMORY {
/* 8MB of flash ROM. */
ROM : ORIGIN = 0, LENGTH = 0x00800000
/* 1MB of static RAM. This memory is mirrored 64 times. */
SRAM : ORIGIN = SRAM_ADDR, LENGTH = SRAM_SIZE
/* 64MB of DRAM. */
SDRAM : ORIGIN = SDRAM_ADDR, LENGTH = SDRAM_SIZE
}
SECTIONS {
ROMK_SECTIONS(ROM, SRAM)
}
arch/v850/kernel/anna.c deleted 100644 → 0
View file @ 99764fa4
/*
* arch/v850/kernel/anna.c -- Anna V850E2 evaluation chip/board
*
* Copyright (C) 2002,03 NEC Electronics Corporation
* Copyright (C) 2002,03 Miles Bader <miles@gnu.org>
*
* This file is subject to the terms and conditions of the GNU General
* Public License. See the file COPYING in the main directory of this
* archive for more details.
*
* Written by Miles Bader <miles@gnu.org>
*/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/init.h>
#include <linux/bootmem.h>
#include <linux/major.h>
#include <linux/irq.h>
#include <asm/machdep.h>
#include <asm/atomic.h>
#include <asm/page.h>
#include <asm/v850e_timer_d.h>
#include <asm/v850e_uart.h>
#include "mach.h"
/* SRAM and SDRAM are vaguely contiguous (with a big hole in between; see
mach_reserve_bootmem for details); use both as one big area. */
#define RAM_START SRAM_ADDR
#define RAM_END (SDRAM_ADDR + SDRAM_SIZE)
/* The bits of this port are connected to an 8-LED bar-graph. */
#define LEDS_PORT 0
static void anna_led_tick (void);
void __init mach_early_init (void)
{
ANNA_ILBEN = 0;
V850E2_CSC(0) = 0x402F;
V850E2_CSC(1) = 0x4000;
V850E2_BPC = 0;
V850E2_BSC = 0xAAAA;
V850E2_BEC = 0;
#if 0
V850E2_BHC = 0xFFFF; /* icache all memory, dcache all */
#else
V850E2_BHC = 0; /* cache no memory */
#endif
V850E2_BCT(0) = 0xB088;
V850E2_BCT(1) = 0x0008;
V850E2_DWC(0) = 0x0027;
V850E2_DWC(1) = 0;
V850E2_BCC = 0x0006;
V850E2_ASC = 0;
V850E2_LBS = 0x0089;
V850E2_SCR(3) = 0x21A9;
V850E2_RFS(3) = 0x8121;
v850e_intc_disable_irqs ();
}
void __init mach_setup (char **cmdline)
{
ANNA_PORT_PM (LEDS_PORT) = 0; /* Make all LED pins output pins. */
mach_tick = anna_led_tick;
}
void __init mach_get_physical_ram (unsigned long *ram_start,
unsigned long *ram_len)
{
*ram_start = RAM_START;
*ram_len = RAM_END - RAM_START;
}
void __init mach_reserve_bootmem ()
{
/* The space between SRAM and SDRAM is filled with duplicate
images of SRAM. Prevent the kernel from using them. */
reserve_bootmem (SRAM_ADDR + SRAM_SIZE,
SDRAM_ADDR - (SRAM_ADDR + SRAM_SIZE),
BOOTMEM_DEFAULT);
}
void mach_gettimeofday (struct timespec *tv)
{
tv->tv_sec = 0;
tv->tv_nsec = 0;
}
void __init mach_sched_init (struct irqaction *timer_action)
{
/* Start hardware timer. */
v850e_timer_d_configure (0, HZ);
/* Install timer interrupt handler. */
setup_irq (IRQ_INTCMD(0), timer_action);
}
static struct v850e_intc_irq_init irq_inits[] = {
{ "IRQ", 0, NUM_MACH_IRQS, 1, 7 },
{ "PIN", IRQ_INTP(0), IRQ_INTP_NUM, 1, 4 },
{ "CCC", IRQ_INTCCC(0), IRQ_INTCCC_NUM, 1, 5 },
{ "CMD", IRQ_INTCMD(0), IRQ_INTCMD_NUM, 1, 5 },
{ "DMA", IRQ_INTDMA(0), IRQ_INTDMA_NUM, 1, 2 },
{ "DMXER", IRQ_INTDMXER,1, 1, 2 },
{ "SRE", IRQ_INTSRE(0), IRQ_INTSRE_NUM, 3, 3 },
{ "SR", IRQ_INTSR(0), IRQ_INTSR_NUM, 3, 4 },
{ "ST", IRQ_INTST(0), IRQ_INTST_NUM, 3, 5 },
{ 0 }
};
#define NUM_IRQ_INITS (ARRAY_SIZE(irq_inits) - 1)
static struct hw_interrupt_type hw_itypes[NUM_IRQ_INITS];
void __init mach_init_irqs (void)
{
v850e_intc_init_irq_types (irq_inits, hw_itypes);
}
void machine_restart (char *__unused)
{
#ifdef CONFIG_RESET_GUARD
disable_reset_guard ();
#endif
asm ("jmp r0"); /* Jump to the reset vector. */
}
void machine_halt (void)
{
#ifdef CONFIG_RESET_GUARD
disable_reset_guard ();
#endif
local_irq_disable (); /* Ignore all interrupts. */
ANNA_PORT_IO(LEDS_PORT) = 0xAA; /* Note that we halted. */
for (;;)
asm ("halt; nop; nop; nop; nop; nop");
}
void machine_power_off (void)
{
machine_halt ();
}
/* Called before configuring an on-chip UART. */
void anna_uart_pre_configure (unsigned chan, unsigned cflags, unsigned baud)
{
/* The Anna connects some general-purpose I/O pins on the CPU to
the RTS/CTS lines of UART 1's serial connection. I/O pins P07
and P37 are RTS and CTS respectively. */
if (chan == 1) {
ANNA_PORT_PM(0) &= ~0x80; /* P07 in output mode */
ANNA_PORT_PM(3) |= 0x80; /* P37 in input mode */
}
}
/* Minimum and maximum bounds for the moving upper LED boundary in the
clock tick display. We can't use the last bit because it's used for
UART0's CTS output. */
#define MIN_MAX_POS 0
#define MAX_MAX_POS 6
/* There are MAX_MAX_POS^2 - MIN_MAX_POS^2 cycles in the animation, so if
we pick 6 and 0 as above, we get 49 cycles, which is when divided into
the standard 100 value for HZ, gives us an almost 1s total time. */
#define TICKS_PER_FRAME \
(HZ / (MAX_MAX_POS * MAX_MAX_POS - MIN_MAX_POS * MIN_MAX_POS))
static void anna_led_tick ()
{
static unsigned counter = 0;
if (++counter == TICKS_PER_FRAME) {
static int pos = 0, max_pos = MAX_MAX_POS, dir = 1;
if (dir > 0 && pos == max_pos) {
dir = -1;
if (max_pos == MIN_MAX_POS)
max_pos = MAX_MAX_POS;
else
max_pos--;
} else {
if (dir < 0 && pos == 0)
dir = 1;
if (pos + dir <= max_pos) {
/* Each bit of port 0 has a LED. */
clear_bit (pos, &ANNA_PORT_IO(LEDS_PORT));
pos += dir;
set_bit (pos, &ANNA_PORT_IO(LEDS_PORT));
}
}
counter = 0;
}
}
arch/v850/kernel/anna.ld deleted 100644 → 0
View file @ 99764fa4
/* Linker script for the Midas labs Anna V850E2 evaluation board
(CONFIG_V850E2_ANNA). */
MEMORY {
/* 256KB of internal memory (followed by one mirror). */
iMEM0 : ORIGIN = 0, LENGTH = 0x00040000
/* 256KB of internal memory (followed by one mirror). */
iMEM1 : ORIGIN = 0x00040000, LENGTH = 0x00040000
/* 1MB of static RAM. This memory is mirrored 64 times. */
SRAM : ORIGIN = SRAM_ADDR, LENGTH = SRAM_SIZE
/* 64MB of DRAM. */
SDRAM : ORIGIN = SDRAM_ADDR, LENGTH = SDRAM_SIZE
}
SECTIONS {
.intv : { INTV_CONTENTS } > iMEM0
.sram : { RAMK_KRAM_CONTENTS } > SRAM
.root : { ROOT_FS_CONTENTS } > SDRAM
}
arch/v850/kernel/as85ep1-rom.ld deleted 100644 → 0
View file @ 99764fa4
/* Linker script for the NEC AS85EP1 V850E evaluation board
(CONFIG_V850E_AS85EP1), with kernel in ROM (CONFIG_ROM_KERNEL). */
MEMORY {
/* 4MB of flash ROM. */
ROM : ORIGIN = 0, LENGTH = 0x00400000
/* 1MB of static RAM. */
SRAM : ORIGIN = SRAM_ADDR, LENGTH = SRAM_SIZE
/* About 58MB of DRAM. This can actually be at one of two
positions, determined by jumper JP3; we have to use the first
position because the second is partially out of processor
instruction addressing range (though in the second position
there's actually 64MB available). */
SDRAM : ORIGIN = SDRAM_ADDR, LENGTH = SDRAM_SIZE
}
SECTIONS {
ROMK_SECTIONS(ROM, SRAM)
}
arch/v850/kernel/as85ep1.c deleted 100644 → 0
View file @ 99764fa4
/*
* arch/v850/kernel/as85ep1.c -- AS85EP1 V850E evaluation chip/board
*
* Copyright (C) 2002,03 NEC Electronics Corporation
* Copyright (C) 2002,03 Miles Bader <miles@gnu.org>
*
* This file is subject to the terms and conditions of the GNU General
* Public License. See the file COPYING in the main directory of this
* archive for more details.
*
* Written by Miles Bader <miles@gnu.org>
*/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/init.h>
#include <linux/bootmem.h>
#include <linux/major.h>
#include <linux/irq.h>
#include <asm/machdep.h>
#include <asm/atomic.h>
#include <asm/page.h>
#include <asm/v850e_timer_d.h>
#include <asm/v850e_uart.h>
#include "mach.h"
/* SRAM and SDRAM are vaguely contiguous (with a big hole in between; see
mach_reserve_bootmem for details); use both as one big area. */
#define RAM_START SRAM_ADDR
#define RAM_END (SDRAM_ADDR + SDRAM_SIZE)
/* The bits of this port are connected to an 8-LED bar-graph. */
#define LEDS_PORT 4
static void as85ep1_led_tick (void);
extern char _intv_copy_src_start, _intv_copy_src_end;
extern char _intv_copy_dst_start;
void __init mach_early_init (void)
{
#ifndef CONFIG_ROM_KERNEL
const u32 *src;
register u32 *dst asm ("ep");
#endif
AS85EP1_CSC(0) = 0x0403;
AS85EP1_BCT(0) = 0xB8B8;
AS85EP1_DWC(0) = 0x0104;
AS85EP1_BCC = 0x0012;
AS85EP1_ASC = 0;
AS85EP1_LBS = 0x00A9;
AS85EP1_PORT_PMC(6) = 0xFF; /* valid A0,A1,A20-A25 */
AS85EP1_PORT_PMC(7) = 0x0E; /* valid CS1-CS3 */
AS85EP1_PORT_PMC(9) = 0xFF; /* valid D16-D23 */
AS85EP1_PORT_PMC(10) = 0xFF; /* valid D24-D31 */
AS85EP1_RFS(1) = 0x800c;
AS85EP1_RFS(3) = 0x800c;
AS85EP1_SCR(1) = 0x20A9;
AS85EP1_SCR(3) = 0x20A9;
#ifndef CONFIG_ROM_KERNEL
/* The early chip we have is buggy, and writing the interrupt
vectors into low RAM may screw up, so for non-ROM kernels, we
only rely on the reset vector being downloaded, and copy the
rest of the interrupt vectors into place here. The specific bug
is that writing address N, where (N & 0x10) == 0x10, will _also_
write to address (N - 0x10). We avoid this (effectively) by
writing in 16-byte chunks backwards from the end. */
AS85EP1_IRAMM = 0x3; /* "write-mode" for the internal instruction memory */
src = (u32 *)(((u32)&_intv_copy_src_end - 1) & ~0xF);
dst = (u32 *)&_intv_copy_dst_start
+ (src - (u32 *)&_intv_copy_src_start);
do {
u32 t0 = src[0], t1 = src[1], t2 = src[2], t3 = src[3];
dst[0] = t0; dst[1] = t1; dst[2] = t2; dst[3] = t3;
dst -= 4;
src -= 4;
} while (src > (u32 *)&_intv_copy_src_start);
AS85EP1_IRAMM = 0x0; /* "read-mode" for the internal instruction memory */
#endif /* !CONFIG_ROM_KERNEL */
v850e_intc_disable_irqs ();
}
void __init mach_setup (char **cmdline)
{
AS85EP1_PORT_PMC (LEDS_PORT) = 0; /* Make the LEDs port an I/O port. */
AS85EP1_PORT_PM (LEDS_PORT) = 0; /* Make all the bits output pins. */
mach_tick = as85ep1_led_tick;
}
void __init mach_get_physical_ram (unsigned long *ram_start,
unsigned long *ram_len)
{
*ram_start = RAM_START;
*ram_len = RAM_END - RAM_START;
}
/* Convenience macros. */
#define SRAM_END (SRAM_ADDR + SRAM_SIZE)
#define SDRAM_END (SDRAM_ADDR + SDRAM_SIZE)
void __init mach_reserve_bootmem ()
{
if (SDRAM_ADDR < RAM_END && SDRAM_ADDR > RAM_START)
/* We can't use the space between SRAM and SDRAM, so
prevent the kernel from trying. */
reserve_bootmem(SRAM_END, SDRAM_ADDR - SRAM_END,
BOOTMEM_DEFAULT);
}
void mach_gettimeofday (struct timespec *tv)
{
tv->tv_sec = 0;
tv->tv_nsec = 0;
}
void __init mach_sched_init (struct irqaction *timer_action)
{
/* Start hardware timer. */
v850e_timer_d_configure (0, HZ);
/* Install timer interrupt handler. */
setup_irq (IRQ_INTCMD(0), timer_action);
}
static struct v850e_intc_irq_init irq_inits[] = {
{ "IRQ", 0, NUM_MACH_IRQS, 1, 7 },
{ "CCC", IRQ_INTCCC(0), IRQ_INTCCC_NUM, 1, 5 },
{ "CMD", IRQ_INTCMD(0), IRQ_INTCMD_NUM, 1, 5 },
{ "SRE", IRQ_INTSRE(0), IRQ_INTSRE_NUM, 3, 3 },
{ "SR", IRQ_INTSR(0), IRQ_INTSR_NUM, 3, 4 },
{ "ST", IRQ_INTST(0), IRQ_INTST_NUM, 3, 5 },
{ 0 }
};
#define NUM_IRQ_INITS (ARRAY_SIZE(irq_inits) - 1)
static struct hw_interrupt_type hw_itypes[NUM_IRQ_INITS];
void __init mach_init_irqs (void)
{
v850e_intc_init_irq_types (irq_inits, hw_itypes);
}
void machine_restart (char *__unused)
{
#ifdef CONFIG_RESET_GUARD
disable_reset_guard ();
#endif
asm ("jmp r0"); /* Jump to the reset vector. */
}
void machine_halt (void)
{
#ifdef CONFIG_RESET_GUARD
disable_reset_guard ();
#endif
local_irq_disable (); /* Ignore all interrupts. */
AS85EP1_PORT_IO (LEDS_PORT) = 0xAA; /* Note that we halted. */
for (;;)
asm ("halt; nop; nop; nop; nop; nop");
}
void machine_power_off (void)
{
machine_halt ();
}
/* Called before configuring an on-chip UART. */
void as85ep1_uart_pre_configure (unsigned chan, unsigned cflags, unsigned baud)
{
/* Make the shared uart/port pins be uart pins. */
AS85EP1_PORT_PMC(3) |= (0x5 << chan);
/* The AS85EP1 connects some general-purpose I/O pins on the CPU to
the RTS/CTS lines of UART 1's serial connection. I/O pins P53
and P54 are RTS and CTS respectively. */
if (chan == 1) {
/* Put P53 & P54 in I/O port mode. */
AS85EP1_PORT_PMC(5) &= ~0x18;
/* Make P53 an output, and P54 an input. */
AS85EP1_PORT_PM(5) |= 0x10;
}
}
/* Minimum and maximum bounds for the moving upper LED boundary in the
clock tick display. */
#define MIN_MAX_POS 0
#define MAX_MAX_POS 7
/* There are MAX_MAX_POS^2 - MIN_MAX_POS^2 cycles in the animation, so if
we pick 6 and 0 as above, we get 49 cycles, which is when divided into
the standard 100 value for HZ, gives us an almost 1s total time. */
#define TICKS_PER_FRAME \
(HZ / (MAX_MAX_POS * MAX_MAX_POS - MIN_MAX_POS * MIN_MAX_POS))
static void as85ep1_led_tick ()
{
static unsigned counter = 0;
if (++counter == TICKS_PER_FRAME) {
static int pos = 0, max_pos = MAX_MAX_POS, dir = 1;
if (dir > 0 && pos == max_pos) {
dir = -1;
if (max_pos == MIN_MAX_POS)
max_pos = MAX_MAX_POS;
else
max_pos--;
} else {
if (dir < 0 && pos == 0)
dir = 1;
if (pos + dir <= max_pos) {
/* Each bit of port 0 has a LED. */
set_bit (pos, &AS85EP1_PORT_IO(LEDS_PORT));
pos += dir;
clear_bit (pos, &AS85EP1_PORT_IO(LEDS_PORT));
}
}
counter = 0;
}
}
arch/v850/kernel/as85ep1.ld deleted 100644 → 0
View file @ 99764fa4
/* Linker script for the NEC AS85EP1 V850E evaluation board
(CONFIG_V850E_AS85EP1). */
MEMORY {
/* 1MB of internal instruction memory. */
iMEM0 : ORIGIN = 0, LENGTH = 0x00100000
/* 1MB of static RAM. */
SRAM : ORIGIN = SRAM_ADDR, LENGTH = SRAM_SIZE
/* About 58MB of DRAM. This can actually be at one of two
positions, determined by jump JP3; we have to use the first
position because the second is partially out of processor
instruction addressing range (though in the second position
there's actually 64MB available). */
SDRAM : ORIGIN = SDRAM_ADDR, LENGTH = SDRAM_SIZE
}
SECTIONS {
.resetv : {
__intv_start = . ;
*(.intv.reset) /* Reset vector */
} > iMEM0
.sram : {
RAMK_KRAM_CONTENTS
/* We stick most of the interrupt vectors here; they'll be
copied into the proper location by the early init code (we
can't put them directly in the right place because of
hardware bugs). The vectors shouldn't need to be
relocated, so we don't have to use `> ... AT> ...' to
split the load/vm addresses (and we can't because of
problems with the loader). */
. = ALIGN (0x10) ;
__intv_copy_src_start = . ;
*(.intv.common) /* Vectors common to all v850e proc. */
*(.intv.mach) /* Machine-specific int. vectors. */
. = ALIGN (0x10) ;
__intv_copy_src_end = . ;
} > SRAM
/* Where we end up putting the vectors. */
__intv_copy_dst_start = 0x10 ;
__intv_copy_dst_end = __intv_copy_dst_start + (__intv_copy_src_end - __intv_copy_src_start) ;
__intv_end = __intv_copy_dst_end ;
.root : { ROOT_FS_CONTENTS } > SDRAM
}
arch/v850/kernel/asm-offsets.c deleted 100644 → 0
View file @ 99764fa4
/*
* This program is used to generate definitions needed by
* assembly language modules.
*
* We use the technique used in the OSF Mach kernel code:
* generate asm statements containing #defines,
* compile this file to assembler, and then extract the
* #defines from the assembly-language output.
*/
#include <linux/stddef.h>
#include <linux/sched.h>
#include <linux/kernel_stat.h>
#include <linux/ptrace.h>
#include <linux/hardirq.h>
#include <linux/kbuild.h>
#include <asm/irq.h>
#include <asm/errno.h>
int main (void)
{
/* offsets into the task struct */
DEFINE (TASK_STATE, offsetof (struct task_struct, state));
DEFINE (TASK_FLAGS, offsetof (struct task_struct, flags));
DEFINE (TASK_PTRACE, offsetof (struct task_struct, ptrace));
DEFINE (TASK_BLOCKED, offsetof (struct task_struct, blocked));
DEFINE (TASK_THREAD, offsetof (struct task_struct, thread));
DEFINE (TASK_THREAD_INFO, offsetof (struct task_struct, stack));
DEFINE (TASK_MM, offsetof (struct task_struct, mm));
DEFINE (TASK_ACTIVE_MM, offsetof (struct task_struct, active_mm));
DEFINE (TASK_PID, offsetof (struct task_struct, pid));
/* offsets into the kernel_stat struct */
DEFINE (STAT_IRQ, offsetof (struct kernel_stat, irqs));
/* signal defines */
DEFINE (SIGSEGV, SIGSEGV);
DEFINE (SEGV_MAPERR, SEGV_MAPERR);
DEFINE (SIGTRAP, SIGTRAP);
DEFINE (SIGCHLD, SIGCHLD);
DEFINE (SIGILL, SIGILL);
DEFINE (TRAP_TRACE, TRAP_TRACE);
/* ptrace flag bits */
DEFINE (PT_PTRACED, PT_PTRACED);
DEFINE (PT_DTRACE, PT_DTRACE);
/* error values */
DEFINE (ENOSYS, ENOSYS);
/* clone flag bits */
DEFINE (CLONE_VFORK, CLONE_VFORK);
DEFINE (CLONE_VM, CLONE_VM);
return 0;
}
arch/v850/kernel/bug.c deleted 100644 → 0
View file @ 99764fa4
/*
* arch/v850/kernel/bug.c -- Bug reporting functions
*
* Copyright (C) 2001,02,03 NEC Electronics Corporation
* Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org>
*
* This file is subject to the terms and conditions of the GNU General
* Public License. See the file COPYING in the main directory of this
* archive for more details.
*
* Written by Miles Bader <miles@gnu.org>
*/
#include <linux/kernel.h>
#include <linux/reboot.h>
#include <linux/sched.h>
#include <linux/module.h>
#include <asm/errno.h>
#include <asm/ptrace.h>
#include <asm/processor.h>
#include <asm/current.h>
/* We should use __builtin_return_address, but it doesn't work in gcc-2.90
(which is currently our standard compiler on the v850). */
#define ret_addr() ({ register u32 lp asm ("lp"); lp; })
#define stack_addr() ({ register u32 sp asm ("sp"); sp; })
void __bug ()
{
printk (KERN_CRIT "kernel BUG at PC 0x%x (SP ~0x%x)!\n",
ret_addr() - 4, /* - 4 for `jarl' */
stack_addr());
machine_halt ();
}
int bad_trap (int trap_num, struct pt_regs *regs)
{
printk (KERN_CRIT
"unimplemented trap %d called at 0x%08lx, pid %d!\n",
trap_num, regs->pc, current->pid);
return -ENOSYS;
}
#ifdef CONFIG_RESET_GUARD
void unexpected_reset (unsigned long ret_addr, unsigned long kmode,
struct task_struct *task, unsigned long sp)
{
printk (KERN_CRIT
"unexpected reset in %s mode, pid %d"
" (ret_addr = 0x%lx, sp = 0x%lx)\n",
kmode ? "kernel" : "user",
task ? task->pid : -1,
ret_addr, sp);
machine_halt ();
}
#endif /* CONFIG_RESET_GUARD */
struct spec_reg_name {
const char *name;
int gpr;
};
struct spec_reg_name spec_reg_names[] = {
{ "sp", GPR_SP },
{ "gp", GPR_GP },
{ "tp", GPR_TP },
{ "ep", GPR_EP },
{ "lp", GPR_LP },
{ 0, 0 }
};
void show_regs (struct pt_regs *regs)
{
int gpr_base, gpr_offs;
printk (" pc 0x%08lx psw 0x%08lx kernel_mode %d\n",
regs->pc, regs->psw, regs->kernel_mode);
printk (" ctpc 0x%08lx ctpsw 0x%08lx ctbp 0x%08lx\n",
regs->ctpc, regs->ctpsw, regs->ctbp);
for (gpr_base = 0; gpr_base < NUM_GPRS; gpr_base += 4) {
for (gpr_offs = 0; gpr_offs < 4; gpr_offs++) {
int gpr = gpr_base + gpr_offs;
long val = regs->gpr[gpr];
struct spec_reg_name *srn;
for (srn = spec_reg_names; srn->name; srn++)
if (srn->gpr == gpr)
break;
if (srn->name)
printk ("%7s 0x%08lx", srn->name, val);
else
printk (" r%02d 0x%08lx", gpr, val);
}
printk ("\n");
}
}
/*
* TASK is a pointer to the task whose backtrace we want to see (or NULL
* for current task), SP is the stack pointer of the first frame that
* should be shown in the back trace (or NULL if the entire call-chain of
* the task should be shown).
*/
void show_stack (struct task_struct *task, unsigned long *sp)
{
unsigned long addr, end;
if (sp)
addr = (unsigned long)sp;
else if (task)
addr = task_sp (task);
else
addr = stack_addr ();
addr = addr & ~3;
end = (addr + THREAD_SIZE - 1) & THREAD_MASK;
while (addr < end) {
printk ("%8lX: ", addr);
while (addr < end) {
printk (" %8lX", *(unsigned long *)addr);
addr += sizeof (unsigned long);
if (! (addr & 0xF))
break;
}
printk ("\n");
}
}
void dump_stack ()
{
show_stack (0, 0);
}
EXPORT_SYMBOL(dump_stack);
arch/v850/kernel/entry.S deleted 100644 → 0
View file @ 99764fa4
This diff is collapsed.
arch/v850/kernel/fpga85e2c.c deleted 100644 → 0
View file @ 99764fa4
/*
* arch/v850/kernel/fpga85e2c.h -- Machine-dependent defs for
* FPGA implementation of V850E2/NA85E2C
*
* Copyright (C) 2002,03 NEC Electronics Corporation
* Copyright (C) 2002,03 Miles Bader <miles@gnu.org>
*
* This file is subject to the terms and conditions of the GNU General
* Public License. See the file COPYING in the main directory of this
* archive for more details.
*
* Written by Miles Bader <miles@gnu.org>
*/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/init.h>
#include <linux/mm.h>
#include <linux/swap.h>
#include <linux/bootmem.h>
#include <linux/irq.h>
#include <linux/bitops.h>
#include <asm/atomic.h>
#include <asm/page.h>
#include <asm/machdep.h>
#include "mach.h"
extern void memcons_setup (void);
#define REG_DUMP_ADDR 0x220000
extern struct irqaction reg_snap_action; /* fwd decl */
void __init mach_early_init (void)
{
int i;
const u32 *src;
register u32 *dst asm ("ep");
extern u32 _intv_end, _intv_load_start;
/* Set bus sizes: CS0 32-bit, CS1 16-bit, CS7 8-bit,
everything else 32-bit. */
V850E2_BSC = 0x2AA6;
for (i = 2; i <= 6; i++)
CSDEV(i) = 0; /* 32 bit */
/* Ensure that the simulator halts on a panic, instead of going
into an infinite loop inside the panic function. */
panic_timeout = -1;
/* Move the interrupt vectors into their real location. Note that
any relocations there are relative to the real location, so we
don't have to fix anything up. We use a loop instead of calling
memcpy to keep this a leaf function (to avoid a function
prologue being generated). */
dst = 0x10; /* &_intv_start + 0x10. */
src = &_intv_load_start;
do {
u32 t0 = src[0], t1 = src[1], t2 = src[2], t3 = src[3];
u32 t4 = src[4], t5 = src[5], t6 = src[6], t7 = src[7];
dst[0] = t0; dst[1] = t1; dst[2] = t2; dst[3] = t3;
dst[4] = t4; dst[5] = t5; dst[6] = t6; dst[7] = t7;
dst += 8;
src += 8;
} while (dst < &_intv_end);
}
void __init mach_setup (char **cmdline)
{
memcons_setup ();
/* Setup up NMI0 to copy the registers to a known memory location.
The FGPA board has a button that produces NMI0 when pressed, so
this allows us to push the button, and then look at memory to see
what's in the registers (there's no other way to easily do so).
We have to use `setup_irq' instead of `request_irq' because it's
still too early to do memory allocation. */
setup_irq (IRQ_NMI (0), &reg_snap_action);
}
void mach_get_physical_ram (unsigned long *ram_start, unsigned long *ram_len)
{
*ram_start = ERAM_ADDR;
*ram_len = ERAM_SIZE;
}
void __init mach_sched_init (struct irqaction *timer_action)
{
/* Setup up the timer interrupt. The FPGA peripheral control
registers _only_ work with single-bit writes (set1/clr1)! */
__clear_bit (RPU_GTMC_CE_BIT, &RPU_GTMC);
__clear_bit (RPU_GTMC_CLK_BIT, &RPU_GTMC);
__set_bit (RPU_GTMC_CE_BIT, &RPU_GTMC);
/* We use the first RPU interrupt, which occurs every 8.192ms. */
setup_irq (IRQ_RPU (0), timer_action);
}
void mach_gettimeofday (struct timespec *tv)
{
tv->tv_sec = 0;
tv->tv_nsec = 0;
}
void machine_halt (void) __attribute__ ((noreturn));
void machine_halt (void)
{
for (;;) {
DWC(0) = 0x7777;
DWC(1) = 0x7777;
ASC = 0xffff;
FLGREG(0) = 1; /* Halt immediately. */
asm ("di; halt; nop; nop; nop; nop; nop");
}
}
void machine_restart (char *__unused)
{
machine_halt ();
}
void machine_power_off (void)
{
machine_halt ();
}
/* Interrupts */
struct v850e_intc_irq_init irq_inits[] = {
{ "IRQ", 0, NUM_MACH_IRQS, 1, 7 },
{ "RPU", IRQ_RPU(0), IRQ_RPU_NUM, 1, 6 },
{ 0 }
};
#define NUM_IRQ_INITS (ARRAY_SIZE(irq_inits) - 1)
struct hw_interrupt_type hw_itypes[NUM_IRQ_INITS];
/* Initialize interrupts. */
void __init mach_init_irqs (void)
{
v850e_intc_init_irq_types (irq_inits, hw_itypes);
}
/* An interrupt handler that copies the registers to a known memory location,
for debugging purposes. */
static void make_reg_snap (int irq, void *dummy, struct pt_regs *regs)
{
(*(unsigned *)REG_DUMP_ADDR)++;
(*(struct pt_regs *)(REG_DUMP_ADDR + sizeof (unsigned))) = *regs;
}
static int reg_snap_dev_id;
static struct irqaction reg_snap_action = {
.handler = make_reg_snap,
.mask = CPU_MASK_NONE,
.name = "reg_snap",
.dev_id = &reg_snap_dev_id,
};
arch/v850/kernel/fpga85e2c.ld deleted 100644 → 0
View file @ 99764fa4
/* Linker script for the FPGA implementation of the V850E2 NA85E2C cpu core
(CONFIG_V850E2_FPGA85E2C). */
MEMORY {
/* Reset vector. */
RESET : ORIGIN = 0, LENGTH = 0x10
/* Interrupt vectors. */
INTV : ORIGIN = 0x10, LENGTH = 0x470
/* The `window' in RAM were we're allowed to load stuff. */
RAM_LOW : ORIGIN = 0x480, LENGTH = 0x0005FB80
/* Some more ram above the window were we can put bss &c. */
RAM_HIGH : ORIGIN = 0x00060000, LENGTH = 0x000A0000
/* This is the area visible from the outside world (we can use
this only for uninitialized data). */
VISIBLE : ORIGIN = 0x00200000, LENGTH = 0x00060000
}
SECTIONS {
.reset : {
__kram_start = . ;
__intv_start = . ;
*(.intv.reset) /* Reset vector */
} > RESET
.ram_low : {
__r0_ram = . ; /* Must be near address 0. */
. = . + 32 ;
TEXT_CONTENTS
DATA_CONTENTS
ROOT_FS_CONTENTS
RAMK_INIT_CONTENTS_NO_END
INITRAMFS_CONTENTS
} > RAM_LOW
/* Where the interrupt vectors are initially loaded. */
__intv_load_start = . ;
.intv : {
*(.intv.common) /* Vectors common to all v850e proc. */
*(.intv.mach) /* Machine-specific int. vectors. */
__intv_end = . ;
} > INTV AT> RAM_LOW
.ram_high : {
/* This is here so that when we free init memory the
load-time copy of the interrupt vectors and any empty
space at the end of the `RAM_LOW' area is freed too. */
. = ALIGN (4096);
__init_end = . ;
BSS_CONTENTS
__kram_end = . ;
BOOTMAP_CONTENTS
} > RAM_HIGH
.visible : {
_memcons_output = . ;
. = . + 0x8000 ;
_memcons_output_end = . ;
} > VISIBLE
}
arch/v850/kernel/gbus_int.c deleted 100644 → 0
View file @ 99764fa4
/*
* arch/v850/kernel/gbus_int.c -- Midas labs GBUS interrupt support
*
* Copyright (C) 2001,02,03 NEC Electronics Corporation
* Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org>
*
* This file is subject to the terms and conditions of the GNU General
* Public License. See the file COPYING in the main directory of this
* archive for more details.
*
* Written by Miles Bader <miles@gnu.org>
*/
#include <linux/types.h>
#include <linux/init.h>
#include <linux/irq.h>
#include <linux/interrupt.h>
#include <linux/signal.h>
#include <linux/kernel.h>
#include <asm/machdep.h>
/* The number of shared GINT interrupts. */
#define NUM_GINTS 4
/* For each GINT interrupt, how many GBUS interrupts are using it. */
static unsigned gint_num_active_irqs[NUM_GINTS] = { 0 };
/* A table of GINTn interrupts we actually use.
Note that we don't use GINT0 because all the boards we support treat it
specially. */
struct used_gint {
unsigned gint;
unsigned priority;
} used_gint[] = {
{ 1, GBUS_INT_PRIORITY_HIGH },
{ 3, GBUS_INT_PRIORITY_LOW }
};
#define NUM_USED_GINTS ARRAY_SIZE(used_gint)
/* A table of which GINT is used by each GBUS interrupts (they are
assigned based on priority). */
static unsigned char gbus_int_gint[IRQ_GBUS_INT_NUM];
/* Interrupt enabling/disabling. */
/* Enable interrupt handling for interrupt IRQ. */
void gbus_int_enable_irq (unsigned irq)
{
unsigned gint = gbus_int_gint[irq - GBUS_INT_BASE_IRQ];
GBUS_INT_ENABLE (GBUS_INT_IRQ_WORD(irq), gint)
|= GBUS_INT_IRQ_MASK (irq);
}
/* Disable interrupt handling for interrupt IRQ. Note that any
interrupts received while disabled will be delivered once the
interrupt is enabled again, unless they are explicitly cleared using
`gbus_int_clear_pending_irq'. */
void gbus_int_disable_irq (unsigned irq)
{
unsigned gint = gbus_int_gint[irq - GBUS_INT_BASE_IRQ];
GBUS_INT_ENABLE (GBUS_INT_IRQ_WORD(irq), gint)
&= ~GBUS_INT_IRQ_MASK (irq);
}
/* Return true if interrupt handling for interrupt IRQ is enabled. */
int gbus_int_irq_enabled (unsigned irq)
{
unsigned gint = gbus_int_gint[irq - GBUS_INT_BASE_IRQ];
return (GBUS_INT_ENABLE (GBUS_INT_IRQ_WORD(irq), gint)
& GBUS_INT_IRQ_MASK(irq));
}
/* Disable all GBUS irqs. */
void gbus_int_disable_irqs ()
{
unsigned w, n;
for (w = 0; w < GBUS_INT_NUM_WORDS; w++)
for (n = 0; n < IRQ_GINT_NUM; n++)
GBUS_INT_ENABLE (w, n) = 0;
}
/* Clear any pending interrupts for IRQ. */
void gbus_int_clear_pending_irq (unsigned irq)
{
GBUS_INT_CLEAR (GBUS_INT_IRQ_WORD(irq)) = GBUS_INT_IRQ_MASK (irq);
}
/* Return true if interrupt IRQ is pending (but disabled). */
int gbus_int_irq_pending (unsigned irq)
{
return (GBUS_INT_STATUS (GBUS_INT_IRQ_WORD(irq))
& GBUS_INT_IRQ_MASK(irq));
}
/* Delegating interrupts. */
/* Handle a shared GINT interrupt by passing to the appropriate GBUS
interrupt handler. */
static irqreturn_t gbus_int_handle_irq (int irq, void *dev_id,
struct pt_regs *regs)
{
unsigned w;
irqreturn_t rval = IRQ_NONE;
unsigned gint = irq - IRQ_GINT (0);
for (w = 0; w < GBUS_INT_NUM_WORDS; w++) {
unsigned status = GBUS_INT_STATUS (w);
unsigned enable = GBUS_INT_ENABLE (w, gint);
/* Only pay attention to enabled interrupts. */
status &= enable;
if (status) {
irq = IRQ_GBUS_INT (w * GBUS_INT_BITS_PER_WORD);
do {
/* There's an active interrupt in word
W, find out which one, and call its
handler. */
while (! (status & 0x1)) {
irq++;
status >>= 1;
}
status &= ~0x1;
/* Recursively call handle_irq to handle it. */
handle_irq (irq, regs);
rval = IRQ_HANDLED;
} while (status);
}
}
/* Toggle the `all enable' bit back and forth, which should cause
another edge transition if there are any other interrupts
still pending, and so result in another CPU interrupt. */
GBUS_INT_ENABLE (0, gint) &= ~0x1;
GBUS_INT_ENABLE (0, gint) |= 0x1;
return rval;
}
/* Initialize GBUS interrupt sources. */
static void irq_nop (unsigned irq) { }
static unsigned gbus_int_startup_irq (unsigned irq)
{
unsigned gint = gbus_int_gint[irq - GBUS_INT_BASE_IRQ];
if (gint_num_active_irqs[gint] == 0) {
/* First enable the CPU interrupt. */
int rval =
request_irq (IRQ_GINT(gint), gbus_int_handle_irq,
IRQF_DISABLED,
"gbus_int_handler",
&gint_num_active_irqs[gint]);
if (rval != 0)
return rval;
}
gint_num_active_irqs[gint]++;
gbus_int_clear_pending_irq (irq);
gbus_int_enable_irq (irq);
return 0;
}
static void gbus_int_shutdown_irq (unsigned irq)
{
unsigned gint = gbus_int_gint[irq - GBUS_INT_BASE_IRQ];
gbus_int_disable_irq (irq);
if (--gint_num_active_irqs[gint] == 0)
/* Disable the CPU interrupt. */
free_irq (IRQ_GINT(gint), &gint_num_active_irqs[gint]);
}
/* Initialize HW_IRQ_TYPES for INTC-controlled irqs described in array
INITS (which is terminated by an entry with the name field == 0). */
void __init gbus_int_init_irq_types (struct gbus_int_irq_init *inits,
struct hw_interrupt_type *hw_irq_types)
{
struct gbus_int_irq_init *init;
for (init = inits; init->name; init++) {
unsigned i;
struct hw_interrupt_type *hwit = hw_irq_types++;
hwit->typename = init->name;
hwit->startup = gbus_int_startup_irq;
hwit->shutdown = gbus_int_shutdown_irq;
hwit->enable = gbus_int_enable_irq;
hwit->disable = gbus_int_disable_irq;
hwit->ack = irq_nop;
hwit->end = irq_nop;
/* Initialize kernel IRQ infrastructure for this interrupt. */
init_irq_handlers(init->base, init->num, init->interval, hwit);
/* Set the interrupt priorities. */
for (i = 0; i < init->num; i++) {
unsigned j;
for (j = 0; j < NUM_USED_GINTS; j++)
if (used_gint[j].priority > init->priority)
break;
/* Wherever we stopped looking is one past the
GINT we want. */
gbus_int_gint[init->base + i * init->interval
- GBUS_INT_BASE_IRQ]
= used_gint[j > 0 ? j - 1 : 0].gint;
}
}
}
/* Initialize IRQS. */
/* Chip interrupts (GINTn) shared among GBUS interrupts. */
static struct hw_interrupt_type gint_hw_itypes[NUM_USED_GINTS];
/* GBUS interrupts themselves. */
struct gbus_int_irq_init gbus_irq_inits[] __initdata = {
/* First set defaults. */
{ "GBUS_INT", IRQ_GBUS_INT(0), IRQ_GBUS_INT_NUM, 1, 6},
{ 0 }
};
#define NUM_GBUS_IRQ_INITS (ARRAY_SIZE(gbus_irq_inits) - 1)
static struct hw_interrupt_type gbus_hw_itypes[NUM_GBUS_IRQ_INITS];
/* Initialize GBUS interrupts. */
void __init gbus_int_init_irqs (void)
{
unsigned i;
/* First initialize the shared gint interrupts. */
for (i = 0; i < NUM_USED_GINTS; i++) {
unsigned gint = used_gint[i].gint;
struct v850e_intc_irq_init gint_irq_init[2];
/* We initialize one GINT interrupt at a time. */
gint_irq_init[0].name = "GINT";
gint_irq_init[0].base = IRQ_GINT (gint);
gint_irq_init[0].num = 1;
gint_irq_init[0].interval = 1;
gint_irq_init[0].priority = used_gint[i].priority;
gint_irq_init[1].name = 0; /* Terminate the vector. */
v850e_intc_init_irq_types (gint_irq_init, gint_hw_itypes);
}
/* Then the GBUS interrupts. */
gbus_int_disable_irqs ();
gbus_int_init_irq_types (gbus_irq_inits, gbus_hw_itypes);
/* Turn on the `all enable' bits, which are ANDed with
individual interrupt enable bits; we only want to bother with
the latter. They are the first bit in the first word of each
interrupt-enable area. */
for (i = 0; i < NUM_USED_GINTS; i++)
GBUS_INT_ENABLE (0, used_gint[i].gint) = 0x1;
}
arch/v850/kernel/head.S deleted 100644 → 0
View file @ 99764fa4
/*
* arch/v850/kernel/head.S -- Lowest-level startup code
*
* Copyright (C) 2001,02,03 NEC Electronics Corporation
* Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org>
*
* This file is subject to the terms and conditions of the GNU General
* Public License. See the file COPYING in the main directory of this
* archive for more details.
*
* Written by Miles Bader <miles@gnu.org>
*/
#include <asm/clinkage.h>
#include <asm/current.h>
#include <asm/entry.h>
#include <asm/thread_info.h>
#include <asm/irq.h>
/* Make a slightly more convenient alias for C_SYMBOL_NAME. */
#define CSYM C_SYMBOL_NAME
.text
// Define `mach_early_init' as a weak symbol
.global CSYM(mach_early_init)
.weak CSYM(mach_early_init)
C_ENTRY(start):
// Make sure interrupts are turned off, just in case
di
#ifdef CONFIG_RESET_GUARD
// See if we got here via an unexpected reset
ld.w RESET_GUARD, r19 // Check current value of reset guard
mov RESET_GUARD_ACTIVE, r20
cmp r19, r20
bne 1f // Guard was not active
// If we get here, the reset guard was active. Load up some
// interesting values as arguments, and jump to the handler.
st.w r0, RESET_GUARD // Allow further resets to succeed
mov lp, r6 // Arg 0: return address
ld.b KM, r7 // Arg 1: kernel mode
mov sp, r9 // Arg 3: stack pointer
ld.w KSP, r19 // maybe switch to kernel stack
cmp r7, r0 // see if already in kernel mode
cmov z, r19, sp, sp // and switch to kernel stack if not
GET_CURRENT_TASK(r8) // Arg 2: task pointer
jr CSYM(unexpected_reset)
1: st.w r20, RESET_GUARD // Turn on reset guard
#endif /* CONFIG_RESET_GUARD */
// Setup a temporary stack for doing pre-initialization function calls.
//
// We can't use the initial kernel stack, because (1) it may be
// located in memory we're not allowed to touch, and (2) since
// it's in the data segment, calling memcpy to initialize that
// area from ROM will overwrite memcpy's return address.
mov hilo(CSYM(_init_stack_end) - 4), sp
// See if there's a platform-specific early-initialization routine
// defined; it's a weak symbol, so it will have an address of zero if
// there's not.
mov hilo(CSYM(mach_early_init)), r6
cmp r6, r0
bz 3f
// There is one, so call it. If this function is written in C, it
// should be very careful -- the stack pointer is valid, but very
// little else is (e.g., bss is not zeroed yet, and initialized data
// hasn't been).
jarl 2f, lp // first figure out return address
2: add 3f - ., lp
jmp [r6] // do call
3:
#ifdef CONFIG_ROM_KERNEL
// Copy the data area from ROM to RAM
mov hilo(CSYM(_rom_copy_dst_start)), r6
mov hilo(CSYM(_rom_copy_src_start)), r7
mov hilo(CSYM(_rom_copy_dst_end)), r8
sub r6, r8
jarl CSYM(memcpy), lp
#endif
// Load the initial thread's stack, and current task pointer (in r16)
mov hilo(CSYM(init_thread_union)), r19
movea THREAD_SIZE, r19, sp
ld.w TI_TASK[r19], CURRENT_TASK
#ifdef CONFIG_TIME_BOOTUP
/* This stuff must come after mach_early_init, because interrupts may
not work until after its been called. */
jarl CSYM(highres_timer_reset), lp
jarl CSYM(highres_timer_start), lp
#endif
// Kernel stack pointer save location
st.w sp, KSP
// Assert that we're in `kernel mode'
mov 1, r19
st.w r19, KM
#ifdef CONFIG_ZERO_BSS
// Zero bss area, since we can't rely upon any loader to do so
mov hilo(CSYM(_sbss)), r6
mov r0, r7
mov hilo(CSYM(_ebss)), r8
sub r6, r8
jarl CSYM(memset), lp
#endif
// What happens if the main kernel function returns (it shouldn't)
mov hilo(CSYM(machine_halt)), lp
// Start the linux kernel. We use an indirect jump to get extra
// range, because on some platforms this initial startup code
// (and the associated platform-specific code in mach_early_init)
// are located far away from the main kernel, e.g. so that they
// can initialize RAM first and copy the kernel or something.
mov hilo(CSYM(start_kernel)), r12
jmp [r12]
C_END(start)
arch/v850/kernel/highres_timer.c deleted 100644 → 0
View file @ 99764fa4
/*
* arch/v850/kernel/highres_timer.c -- High resolution timing routines
*
* Copyright (C) 2001,02,03 NEC Electronics Corporation
* Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org>
*
* This file is subject to the terms and conditions of the GNU General
* Public License. See the file COPYING in the main directory of this
* archive for more details.
*
* Written by Miles Bader <miles@gnu.org>
*/
#include <asm/system.h>
#include <asm/v850e_timer_d.h>
#include <asm/highres_timer.h>
#define HIGHRES_TIMER_USEC_SHIFT 12
/* Pre-calculated constant used for converting ticks to real time
units. We initialize it to prevent it being put into BSS. */
static u32 highres_timer_usec_prescale = 1;
void highres_timer_slow_tick_irq (void) __attribute__ ((noreturn));
void highres_timer_slow_tick_irq (void)
{
/* This is an interrupt handler, so it must be very careful to
not to trash any registers. At this point, the stack-pointer
(r3) has been saved in the chip ram location ENTRY_SP by the
interrupt vector, so we can use it as a scratch register; we
must also restore it before returning. */
asm ("ld.w %0[r0], sp;"
"add 1, sp;"
"st.w sp, %0[r0];"
"ld.w %1[r0], sp;" /* restore pre-irq stack-pointer */
"reti"
::
"i" (HIGHRES_TIMER_SLOW_TICKS_ADDR),
"i" (ENTRY_SP_ADDR)
: "memory");
}
void highres_timer_reset (void)
{
V850E_TIMER_D_TMD (HIGHRES_TIMER_TIMER_D_UNIT) = 0;
HIGHRES_TIMER_SLOW_TICKS = 0;
}
void highres_timer_start (void)
{
u32 fast_tick_rate;
/* Start hardware timer. */
v850e_timer_d_configure (HIGHRES_TIMER_TIMER_D_UNIT,
HIGHRES_TIMER_SLOW_TICK_RATE);
fast_tick_rate =
(V850E_TIMER_D_BASE_FREQ
>> V850E_TIMER_D_DIVLOG2 (HIGHRES_TIMER_TIMER_D_UNIT));
/* The obvious way of calculating microseconds from fast ticks
is to do:
usec = fast_ticks * 10^6 / fast_tick_rate
However, divisions are much slower than multiplications, and
the above calculation can overflow, so we do this instead:
usec = fast_ticks * (10^6 * 2^12 / fast_tick_rate) / 2^12
since we can pre-calculate (10^6 * (2^12 / fast_tick_rate))
and use a shift for dividing by 2^12, this avoids division,
and is almost as accurate (it differs by about 2 microseconds
at the extreme value of the fast-tick counter's ranger). */
highres_timer_usec_prescale = ((1000000 << HIGHRES_TIMER_USEC_SHIFT)
/ fast_tick_rate);
/* Enable the interrupt (which is hardwired to this use), and
give it the highest priority. */
V850E_INTC_IC (IRQ_INTCMD (HIGHRES_TIMER_TIMER_D_UNIT)) = 0;
}
void highres_timer_stop (void)
{
/* Stop the timer. */
V850E_TIMER_D_TMCD (HIGHRES_TIMER_TIMER_D_UNIT) =
V850E_TIMER_D_TMCD_CAE;
/* Disable its interrupt, just in case. */
v850e_intc_disable_irq (IRQ_INTCMD (HIGHRES_TIMER_TIMER_D_UNIT));
}
inline void highres_timer_read_ticks (u32 *slow_ticks, u32 *fast_ticks)
{
int flags;
u32 fast_ticks_1, fast_ticks_2, _slow_ticks;
local_irq_save (flags);
fast_ticks_1 = V850E_TIMER_D_TMD (HIGHRES_TIMER_TIMER_D_UNIT);
_slow_ticks = HIGHRES_TIMER_SLOW_TICKS;
fast_ticks_2 = V850E_TIMER_D_TMD (HIGHRES_TIMER_TIMER_D_UNIT);
local_irq_restore (flags);
if (fast_ticks_2 < fast_ticks_1)
_slow_ticks++;
*slow_ticks = _slow_ticks;
*fast_ticks = fast_ticks_2;
}
inline void highres_timer_ticks_to_timeval (u32 slow_ticks, u32 fast_ticks,
struct timeval *tv)
{
unsigned long sec, sec_rem, usec;
usec = ((fast_ticks * highres_timer_usec_prescale)
>> HIGHRES_TIMER_USEC_SHIFT);
sec = slow_ticks / HIGHRES_TIMER_SLOW_TICK_RATE;
sec_rem = slow_ticks % HIGHRES_TIMER_SLOW_TICK_RATE;
usec += sec_rem * (1000000 / HIGHRES_TIMER_SLOW_TICK_RATE);
tv->tv_sec = sec;
tv->tv_usec = usec;
}
void highres_timer_read (struct timeval *tv)
{
u32 fast_ticks, slow_ticks;
highres_timer_read_ticks (&slow_ticks, &fast_ticks);
highres_timer_ticks_to_timeval (slow_ticks, fast_ticks, tv);
}
arch/v850/kernel/init_task.c deleted 100644 → 0
View file @ 99764fa4
/*
* arch/v850/kernel/init_task.c -- Initial task/thread structures
*
* Copyright (C) 2002,03 NEC Electronics Corporation
* Copyright (C) 2002,03 Miles Bader <miles@gnu.org>
*
* This file is subject to the terms and conditions of the GNU General
* Public License. See the file COPYING in the main directory of this
* archive for more details.
*/
#include <linux/mm.h>
#include <linux/module.h>
#include <linux/sched.h>
#include <linux/init.h>
#include <linux/init_task.h>
#include <linux/fs.h>
#include <linux/mqueue.h>
#include <asm/uaccess.h>
#include <asm/pgtable.h>
static struct fs_struct init_fs = INIT_FS;
static struct signal_struct init_signals = INIT_SIGNALS (init_signals);
static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand);
struct mm_struct init_mm = INIT_MM (init_mm);
EXPORT_SYMBOL(init_mm);
/*
* Initial task structure.
*
* All other task structs will be allocated on slabs in fork.c
*/
struct task_struct init_task = INIT_TASK (init_task);
EXPORT_SYMBOL(init_task);
/*
* Initial thread structure.
*
* We need to make sure that this is 8192-byte aligned due to the
* way process stacks are handled. This is done by having a special
* "init_task" linker map entry.
*/
union thread_union init_thread_union
__attribute__((__section__(".data.init_task"))) =
{ INIT_THREAD_INFO(init_task) };
arch/v850/kernel/intv.S deleted 100644 → 0
View file @ 99764fa4
/*
* arch/v850/kernel/intv.S -- Interrupt vectors
*
* Copyright (C) 2001,02,03 NEC Electronics Corporation
* Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org>
*
* This file is subject to the terms and conditions of the GNU General
* Public License. See the file COPYING in the main directory of this
* archive for more details.
*
* Written by Miles Bader <miles@gnu.org>
*/
#include <asm/clinkage.h>
#include <asm/irq.h>
#include <asm/machdep.h>
#include <asm/entry.h>
#ifdef CONFIG_V850E_HIGHRES_TIMER
#include <asm/highres_timer.h>
#endif
/* Jump to an interrupt/trap handler. These handlers (defined in entry.S)
expect the stack-pointer to be saved in ENTRY_SP, so we use sp to do an
indirect jump (which avoids problems when the handler is more than a signed
22-bit offset away). */
#define JUMP_TO_HANDLER(name, sp_save_loc) \
st.w sp, sp_save_loc; \
mov hilo(name), sp; \
jmp [sp]
/* Reset vector. */
.section .intv.reset, "ax"
.org 0x0
mov hilo(C_SYMBOL_NAME(start)), r1;
jmp [r1]
/* Generic interrupt vectors. */
.section .intv.common, "ax"
.balign 0x10
JUMP_TO_HANDLER (nmi, NMI_ENTRY_SP) // 0x10 - NMI0
.balign 0x10
JUMP_TO_HANDLER (nmi, NMI_ENTRY_SP) // 0x20 - NMI1
.balign 0x10
JUMP_TO_HANDLER (nmi, NMI_ENTRY_SP) // 0x30 - NMI2
.balign 0x10
JUMP_TO_HANDLER (trap, ENTRY_SP) // 0x40 - TRAP0n
.balign 0x10
JUMP_TO_HANDLER (trap, ENTRY_SP) // 0x50 - TRAP1n
.balign 0x10
JUMP_TO_HANDLER (dbtrap, ENTRY_SP) // 0x60 - Illegal op / DBTRAP insn
/* Hardware interrupt vectors. */
.section .intv.mach, "ax"
.org 0x0
#if defined (CONFIG_V850E_HIGHRES_TIMER) && defined (IRQ_INTCMD)
/* Interrupts before the highres timer interrupt. */
.rept IRQ_INTCMD (HIGHRES_TIMER_TIMER_D_UNIT)
.balign 0x10
JUMP_TO_HANDLER (irq, ENTRY_SP)
.endr
/* The highres timer interrupt. */
.balign 0x10
JUMP_TO_HANDLER (C_SYMBOL_NAME (highres_timer_slow_tick_irq), ENTRY_SP)
/* Interrupts after the highres timer interrupt. */
.rept NUM_CPU_IRQS - IRQ_INTCMD (HIGHRES_TIMER_TIMER_D_UNIT) - 1
.balign 0x10
JUMP_TO_HANDLER (irq, ENTRY_SP)
.endr
#else /* No highres timer */
.rept NUM_CPU_IRQS
.balign 0x10
JUMP_TO_HANDLER (irq, ENTRY_SP)
.endr
#endif /* Highres timer */
arch/v850/kernel/irq.c deleted 100644 → 0
View file @ 99764fa4
/*
* arch/v850/kernel/irq.c -- High-level interrupt handling
*
* Copyright (C) 2001,02,03,04,05 NEC Electronics Corporation
* Copyright (C) 2001,02,03,04,05 Miles Bader <miles@gnu.org>
* Copyright (C) 1994-2000 Ralf Baechle
* Copyright (C) 1992 Linus Torvalds
*
* This file is subject to the terms and conditions of the GNU General
* Public License. See the file COPYING in the main directory of this
* archive for more details.
*
* This file was was derived from the mips version, arch/mips/kernel/irq.c
*/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/irq.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/kernel_stat.h>
#include <linux/slab.h>
#include <linux/mm.h>
#include <linux/random.h>
#include <linux/seq_file.h>
#include <asm/system.h>
/*
* 'what should we do if we get a hw irq event on an illegal vector'.
* each architecture has to answer this themselves, it doesn't deserve
* a generic callback i think.
*/
void ack_bad_irq(unsigned int irq)
{
printk("received IRQ %d with unknown interrupt type\n", irq);
}
volatile unsigned long irq_err_count, spurious_count;
/*
* Generic, controller-independent functions:
*/
int show_interrupts(struct seq_file *p, void *v)
{
int irq = *(loff_t *) v;
if (irq == 0) {
int cpu;
seq_puts(p, " ");
for (cpu=0; cpu < 1 /*smp_num_cpus*/; cpu++)
seq_printf(p, "CPU%d ", cpu);
seq_putc(p, '\n');
}
if (irq < NR_IRQS) {
unsigned long flags;
struct irqaction *action;
spin_lock_irqsave(&irq_desc[irq].lock, flags);
action = irq_desc[irq].action;
if (action) {
int j;
int count = 0;
int num = -1;
const char *type_name = irq_desc[irq].chip->typename;
for (j = 0; j < NR_IRQS; j++)
if (irq_desc[j].chip->typename == type_name){
if (irq == j)
num = count;
count++;
}
seq_printf(p, "%3d: ",irq);
seq_printf(p, "%10u ", kstat_irqs(irq));
if (count > 1) {
int prec = (num >= 100 ? 3 : num >= 10 ? 2 : 1);
seq_printf(p, " %*s%d", 14 - prec,
type_name, num);
} else
seq_printf(p, " %14s", type_name);
seq_printf(p, " %s", action->name);
for (action=action->next; action; action = action->next)
seq_printf(p, ", %s", action->name);
seq_putc(p, '\n');
}
spin_unlock_irqrestore(&irq_desc[irq].lock, flags);
} else if (irq == NR_IRQS)
seq_printf(p, "ERR: %10lu\n", irq_err_count);
return 0;
}
/* Handle interrupt IRQ. REGS are the registers at the time of ther
interrupt. */
unsigned int handle_irq (int irq, struct pt_regs *regs)
{
irq_enter();
__do_IRQ(irq, regs);
irq_exit();
return 1;
}
/* Initialize irq handling for IRQs.
BASE_IRQ, BASE_IRQ+INTERVAL, ..., BASE_IRQ+NUM*INTERVAL
to IRQ_TYPE. An IRQ_TYPE of 0 means to use a generic interrupt type. */
void __init
init_irq_handlers (int base_irq, int num, int interval,
struct hw_interrupt_type *irq_type)
{
while (num-- > 0) {
irq_desc[base_irq].status = IRQ_DISABLED;
irq_desc[base_irq].action = NULL;
irq_desc[base_irq].depth = 1;
irq_desc[base_irq].chip = irq_type;
base_irq += interval;
}
}
arch/v850/kernel/ma.c deleted 100644 → 0
View file @ 99764fa4
/*
* arch/v850/kernel/ma.c -- V850E/MA series of cpu chips
*
* Copyright (C) 2001,02,03 NEC Electronics Corporation
* Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org>
*
* This file is subject to the terms and conditions of the GNU General
* Public License. See the file COPYING in the main directory of this
* archive for more details.
*
* Written by Miles Bader <miles@gnu.org>
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/mm.h>
#include <linux/swap.h>
#include <linux/bootmem.h>
#include <linux/irq.h>
#include <asm/atomic.h>
#include <asm/page.h>
#include <asm/machdep.h>
#include <asm/v850e_timer_d.h>
#include "mach.h"
void __init mach_sched_init (struct irqaction *timer_action)
{
/* Start hardware timer. */
v850e_timer_d_configure (0, HZ);
/* Install timer interrupt handler. */
setup_irq (IRQ_INTCMD(0), timer_action);
}
static struct v850e_intc_irq_init irq_inits[] = {
{ "IRQ", 0, NUM_MACH_IRQS, 1, 7 },
{ "CMD", IRQ_INTCMD(0), IRQ_INTCMD_NUM, 1, 5 },
{ "DMA", IRQ_INTDMA(0), IRQ_INTDMA_NUM, 1, 2 },
{ "CSI", IRQ_INTCSI(0), IRQ_INTCSI_NUM, 4, 4 },
{ "SER", IRQ_INTSER(0), IRQ_INTSER_NUM, 4, 3 },
{ "SR", IRQ_INTSR(0), IRQ_INTSR_NUM, 4, 4 },
{ "ST", IRQ_INTST(0), IRQ_INTST_NUM, 4, 5 },
{ 0 }
};
#define NUM_IRQ_INITS (ARRAY_SIZE(irq_inits) - 1)
static struct hw_interrupt_type hw_itypes[NUM_IRQ_INITS];
/* Initialize MA chip interrupts. */
void __init ma_init_irqs (void)
{
v850e_intc_init_irq_types (irq_inits, hw_itypes);
}
/* Called before configuring an on-chip UART. */
void ma_uart_pre_configure (unsigned chan, unsigned cflags, unsigned baud)
{
/* We only know about the first two UART channels (though
specific chips may have more). */
if (chan < 2) {
unsigned bits = 0x3 << (chan * 3);
/* Specify that the relevant pins on the chip should do
serial I/O, not direct I/O. */
MA_PORT4_PMC |= bits;
/* Specify that we're using the UART, not the CSI device. */
MA_PORT4_PFC |= bits;
}
}
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#
# arch/v850/lib/Makefile
#
lib-y = ashrdi3.o ashldi3.o lshrdi3.o muldi3.o negdi2.o \
checksum.o memcpy.o memset.o
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