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linux
linux-davinci
Commits
e9f874b6
Commit
e9f874b6
authored
Oct 11, 2007
by
Ralf Baechle
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[MIPS] Clockevent driver for BCM1480
Signed-off-by:
Ralf Baechle
<
ralf@linux-mips.org
>
parent
9b9ea220
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1
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-25
arch/mips/sibyte/bcm1480/time.c
arch/mips/sibyte/bcm1480/time.c
+80
-25
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arch/mips/sibyte/bcm1480/time.c
View file @
e9f874b6
...
@@ -25,6 +25,7 @@
...
@@ -25,6 +25,7 @@
* code to do general bookkeeping (e.g. update jiffies, run
* code to do general bookkeeping (e.g. update jiffies, run
* bottom halves, etc.)
* bottom halves, etc.)
*/
*/
#include <linux/clockchips.h>
#include <linux/interrupt.h>
#include <linux/interrupt.h>
#include <linux/sched.h>
#include <linux/sched.h>
#include <linux/spinlock.h>
#include <linux/spinlock.h>
...
@@ -55,15 +56,12 @@
...
@@ -55,15 +56,12 @@
extern
int
bcm1480_steal_irq
(
int
irq
);
extern
int
bcm1480_steal_irq
(
int
irq
);
void
bcm1480
_time_init
(
void
)
void
__init
plat
_time_init
(
void
)
{
{
int
cpu
=
smp_processor_id
();
unsigned
int
cpu
=
smp_processor_id
();
int
irq
=
K_BCM1480_INT_TIMER_0
+
cpu
;
unsigned
int
irq
=
K_BCM1480_INT_TIMER_0
+
cpu
;
/* Only have 4 general purpose timers */
BUG_ON
(
cpu
>
3
);
/* Only have 4 general purpose timers */
if
(
cpu
>
3
)
{
BUG
();
}
bcm1480_mask_irq
(
cpu
,
irq
);
bcm1480_mask_irq
(
cpu
,
irq
);
...
@@ -71,27 +69,83 @@ void bcm1480_time_init(void)
...
@@ -71,27 +69,83 @@ void bcm1480_time_init(void)
__raw_writeq
(
IMR_IP4_VAL
,
IOADDR
(
A_BCM1480_IMR_REGISTER
(
cpu
,
R_BCM1480_IMR_INTERRUPT_MAP_BASE_H
)
__raw_writeq
(
IMR_IP4_VAL
,
IOADDR
(
A_BCM1480_IMR_REGISTER
(
cpu
,
R_BCM1480_IMR_INTERRUPT_MAP_BASE_H
)
+
(
irq
<<
3
)));
+
(
irq
<<
3
)));
/* the general purpose timer ticks at 1 Mhz independent of the rest of the system */
bcm1480_unmask_irq
(
cpu
,
irq
);
/* Disable the timer and set up the count */
bcm1480_steal_irq
(
irq
);
__raw_writeq
(
0
,
IOADDR
(
A_SCD_TIMER_REGISTER
(
cpu
,
R_SCD_TIMER_CFG
)));
}
__raw_writeq
(
BCM1480_HPT_VALUE
/
HZ
,
IOADDR
(
A_SCD_TIMER_REGISTER
(
cpu
,
R_SCD_TIMER_INIT
)));
/* Set the timer running */
/*
* The general purpose timer ticks at 1 Mhz independent if
* the rest of the system
*/
static
void
sibyte_set_mode
(
enum
clock_event_mode
mode
,
struct
clock_event_device
*
evt
)
{
unsigned
int
cpu
=
smp_processor_id
();
void
__iomem
*
timer_cfg
,
*
timer_init
;
timer_cfg
=
IOADDR
(
A_SCD_TIMER_REGISTER
(
cpu
,
R_SCD_TIMER_CFG
));
timer_init
=
IOADDR
(
A_SCD_TIMER_REGISTER
(
cpu
,
R_SCD_TIMER_CFG
));
switch
(
mode
)
{
case
CLOCK_EVT_MODE_PERIODIC
:
__raw_writeq
(
0
,
timer_cfg
);
__raw_writeq
(
BCM1480_HPT_VALUE
/
HZ
-
1
,
timer_init
);
__raw_writeq
(
M_SCD_TIMER_ENABLE
|
M_SCD_TIMER_MODE_CONTINUOUS
,
timer_cfg
);
break
;
case
CLOCK_EVT_MODE_ONESHOT
:
/* Stop the timer until we actually program a shot */
case
CLOCK_EVT_MODE_SHUTDOWN
:
__raw_writeq
(
0
,
timer_cfg
);
break
;
case
CLOCK_EVT_MODE_UNUSED
:
/* shuddup gcc */
;
}
}
struct
clock_event_device
sibyte_hpt_clockevent
=
{
.
name
=
"bcm1480-counter"
,
.
features
=
CLOCK_EVT_FEAT_PERIODIC
,
.
set_mode
=
sibyte_set_mode
,
.
shift
=
32
,
.
irq
=
0
,
};
static
irqreturn_t
sibyte_counter_handler
(
int
irq
,
void
*
dev_id
)
{
struct
clock_event_device
*
cd
=
&
sibyte_hpt_clockevent
;
unsigned
int
cpu
=
smp_processor_id
();
/* Reset the timer */
__raw_writeq
(
M_SCD_TIMER_ENABLE
|
M_SCD_TIMER_MODE_CONTINUOUS
,
__raw_writeq
(
M_SCD_TIMER_ENABLE
|
M_SCD_TIMER_MODE_CONTINUOUS
,
IOADDR
(
A_SCD_TIMER_REGISTER
(
cpu
,
R_SCD_TIMER_CFG
)));
IOADDR
(
A_SCD_TIMER_REGISTER
(
cpu
,
R_SCD_TIMER_CFG
)));
cd
->
event_handler
(
cd
);
bcm1480_unmask_irq
(
cpu
,
irq
);
return
IRQ_HANDLED
;
bcm1480_steal_irq
(
irq
);
}
/*
* This interrupt is "special" in that it doesn't use the request_irq
static
struct
irqaction
sibyte_counter_irqaction
=
{
* way to hook the irq line. The timer interrupt is initialized early
.
handler
=
sibyte_counter_handler
,
* enough to make this a major pain, and it's also firing enough to
.
flags
=
IRQF_DISABLED
|
IRQF_PERCPU
,
* warrant a bit of special case code. bcm1480_timer_interrupt is
.
name
=
"timer"
,
* called directly from irq_handler.S when IP[4] is set during an
};
* interrupt
*/
/*
* This interrupt is "special" in that it doesn't use the request_irq
* way to hook the irq line. The timer interrupt is initialized early
* enough to make this a major pain, and it's also firing enough to
* warrant a bit of special case code. bcm1480_timer_interrupt is
* called directly from irq_handler.S when IP[4] is set during an
* interrupt
*/
static
void
__init
sb1480_clockevent_init
(
void
)
{
unsigned
int
cpu
=
smp_processor_id
();
unsigned
int
irq
=
K_BCM1480_INT_TIMER_0
+
cpu
;
setup_irq
(
irq
,
&
sibyte_counter_irqaction
);
}
}
void
bcm1480_timer_interrupt
(
void
)
void
bcm1480_timer_interrupt
(
void
)
...
@@ -118,4 +172,5 @@ void __init bcm1480_hpt_setup(void)
...
@@ -118,4 +172,5 @@ void __init bcm1480_hpt_setup(void)
{
{
clocksource_mips
.
read
=
bcm1480_hpt_read
;
clocksource_mips
.
read
=
bcm1480_hpt_read
;
mips_hpt_frequency
=
BCM1480_HPT_VALUE
;
mips_hpt_frequency
=
BCM1480_HPT_VALUE
;
sb1480_clockevent_init
();
}
}
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