Commit e9e75c74 authored by Martin Fouts's avatar Martin Fouts Committed by Tony Lindgren

[PATCH] ARM: OMAP: Nand support for Perseus2

Nand support for Perseus2
Signed-off-by: default avatarMartin Fouts <Martin.Fouts@palmsource.com>
Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
parent a29e6ebf
...@@ -50,10 +50,10 @@ config MTD_NAND_SPIA ...@@ -50,10 +50,10 @@ config MTD_NAND_SPIA
If you had to ask, you don't have one. Say 'N'. If you had to ask, you don't have one. Say 'N'.
config MTD_NAND_OMAP config MTD_NAND_OMAP
tristate "NAND Flash device on OMAP H3/H2 board" tristate "NAND Flash device on OMAP H3/H2/P2 or NETSTAR boards"
depends on ARM && ARCH_OMAP1 && MTD_NAND && (MACH_OMAP_H2 || MACH_OMAP_H3 || MACH_NETSTAR) depends on ARM && ARCH_OMAP1 && MTD_NAND && (MACH_OMAP_H2 || MACH_OMAP_H3 || MACH_NETSTAR || MACH_OMAP_PERSEUS2)
help help
Support for NAND flash on Texas Instruments H3/H2 platform. Support for NAND flash on Texas Instruments H3/H2/P2/NETSTAR platforms.
config MTD_NAND_TOTO config MTD_NAND_TOTO
tristate "NAND Flash device on TOTO board" tristate "NAND Flash device on TOTO board"
......
...@@ -36,6 +36,7 @@ ...@@ -36,6 +36,7 @@
#define H3_NAND_RB_GPIO_PIN 10 #define H3_NAND_RB_GPIO_PIN 10
#define H2_NAND_RB_GPIO_PIN 62 #define H2_NAND_RB_GPIO_PIN 62
#define P2_NAND_RB_GPIO_PIN 62
#define NETSTAR_NAND_RB_GPIO_PIN 1 #define NETSTAR_NAND_RB_GPIO_PIN 1
/* /*
* MTD structure for H3 board * MTD structure for H3 board
...@@ -108,6 +109,8 @@ static int omap_nand_ready(struct mtd_info *mtd) ...@@ -108,6 +109,8 @@ static int omap_nand_ready(struct mtd_info *mtd)
return omap_get_gpio_datain(H3_NAND_RB_GPIO_PIN); return omap_get_gpio_datain(H3_NAND_RB_GPIO_PIN);
if (machine_is_omap_h2()) if (machine_is_omap_h2())
return omap_get_gpio_datain(H2_NAND_RB_GPIO_PIN); return omap_get_gpio_datain(H2_NAND_RB_GPIO_PIN);
if (machine_is_omap_perseus2())
return omap_get_gpio_datain(H2_NAND_RB_GPIO_PIN);
if (machine_is_netstar()) if (machine_is_netstar())
return omap_get_gpio_datain(NETSTAR_NAND_RB_GPIO_PIN); return omap_get_gpio_datain(NETSTAR_NAND_RB_GPIO_PIN);
return 0; return 0;
...@@ -163,7 +166,7 @@ int __init omap_nand_init (void) ...@@ -163,7 +166,7 @@ int __init omap_nand_init (void)
int err = 0; int err = 0;
int nandboot = 0; int nandboot = 0;
if (!(machine_is_omap_h2() || machine_is_omap_h3() || machine_is_netstar())) if (!(machine_is_omap_h2() || machine_is_omap_h3() || machine_is_netstar() || machine_is_omap_perseus2()))
return -ENODEV; return -ENODEV;
/* Allocate memory for MTD device structure and private data */ /* Allocate memory for MTD device structure and private data */
...@@ -184,7 +187,7 @@ int __init omap_nand_init (void) ...@@ -184,7 +187,7 @@ int __init omap_nand_init (void)
/* Link the private data with the MTD structure */ /* Link the private data with the MTD structure */
omap_nand_mtd->priv = this; omap_nand_mtd->priv = this;
if (machine_is_omap_h2()) { if (machine_is_omap_h2() || machine_is_omap_perseus2()) {
/* FIXME on H2, R/B needs M7_1610_GPIO62 ... */ /* FIXME on H2, R/B needs M7_1610_GPIO62 ... */
this->chip_delay = 15; this->chip_delay = 15;
omap_cfg_reg(L3_1610_FLASH_CS2B_OE); omap_cfg_reg(L3_1610_FLASH_CS2B_OE);
...@@ -236,6 +239,10 @@ int __init omap_nand_init (void) ...@@ -236,6 +239,10 @@ int __init omap_nand_init (void)
if (!(machine_is_netstar())) if (!(machine_is_netstar()))
goto out_unsupported; goto out_unsupported;
/* fall through */ /* fall through */
case SZ_64M:
if (!(machine_is_netstar() || machine_is_omap_perseus2()))
goto out_unsupported;
/* fall through */
case SZ_32M: case SZ_32M:
#ifdef CONFIG_MTD_PARTITIONS #ifdef CONFIG_MTD_PARTITIONS
err = parse_mtd_partitions(omap_nand_mtd, part_probes, err = parse_mtd_partitions(omap_nand_mtd, part_probes,
...@@ -267,6 +274,8 @@ out_buf: ...@@ -267,6 +274,8 @@ out_buf:
if (this->dev_ready) { if (this->dev_ready) {
if (machine_is_omap_h2()) if (machine_is_omap_h2())
omap_free_gpio(H2_NAND_RB_GPIO_PIN); omap_free_gpio(H2_NAND_RB_GPIO_PIN);
else if (machine_is_omap_perseus2())
omap_free_gpio(P2_NAND_RB_GPIO_PIN);
else if (machine_is_omap_h3()) else if (machine_is_omap_h3())
omap_free_gpio(H3_NAND_RB_GPIO_PIN); omap_free_gpio(H3_NAND_RB_GPIO_PIN);
else if (machine_is_netstar()) else if (machine_is_netstar())
...@@ -291,6 +300,8 @@ static void __exit omap_nand_cleanup (void) ...@@ -291,6 +300,8 @@ static void __exit omap_nand_cleanup (void)
if (this->dev_ready) { if (this->dev_ready) {
if (machine_is_omap_h2()) if (machine_is_omap_h2())
omap_free_gpio(H2_NAND_RB_GPIO_PIN); omap_free_gpio(H2_NAND_RB_GPIO_PIN);
else if (machine_is_omap_h2())
omap_free_gpio(H2_NAND_RB_GPIO_PIN);
else if (machine_is_omap_h3()) else if (machine_is_omap_h3())
omap_free_gpio(H3_NAND_RB_GPIO_PIN); omap_free_gpio(H3_NAND_RB_GPIO_PIN);
else if (machine_is_netstar()) else if (machine_is_netstar())
......
...@@ -42,4 +42,8 @@ ...@@ -42,4 +42,8 @@
#define NR_IRQS (MAXIRQNUM + 1) #define NR_IRQS (MAXIRQNUM + 1)
/* Samsung NAND flash at CS2B or CS3(NAND Boot) */
#define OMAP_NAND_FLASH_START1 0x0A000000 /* CS2B */
#define OMAP_NAND_FLASH_START2 0x0C000000 /* CS3 */
#endif #endif
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