Commit a29e6ebf authored by Tony Lindgren's avatar Tony Lindgren

ARM: OMAP: Sync pm.c dyntick call with mainline

Sync pm.c dyntick call with mainline
parent 6ca21f2a
......@@ -90,10 +90,6 @@ void omap_pm_idle(void)
}
mask32 = omap_readl(ARM_SYSST);
#if defined(CONFIG_OMAP_32K_TIMER) && defined(CONFIG_NO_IDLE_HZ)
timer_dyn_reprogram();
#endif
/*
* Prevent the ULPD from entering low power state by setting
* POWER_CTRL_REG:4 = 0
......@@ -101,6 +97,13 @@ void omap_pm_idle(void)
omap_writew(omap_readw(ULPD_POWER_CTRL) &
~ULPD_DEEP_SLEEP_TRANSITION_EN, ULPD_POWER_CTRL);
/*
* Since an interrupt may set up a timer, we don't want to
* reprogram the hardware timer with interrupts enabled.
* Re-enable interrupts only after returning from idle.
*/
timer_dyn_reprogram();
if ((mask32 & DSP_IDLE) == 0) {
__asm__ volatile ("mcr p15, 0, r0, c7, c0, 4");
} else
......
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